Patents by Inventor Sandeep Oswal
Sandeep Oswal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240238841Abstract: An ultrasonic transceiver system including a transducer, a receiver coupled to the transducer, a transmitter having an output terminal coupled to the transducer, and a transmit/receive switch configured to isolate the receiver from the transmitter during transmission. The transmitter includes an amplifier and an output stage. The output stage includes a source follower transistor having a drain coupled to a supply terminal, a gate coupled to an output of the amplifier, and a source coupled to an output terminal, along with a power stage transistor having a source coupled to the supply terminal, a gate coupled to the drain of the source follower transistor, and a drain coupled to the output terminal. The output stage further includes a parallel source follower transistor having a drain coupled to the supply terminal, a gate coupled to the input terminal, and a source coupled to the output terminal.Type: ApplicationFiled: March 30, 2023Publication date: July 18, 2024Inventors: Raja Sekhar, Ravikumar Pattipaka, Sandeep Oswal
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Publication number: 20240243714Abstract: An ultrasonic transmitter including a linear amplifier, an output stage, a switch, and a current compensation circuit. The linear amplifier includes first and second amplifier stages. The output stage has an input coupled to output of the linear amplifier, and presents the transmitter output. The switch is coupled to the output of the linear amplifier. The current compensation circuit has an output coupled at the output of the first amplifier stage. Select circuitry is configured to couple the switch to a bias terminal when the switch is closed, and to couple one or more nodes of the switch to the control terminal of the current compensation circuit when the switch is open. The current compensation circuit generates a compensation current responsive to a sensed non-linear current conducted through the switch when open.Type: ApplicationFiled: March 30, 2023Publication date: July 18, 2024Inventors: Ravikumar Pattipaka, Raja Sekhar, Sandeep Oswal
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Publication number: 20240206034Abstract: An example apparatus includes: driver circuitry having a first terminal and a second terminal; and voltage control circuitry having a first terminal and a second terminal, the first terminal of the voltage control circuitry coupled to the first terminal of the driver circuitry, the second terminal of the voltage control circuitry coupled to the second terminal of the driver circuitry, the voltage control circuitry configured to supply an LED supply voltage.Type: ApplicationFiled: July 31, 2023Publication date: June 20, 2024Inventors: Raja Reddy Patukuri, Anand Hariraj Udupa, Aravind Miriyala, Sandeep Oswal, Rajat Agarwal
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Patent number: 11936346Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.Type: GrantFiled: April 15, 2021Date of Patent: March 19, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Rahul Sharma, Jagannathan Venkataraman, Sandeep Oswal, Visvesvaraya Appala Pentakota
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Patent number: 11901864Abstract: A circuit includes an amplifier having an input and an output. A voltage comparator has an input and first and second outputs. The input of the voltage comparator is coupled to the output of the amplifier. A variable capacitor circuit is coupled between the input and the output of the amplifier and is coupled to the first output of the voltage comparator. A charge dump circuit has an input and an output. The input of the charge dump circuit is coupled to the second output of the voltage comparator. The output of the charge dump circuit is coupled to the input of the amplifier.Type: GrantFiled: December 27, 2022Date of Patent: February 13, 2024Assignee: Texas Instruments IncorporatedInventors: Sravana Kumar Goli, Nagesh Surendranath, Saugata Datta, Sandeep Oswal
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Patent number: 11831283Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.Type: GrantFiled: March 23, 2021Date of Patent: November 28, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Vajeed Nimran, Raja Sekhar, Sandeep Oswal, Shagun Dusad
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Patent number: 11579106Abstract: The disclosure provides a measurement circuit. The measurement circuit includes a control engine. An excitation source is coupled to the control engine. A first set of electrodes and a second set of electrodes are coupled to the excitation source and receive current from the excitation source. The control engine operates the excitation source in a first mode and a second mode. The control engine, in the first mode, measures a parasitic impedance associated with the first and the second set of electrodes, and the control engine, in the second mode, measures an impedance of the first and the second set of electrodes and of an external object.Type: GrantFiled: April 20, 2020Date of Patent: February 14, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aatish Chandak, Raja Reddy Patukuri, Aravind Miriyala, Sandeep Oswal
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Publication number: 20220416741Abstract: An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.Type: ApplicationFiled: June 29, 2021Publication date: December 29, 2022Inventors: Sandeep Oswal, Raja Reddy Patukuri, Aravind Miriyala, Anand Hariraj Udupa, Hari Babu Tippana, Aatish Chandak
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Patent number: 11540384Abstract: An apparatus comprises a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface and a power supply PCB. The Tx/Rx PCB includes two transmitter devices, each comprising a number N of channels. A first transmitter device is arranged on the bottom surface and a second transmitter device is arranged on the top surface over the first transmitter device. One or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function. An analog front end (AFE) device comprising N input channels is arranged on the top surface of the Tx/Rx PCB, and a digital signal processor is coupled to the AFE device. The power supply PCB comprises a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.Type: GrantFiled: September 8, 2020Date of Patent: December 27, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Shabbir Amjhera Wala, Xiaochen Xu, Dijeesh K, Abhishek Vishwa, Shriram Devi, Aatish Chandak, Sanjay Dixit, Elisa Maddalena Granata, Jun Shen, Sandeep Oswal
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Publication number: 20220337203Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.Type: ApplicationFiled: April 15, 2021Publication date: October 20, 2022Inventors: Rahul Sharma, Jagannathan Venkataraman, Sandeep Oswal, Visvesvaraya Appala Pentakota
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Publication number: 20210329776Abstract: An apparatus comprises a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface and a power supply PCB. The Tx/Rx PCB includes two transmitter devices, each comprising a number N of channels. A first transmitter device is arranged on the bottom surface and a second transmitter device is arranged on the top surface over the first transmitter device. One or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function. An analog front end (AFE) device comprising N input channels is arranged on the top surface of the Tx/Rx PCB, and a digital signal processor is coupled to the AFE device. The power supply PCB comprises a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.Type: ApplicationFiled: September 8, 2020Publication date: October 21, 2021Inventors: Shabbir AMJHERA WALA, Xiaochen XU, Dijeesh K, Abhishek VISHWA, Shriram DEVI, Aatish CHANDAK, Sanjay DIXIT, Elisa Maddalena GRANATA, Jun SHEN, Sandeep OSWAL
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Patent number: 11063793Abstract: An equalization circuit includes a feed-forward equalization (FFE) circuit and a decision feedback equalization (DFE) circuit. The FFE circuit includes a first FFE tap, a second FFE tap coupled to the first FFE tap, and a variable gain amplifier. The variable gain amplifier includes an input and a programmable capacitor. The input is coupled to the first FFE tap and the second FFE tap. The programmable capacitor is coupled to the input. The DFE circuit includes an input and a DFE tap. The input is coupled to the variable gain amplifier. The DFE tap is coupled to the input of the variable gain amplifier.Type: GrantFiled: May 18, 2020Date of Patent: July 13, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ani Xavier, Jagannathan Venkataraman, Sandeep Oswal
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Publication number: 20210211102Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.Type: ApplicationFiled: March 23, 2021Publication date: July 8, 2021Inventors: Vajeed Nimran, Raja Sekhar, Sandeep Oswal, Shagun Dusad
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Patent number: 10985708Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.Type: GrantFiled: May 16, 2018Date of Patent: April 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Vajeed Nimran, Raja Sekhar, Sandeep Oswal, Shagun Dusad
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Patent number: 10911161Abstract: A transmitter for an RF communications system, that includes an auxiliary receiver for capturing transmit signal data for use in compensating/correcting transmit signal impairments (such as for DPD, QMC, LOL). The transmitter (such as Zero IF) includes analog chain elements that introduce transmit signal impairments (such as PA nonlinearities). The auxiliary receiver is configured to receive loopback transmit RF signals, and includes an RF direct sampling ADC to convert the loopback transmit RF signals to digital transmit RF signals. Digital down conversion circuitry is configured to downconvert the digital transmit RF signals to captured digital transmit baseband signals, and data capture circuitry is configured to generate the transmit signal data based on the captured digital transmit baseband signals.Type: GrantFiled: November 27, 2019Date of Patent: February 2, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sandeep Oswal, Visvesvaraya Pentakota, Jagannathan Venkataraman, Jaiganesh Balakrishnan, Francesco Dantoni
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Publication number: 20210003523Abstract: The disclosure provides a measurement circuit. The measurement circuit includes a control engine. An excitation source is coupled to the control engine. A first set of electrodes and a second set of electrodes are coupled to the excitation source and receive current from the excitation source. The control engine operates the excitation source in a first mode and a second mode. The control engine, in the first mode, measures a parasitic impedance associated with the first and the second set of electrodes, and the control engine, in the second mode, measures an impedance of the first and the second set of electrodes and of an external object.Type: ApplicationFiled: April 20, 2020Publication date: January 7, 2021Inventors: Aatish Chandak, Raja Reddy Patukuri, Aravind Miriyala, Sandeep Oswal
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Publication number: 20200177288Abstract: A transmitter for an RF communications system, that includes an auxiliary receiver for capturing transmit signal data for use in compensating/correcting transmit signal impairments (such as for DPD, QMC, LOL). The transmitter (such as Zero IF) includes analog chain elements that introduce transmit signal impairments (such as PA nonlinearities). The auxiliary receiver is configured to receive loopback transmit RF signals, and includes an RF direct sampling ADC to convert the loopback transmit RF signals to digital transmit RF signals. Digital down conversion circuitry is configured to downconvert the digital transmit RF signals to captured digital transmit baseband signals, and data capture circuitry is configured to generate the transmit signal data based on the captured digital transmit baseband signals.Type: ApplicationFiled: November 27, 2019Publication date: June 4, 2020Inventors: Sandeep Oswal, Visvesvaraya Pentakota, Jagannathan Venkataraman, Jaiganesh Balakrishnan, Francesco Dantoni
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Patent number: 10573292Abstract: A passive beamformer for ultrasound imaging. An ultrasound probe includes a plurality of ultrasound transducers and beamforming circuitry. Each of the ultrasound transducers is configured to convert ultrasonic signal into electrical signal. The beamforming circuitry is coupled to the plurality of ultrasound transducers. The beamforming circuitry includes a plurality of passive delay circuits and a passive hold circuit. One of the passive delay circuits is coupled to each of the ultrasound transducers. The passive hold circuit is coupled to the passive delay circuits to store a sum of the charges received from the delay circuits.Type: GrantFiled: October 13, 2017Date of Patent: February 25, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ravikumar Pattipaka, Vajeed Nimran, Sandeep Oswal
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Publication number: 20180262169Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.Type: ApplicationFiled: May 16, 2018Publication date: September 13, 2018Inventors: Vajeed Nimran, Raja Sekhar, Sandeep Oswal, Shagun Dusad
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Publication number: 20180137853Abstract: A passive beamformer for ultrasound imaging. An ultrasound probe includes a plurality of ultrasound transducers and beamforming circuitry. Each of the ultrasound transducers is configured to convert ultrasonic signal into electrical signal. The beamforming circuitry is coupled to the plurality of ultrasound transducers. The beamforming circuitry includes a plurality of passive delay circuits and a passive hold circuit. One of the passive delay circuits is coupled to each of the ultrasound transducers. The passive hold circuit is coupled to the passive delay circuits to store a sum of the charges received from the delay circuits.Type: ApplicationFiled: October 13, 2017Publication date: May 17, 2018Inventors: Ravikumar PATTIPAKA, Vajeed NIMRAN, Sandeep OSWAL