Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.

Abstract: A circuit includes an amplifier having an input and an output. A voltage comparator has an input and first and second outputs. The input of the voltage comparator is coupled to the output of the amplifier. A variable capacitor circuit is coupled between the input and the output of the amplifier and is coupled to the first output of the voltage comparator. A charge dump circuit has an input and an output. The input of the charge dump circuit is coupled to the second output of the voltage comparator. The output of the charge dump circuit is coupled to the input of the amplifier.

Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.

Abstract: The disclosure provides a measurement circuit. The measurement circuit includes a control engine. An excitation source is coupled to the control engine. A first set of electrodes and a second set of electrodes are coupled to the excitation source and receive current from the excitation source. The control engine operates the excitation source in a first mode and a second mode. The control engine, in the first mode, measures a parasitic impedance associated with the first and the second set of electrodes, and the control engine, in the second mode, measures an impedance of the first and the second set of electrodes and of an external object.

Abstract: An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.

Abstract: An apparatus comprises a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface and a power supply PCB. The Tx/Rx PCB includes two transmitter devices, each comprising a number N of channels. A first transmitter device is arranged on the bottom surface and a second transmitter device is arranged on the top surface over the first transmitter device. One or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function. An analog front end (AFE) device comprising N input channels is arranged on the top surface of the Tx/Rx PCB, and a digital signal processor is coupled to the AFE device. The power supply PCB comprises a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.

Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.

Abstract: An apparatus comprises a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface and a power supply PCB. The Tx/Rx PCB includes two transmitter devices, each comprising a number N of channels. A first transmitter device is arranged on the bottom surface and a second transmitter device is arranged on the top surface over the first transmitter device. One or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function. An analog front end (AFE) device comprising N input channels is arranged on the top surface of the Tx/Rx PCB, and a digital signal processor is coupled to the AFE device. The power supply PCB comprises a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.

Abstract: An equalization circuit includes a feed-forward equalization (FFE) circuit and a decision feedback equalization (DFE) circuit. The FFE circuit includes a first FFE tap, a second FFE tap coupled to the first FFE tap, and a variable gain amplifier. The variable gain amplifier includes an input and a programmable capacitor. The input is coupled to the first FFE tap and the second FFE tap. The programmable capacitor is coupled to the input. The DFE circuit includes an input and a DFE tap. The input is coupled to the variable gain amplifier. The DFE tap is coupled to the input of the variable gain amplifier.

Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.

Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.

Abstract: A transmitter for an RF communications system, that includes an auxiliary receiver for capturing transmit signal data for use in compensating/correcting transmit signal impairments (such as for DPD, QMC, LOL). The transmitter (such as Zero IF) includes analog chain elements that introduce transmit signal impairments (such as PA nonlinearities). The auxiliary receiver is configured to receive loopback transmit RF signals, and includes an RF direct sampling ADC to convert the loopback transmit RF signals to digital transmit RF signals. Digital down conversion circuitry is configured to downconvert the digital transmit RF signals to captured digital transmit baseband signals, and data capture circuitry is configured to generate the transmit signal data based on the captured digital transmit baseband signals.

Abstract: The disclosure provides a measurement circuit. The measurement circuit includes a control engine. An excitation source is coupled to the control engine. A first set of electrodes and a second set of electrodes are coupled to the excitation source and receive current from the excitation source. The control engine operates the excitation source in a first mode and a second mode. The control engine, in the first mode, measures a parasitic impedance associated with the first and the second set of electrodes, and the control engine, in the second mode, measures an impedance of the first and the second set of electrodes and of an external object.

Abstract: A transmitter for an RF communications system, that includes an auxiliary receiver for capturing transmit signal data for use in compensating/correcting transmit signal impairments (such as for DPD, QMC, LOL). The transmitter (such as Zero IF) includes analog chain elements that introduce transmit signal impairments (such as PA nonlinearities). The auxiliary receiver is configured to receive loopback transmit RF signals, and includes an RF direct sampling ADC to convert the loopback transmit RF signals to digital transmit RF signals. Digital down conversion circuitry is configured to downconvert the digital transmit RF signals to captured digital transmit baseband signals, and data capture circuitry is configured to generate the transmit signal data based on the captured digital transmit baseband signals.

Abstract: A passive beamformer for ultrasound imaging. An ultrasound probe includes a plurality of ultrasound transducers and beamforming circuitry. Each of the ultrasound transducers is configured to convert ultrasonic signal into electrical signal. The beamforming circuitry is coupled to the plurality of ultrasound transducers. The beamforming circuitry includes a plurality of passive delay circuits and a passive hold circuit. One of the passive delay circuits is coupled to each of the ultrasound transducers. The passive hold circuit is coupled to the passive delay circuits to store a sum of the charges received from the delay circuits.

Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.

Abstract: A passive beamformer for ultrasound imaging. An ultrasound probe includes a plurality of ultrasound transducers and beamforming circuitry. Each of the ultrasound transducers is configured to convert ultrasonic signal into electrical signal. The beamforming circuitry is coupled to the plurality of ultrasound transducers. The beamforming circuitry includes a plurality of passive delay circuits and a passive hold circuit. One of the passive delay circuits is coupled to each of the ultrasound transducers. The passive hold circuit is coupled to the passive delay circuits to store a sum of the charges received from the delay circuits.

Abstract: Samples of a light radar (“LIDAR”) return signal are stored in an analog circular buffer following the transmission of a LIDAR pulse. Sampling continues for a fixed period of time or number of samples during a post-trigger sampling period after the occurrence of a trigger signal from a trigger circuit. The trigger circuit indicates the receipt of a return pulse associated with a target object based upon one or more return signal characteristics. Following the post-trigger sampling period, the stored analog samples are sequentially read out and converted to digital sample values. The digital sample values may be analyzed in a digital processor to further confirm the validity of the returned LIDAR pulse, to determine a time of arrival of the LIDAR pulse, and to calculate a distance to the target object. Some versions include multiple circular buffers and capture clocks, enabling the capture of samples from multiple return pulses.

Abstract: In certain embodiments, systems for receiving one or more echoes are provided. The system comprises a first attenuator, a first amplifier, and a second attenuator. The first attenuator is configured to receive the one or more echo signals, and generate a corresponding set of first attenuated echo signals, respectively, based on a number of signal strengths of the one or more echo signals. The first amplifier is configured to receive and amplify the set of first attenuated echo signals to thereby generate a set of first amplified echo signals corresponding to the one or more first attenuated echo signals, respectively. The second attenuator is configured to receive the set of first amplified echo signals and generate a set of second attenuated echo signals corresponding to the set of first amplified echo signals, respectively, based on a number of signal strengths of the set of first amplified echo signals, respectively.

Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.