Abstract: An apparatus comprises processor cores and computer-readable mediums storing machine instructions for the processor cores. When executing the machine instructions, the processor cores obtain received signals for transmitted chirps from a radar sensor circuit. Each transmitted chirp comprises an A chirp segment, a time gap, and a B chirp segment, respectively. The processor cores sample the received signals to obtain sampled data matrices M1(A) for the A chirp segments and M1(B) for the B chirp segments. The processor cores perform a first Fourier transform (FT) on each column of M1(A) and M1(B) to obtain velocity matrices M2(A) and M2(B), respectively. The processor cores apply a phase compensation factor to M2(B) to obtain a phase corrected velocity matrix M2(B?), and concatenate M2(A) and M2(B?) to obtain an aggregate velocity matrix M2(A&B?). The processor cores perform a second FT on each row of M2(A&B?) to obtain a range and velocity matrix M3(A&B?).

Abstract: In an example, a method is implemented in a radar system. The method may include transmitting, via transmission channels, a frame of chirps, the chirps transmitted having a programmed frequency offset that is a function of a transmission channel of the transmission channels that is transmitting the frame of chirps, receiving, via a receive channel, a frame of reflected chirps, the reflected chirps comprising the chirps reflected by an object within a field of view of the radar system, and determining a Doppler domain representation of the frame of reflected chirps having a Doppler domain spectrum that includes multiple spectrum bands, the object represented in at least a portion of the spectrum bands based on the reflected chirps, wherein the programmed frequency is configured to cause the Doppler domain spectrum to include a number of spectrum bands greater than the number of transmission channels.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may determine whether a slot timing difference, between a first cell and a second cell for a dual connectivity mode, satisfies a threshold value, where the first cell is a serving cell associated with a first radio access technology (RAT) and the second cell is a serving cell or a candidate cell associated with a second RAT. The UE may perform an operation to prevent the dual connectivity mode with the second cell, establish the dual connectivity mode with the second cell, maintain the dual connectivity mode with the second cell, or terminate the dual connectivity mode with the second cell based at least in part on whether the slot timing difference satisfies the threshold value. Numerous other aspects are provided.

Abstract: A radar system is provided that includes a radar transceiver integrated circuit (IC) configurable to transmit a first frame of chirps, and another radar transceiver IC configurable to transmit a second frame of chirps at a time delay ?T, wherein ?T=Tc/K, K?2 and Tc is an elapsed time from a start of one chirp in the first frame and the second frame and a start of a next chirp in the first frame and the second frame, wherein the radar system is configured to determine a velocity of an object in a field of view of the radar system based on first digital intermediate frequency signals generated responsive to receiving reflected chirps of the first frame and second digital IF signals generated responsive to receiving reflected chirps of the time delayed second frame, wherein the maximum measurable velocity is increased by a factor of K.

Abstract: A radar hardware accelerator (HWA) includes a fast Fourier transform (FFT) engine including a pre-processing block for providing interference mitigation and/or multiplying a radar data sample stream received from ADC buffers within a split accelerator local memory that also includes output buffers by a pre-programmed complex scalar or a specified sample from an internal look-up table (LUT) to generate pre-processed samples. A windowing plus FFT block (windowed FFT block) is for multiply the pre-processed samples by a window vector and then processing by an FFT block for performing a FFT to generate Fourier transformed samples. A post-processing block is for computing a magnitude of the Fourier transformed samples and performing a data compression operation for generating post-processed radar data. The pre-processing block, windowed FFT block and post-processing block are connected in one streaming series data path.

Abstract: Data memory protection is provided for a signal processing system such as a radar system in which the data memory is protected with a common set of parity bits rather than requiring a set of parity bits for each memory word as in Error Correction Coded (ECC) memories. The common set of parity bits may be updated as memory words in the data memory are accessed as part of signal processing of one or more digital signals. The memory protection ensures that in the absence of memory errors the common parity bits are zero at the end of processing the digital signals as long as each word in the data memory that is used for storing the signal processing data is written and read an equal number of times.

Abstract: The described technology relates to a real-time processing of network packets. An example system relates to reordering messages received at a server over a communication network from distributed clients, in order to, among other things, eliminate or at least substantially reduce the effects of jitter (delay variance) experienced in the network. The reordering of messages may enable the example data processing application to improve the consistency of processing packets in the time order of when the respective packets entered a geographically distributed network.

Abstract: Aspects presented herein enable updating the codebook configuration upon the changing of the cover or case of the UE. The apparatus applies a first codebook from a plurality of preconfigured codebooks. The apparatus detects a change of a cover state of the UE, wherein the change alters a transmission beam pattern at the UE. The apparatus applies a second codebook from the plurality of preconfigured codebooks based on the change of the cover state.

Abstract: In accordance with described examples, a method determines if a velocity of an object detected by a radar is greater than a maximum velocity by receiving on a plurality of receivers at least one frame of chirps transmitted by at least two transmitters and reflected off of the object. A velocity induced phase shift (?d) in a virtual array vector S of signals received by each receiver corresponding to a sequence of chirps (frame) transmitted by each transmitter is estimated. Phases of each element of virtual array vector S are corrected using ?d to generate a corrected virtual array vector Sc. A first Fourier transform is performed on the corrected virtual array vector Sc to generate a corrected virtual array spectrum to detect a signature that indicates that the object has an absolute velocity greater than a maximum velocity.

Abstract: A radar system is provided that includes a radar transceiver integrated circuit (IC) configurable to transmit a first frame of chirps, and another radar transceiver IC configurable to transmit a second frame of chirps at a time delay ?T, wherein ?T=Tc/K, K?2 and Tc is an elapsed time from a start of one chirp in the first frame and the second frame and a start of a next chirp in the first frame and the second frame, wherein the radar system is configured to determine a velocity of an object in a field of view of the radar system based on first digital intermediate frequency signals generated responsive to receiving reflected chirps of the first frame and second digital IF signals generated responsive to receiving reflected chirps of the time delayed second frame, wherein the maximum measurable velocity is increased by a factor of K.

Abstract: A radar system comprises a set of transmitters and a processor coupled to the set of transmitters. The processor is configured to modulate a first portion of a chirp in a chirp frame according to a first phase. The processor is further configured to modulate a second portion of the chirp in the chirp frame according to a second phase and configured to combine the first and second portions of the chirp to produce a phase-modified chirp. The processor is further configured to instruct the set of transmitters to transmit the phase-modified chirp by applying time division multiple access (TDMA) and by directing radio frequency energy according to a target angle and a target gain.

Abstract: Methods and apparatus are disclosed low power motion detection by a radar apparatus. One example radar apparatus includes a transmitter to transmit a pattern of chirps. The transmitted pattern includes a first series of chirps transmitted during a first time period and a second series of chirps transmitted during a second time period that begins after passage of a sleep time period from an end of the first time period. The example radar apparatus also includes a receiver to detect returning chirps including reflected portions of the transmitted pattern. The example radar apparatus also includes analog to digital converter (ADC) coupled to the receiver. The ADC is to sample analog signals from the receiver to generate ADC samples for the returning chirps detected by the receiver.

Abstract: Disclosed examples include a radar system that operates in a first mode and a second mode. In the first mode, the system detects the presence of an object within a threshold range. In response to detection of the presence of the object, the system transitions to the second mode, and the system generates range data, velocity data, and angle data of the object in the second mode. When the object is no longer detected within the threshold range, the system transitions back to the first mode.

Abstract: A method for compressing echolocation data is provided. The method includes dividing the echolocation data into a plurality of partitions, and selecting a first partition for processing. The method also includes combining echolocation data from the first partition with echolocation data within a second partition, and combining echolocation data from the first partition with echolocation data within a third partition. The method further includes storing the combined echolocation data for all of the plurality of partitions except for the first partition in a memory.

Abstract: In accordance with described examples, a method determines if a velocity of an object detected by a radar is greater than a maximum velocity by receiving on a plurality of receivers at least one frame of chirps transmitted by at least two transmitters and reflected off of the object. A velocity induced phase shift (?d) in a virtual array vector S of signals received by each receiver corresponding to a sequence of chirps (frame) transmitted by each transmitter is estimated. Phases of each element of virtual array vector S are corrected using ?d to generate a corrected virtual array vector Sc. A first Fourier transform is performed on the corrected virtual array vector Sc to generate a corrected virtual array spectrum to detect a signature that indicates that the object has an absolute velocity greater than a maximum velocity.

Abstract: A radar system is provided and includes a radar transceiver integrated circuit (IC) and a processor coupled to the radar transceiver IC. The radar transceiver IC includes a chirp generator configured to generate a plurality of chirp signals and a phase shifter configured to induce a signal phase shift. The radar transceiver IC is configured to transmit a frame of chirps based on the plurality of chirp signals and generate a plurality of digital signals, each digital signal corresponding to a respective reflection received based on the plurality of chirp signals. The processor is configured to control the phase shifter to induce the signal phase shift in a first subset of chirp signals of the plurality of chirp signals and determine a phase shift induced in the first subset of chirp signals by the phase shifter based on the digital signal.

Abstract: A radar system is provided that includes a radar transceiver integrated circuit (IC) configurable to transmit a first frame of chirps, and another radar transceiver IC configurable to transmit a second frame of chirps at a time delay ?T, wherein ?T=Tc/K, K?2 and Tc is an elapsed time from a start of one chirp in the first frame and the second frame and a start of a next chirp in the first frame and the second frame, wherein the radar system is configured to determine a velocity of an object in a field of view of the radar system based on first digital intermediate frequency signals generated responsive to receiving reflected chirps of the first frame and second digital IF signals generated responsive to receiving reflected chirps of the time delayed second frame, wherein the maximum measurable velocity is increased by a factor of K.

Abstract: A system (10) for pedestrian use includes an accelerometer (110) having multiple electronic sensors; an electronic circuit (100) operable to generate a signal stream representing magnitude of overall acceleration sensed by the accelerometer (110), and to electronically correlate a sliding window (520) of the signal stream with itself to produce peaks at least some of which represent walking steps, and further operable to electronically execute a periodicity check (540) to compare different step periods for similarity, and if sufficiently similar then to update (560) a portion of the circuit substantially representing a walking-step count; and an electronic display (190) responsive to the electronic circuit (100) to display information at least in part based on the step count. Other systems, electronic circuits and processes are disclosed.

Abstract: A method for dithering radar frames includes determining at least one of a chirp period Tc for radar chirps in a radar frame and a chirp slope S for radar chirps in the radar frame. In response to determining the chirp period Tc, a maximum chirp dither ?c(max) is determined, and for the radar frame N, a random chirp dither ?c(N) between negative ?c(max) and positive ?c(max) is determined. In response to determining the chirp slope S, a maximum slope dither ?(max) is determined, and for the radar frame N, a random slope dither ?(N) between negative ?(max) and positive ?(max) is determined. A radar sensor circuit generates radar chirps in the radar frame N based on the at least one of (1) the chirp period Tc and the random chirp dither ?c(N) and (2) the chirp slope S and the random slope dither ?(N).

Abstract: Systems and methods are provided for Doppler processing for frequency-modulated continuous wave (FMCW) radar systems. Range-gate data representing the position of an object within a region of interest is generated at a radar sensor. A first Doppler Fast Fourier Transform (Doppler-FFT) is performed on the range-gate data to provide a first set of Doppler-FFT data. A velocity associated with a signal amplitude that exceeds a noise floor is identified in the first set of Doppler-FFT data. A correction value for the range-gate data is determined from the identified velocity. The range-gate data is modified using the determined correction value to provide modified range-gate data. A second Doppler-FFT is performed on the modified range-gate data to provide a second set of Doppler-FFT data.