Abstract: A plasma display device includes a scan electrode, a scan circuit configured to selectively apply a first voltage through a first input terminal and a second voltage, lower than the first voltage, through a second input terminal to the scan electrode during an address period, a transformer including a primary coil and a secondary coil, a capacitor including a first terminal and a second terminal respectively connected to the first input terminal and the second input terminal, the capacitor being charged with a third voltage corresponding to a difference between the first voltage and the second voltage in accordance with a current transmitted to the secondary coil, and a first switch connected between the second input terminal and a power source configured to supply the second voltage.

Abstract: A plasma display device that can utilize an energy recovery voltage regardless of whether pixels are selected. An energy recovery circuit of the plasma display device includes first and second switches serially coupled between a first voltage source and a second voltage source, a third switch coupled to a connection point between the first and second switches, a voltage recovery capacitor coupled between the third switch and a base voltage source, and a precharger for charging the voltage recovery capacitor.

Abstract: In a plasma display device, a first transistor is connected between an electrode and a power source supplying a first voltage, and a second transistor is connected to a control terminal of the first transistor. A first gate driver supplies a first control signal to the control terminal of the first transistor and is connected to the control terminal of the first transistor. A second gate driver supplies a second control signal to the second transistor, and is connected to the control terminal of the second transistor. Further, a diode is connected between an output terminal of the second gate driver and the control terminal of the first transistor.

Abstract: A plasma display device driven during an address period and a sustain period includes a discharge cell defined by a scan electrode, a sustain electrode, and an address electrode, an addressing circuit for providing an address voltage to the address electrode, and an addressing compensation circuit for storing voltage corresponding to a displacement current generated during a sustain period to be utilized during the address period. The addressing compensation circuit includes a switch coupled with the address electrode through which the displacement current supplied from the scan electrode and the sustain electrode is received during the sustain period, and a capacitor coupled with the switch for storing the voltage corresponding to the displacement current received through the switch.

Abstract: A plasma display device including a plasma display panel having a plurality of electrodes, an address electrode driver, a sustain electrode driver, and a scan electrode driver having a first transistor is provided. The first transistor is coupled between an electrode of the plurality of electrodes and a power source for supplying a first voltage. During a falling period of a reset period, a first driver gradually reduces a voltage of the electrode by controlling driving of the first transistor, and a second driver turns off the first transistor when a voltage generated by dividing a voltage of the electrode becomes lower than a reference voltage, thereby sustaining the voltage of the electrode at a second voltage different from the first voltage. Accordingly, different voltages can be applied to the electrode using one power source.

Abstract: A scan electrode driver for driving a scan electrode, the scan electrode driver including a scan IC coupled between a first node and a second node, and adapted to selectively apply a first voltage and a second voltage that is lower than the first voltage to the scan electrode during an address period, a voltage regulator including a first terminal coupled to the first node, and a capacitor coupled between a second terminal of the voltage regulator and the second node, wherein the voltage regulator is adapted to charge the capacitor with a third voltage that is lower than a voltage difference between the first voltage and the second voltage before the second voltage is applied to the scan electrode.

Abstract: A PDP driving circuit is disclosed. The circuit includes a scan driver divided into at least more than two groups, a logic controller generating scan driver control reference signals, which are used to generate scan driving signals of the scan driver, and a buffer block giving different delay times to the scan driver control reference signals, to apply them to the scan driver groups, respectively.

Abstract: A design for a plasma display device that attenuates noise generated in a flexible printed circuit (FPC) so that the noise does not reach the chassis base, the FPC connecting a printed circuit board assembly to electrodes within the plasma display panel. The plasma display device includes a spacer made out of non woven fabric and located between the FPC and the chassis.

Abstract: In one embodiment, a plasma display device includes: a plasma display panel having a plurality of electrodes; a power supply including first and second power sources for respectively supplying first and second voltages, the second voltage being higher than the first voltage; a driving circuit for driving the electrodes; and a controller for generating a first signal to control the driving circuit. The driving circuit includes: a first switch for supplying a third voltage to the electrodes, the third voltage decreasing over a period of time; a switching controller for controlling the first switch in accordance with the first signal and a second signal; and a feedback signal generator for comparing fourth and fifth voltages respectively proportional to the third and second voltages, adjusting a level of the second signal according to a result of comparing the fourth and fifth voltages, and supplying the second signal to the switching controller.

Abstract: The present invention relates to a novel recombinant Sabin type 1 poliovirus vector for the immunogenicity of neutralizing antibody against polioviral infection, which comprises: (a) a genomic nucleotide sequence of a parent Sabin type 1 poliovirus; (b) a nucleotide sequence encoding an additional polioviral cleavage site; and (c) a nucleotide sequence of a conformational epitope encoding a VP1 neutralizing epitope of poliovirus type 2 or 3 and linked to the nucleotide sequence of (b).

Abstract: The present invention relates to (a) methods for improving a genetic stability of an insert nucleotide sequence in a recombinant single-stranded RNA virus vector, which comprises performing a mutagenesis of the foreign insert nucleotide sequence to provide even distribution of G/C content throughout the overall foreign insert nucleotide sequence and/or to increase G/C content of the foreign insert without substantially causing amino acids substitutions (b) a recombinant single-stranded RNA virus comprising an insert nucleotide sequence with improved genetic stability and (c) a recombinant poliovirus comprising an insert nucleotide sequence with improved genetic stability.

Abstract: The present invention relates to (a) methods for improving a genetic stability of an insert nucleotide sequence in a recombinant single-stranded RNA virus vector, which comprises performing a mutagenesis of the foreign insert nucleotide sequence to provide even distribution of G/C content throughout the overall foreign insert nucleotide sequence and/or to increase G/C content of the foreign insert without substantially causing amino acids substitutions (b) a recombinant single-stranded RNA virus comprising an insert nucleotide sequence with improved genetic stability and (c) a recombinant poliovirus comprising an insert nucleotide sequence with improved genetic stability.