Abstract: A laser crystallization method includes exciting gas medium in an airtight container to generate laser beams; amplifying the laser beams by reflecting the laser beams between a high reflection mirror and a low reflection mirror respectively disposed facing opposite end portions of the airtight container, wherein a first transparent window and a second transparent window are fixed to respective end portions of the airtight container, and outputting the amplified laser beams; and disposing a cleaning mirror in a path of the laser beams that have propagated through the second transparent window.

Abstract: An optical system for a laser apparatus includes: a long-short axis reversing module that includes a splitter, a first mirror, and a second mirror positioned in a propagation path of an incident laser beam, where the first mirror includes a first submirror and a second submirror connected to each other at a predetermined angle therebetween. The optical system converts an incident laser beam having an asymmetric energy distribution into an emitted laser beam with a symmetric energy distribution.

Abstract: A method for crystallizing a silicon substrate includes manufacturing a crystallized silicon test substrate that is crystallized by scanning excimer laser annealing beams with different energy densities on respective areas of an amorphous silicon test substrate, irradiating a surface of the crystallized silicon test substrate using a light source, and measuring reflectivity corresponding to the respective areas of the crystallized silicon test substrate in a visible light wavelength range, extracting average reflectivities of the respective areas of the crystallized silicon test substrate in wavelength ranges corresponding to respective colors, calculating an optimum energy density (OPED) index per energy density by using a value acquired by subtracting average reflectivity of red-based colors from average reflectivity of blue-based colors, selecting an optimal energy density, and crystallizing an amorphous silicon substrate using the optimal energy density.

Abstract: Disclosed is a metal core solder ball having improved heat conductivity, including a metal core having a diameter of 40˜600 ?m, a first plating layer formed on the outer surface of the metal core, and a second plating layer formed on the outer surface of the first plating layer.

Abstract: A method for crystallizing a silicon substrate includes manufacturing a crystallized silicon test substrate that is crystallized by scanning excimer laser annealing beams with different energy densities on respective areas of an amorphous silicon test substrate, irradiating a surface of the crystallized silicon test substrate using a light source, and measuring reflectivity corresponding to the respective areas of the crystallized silicon test substrate in a visible light wavelength range, extracting average reflectivities of the respective areas of the crystallized silicon test substrate in wavelength ranges corresponding to respective colors, calculating an optimum energy density (OPED) index per energy density by using a value acquired by subtracting average reflectivity of red-based colors from average reflectivity of blue-based colors, selecting an optimal energy density, and crystallizing an amorphous silicon substrate using the optimal energy density.

Abstract: A plasma display panel (PDP) comprises: a front substrate and a rear substrate which face each other; and a barrier wall which is interposed between the front substrate and the rear substrate, which includes base portions arranged on either side of a main discharge space, and protruding portions protruding on the base portions, respectively, and which defines stepped spaces on either side of the main discharge space. The stepped spaces are formed according to stepped surfaces formed by the base portions and the protruding portions. The PDP further comprises a pair of a scan electrode and a sustain electrode which generate a mutual discharge through the main discharge space. A channel space is defined by outer walls of the protruding portions on either side of the main discharge space, and an external light absorbing layer covers the channel space.

Abstract: A plasma display panel (PDP) and a method of manufacturing the same with improved luminous efficiency. The PDP includes: a first substrate; a second substrate facing the first substrate; a plurality of sustain electrode pairs between the first substrate and the second substrate and extending in a first direction; a plurality of address electrodes on the second substrate and extending in a second direction crossing the first direction; a first dielectric layer on the second substrate for covering the address electrodes; a discharge enhancement layer on the first dielectric layer; a plurality of barrier ribs on the discharge enhancement layer and defining discharge cells between the first and second substrates; and phosphor layers in the discharge cells, wherein the discharge enhancement layer has an opening in each of the discharge cells, and wherein the barrier ribs have a roughness less than that of the discharge enhancement layer.

Abstract: Disclosed herein are a lead-free solder alloy and a manufacturing method thereof. More specifically, disclosed are: a lead-free solder alloy, which comprises 0.8-1.2 wt % silver (Ag), 0.8-1.2 wt % copper (Cu), 0.01-1.0 wt % palladium (Pd), 0.001-0.1 wt % tellurium (Te), and a balance of tin (Sn), and thus has a melting point similar to those of prior lead-free solder alloys, excellent wettability, very low segregation ratio, and excellent weldability with a welding base metal, such that it improves temperature cycle performance and drop impact resistance simultaneously, when it is applied to electronic devices and printed circuit boards; a manufacturing method of the above alloy; and electronic devices and printed circuit boards which include the same.

Abstract: A plasma display panel is disclosed. The plasma display panel has discharge cells which each have a range of widths between the first substrate and the second substrate. In addition, the discharge spaces are separated by non-discharge spaces having heights which are less than the heights of the discharge spaces.

Abstract: A plasma display panel is disclosed. The plasma display panel has discharge cells which each have a range of widths between the first substrate and the second substrate. In addition, the discharge spaces are separated by non-discharge spaces having heights substantially the same as the heights of the discharge spaces.

Abstract: A plasma display panel (PDP) includes: a front substrate facing a rear substrate; first and second discharge enhancement layers disposed between the front and rear substrates and arranged on both sides of a main discharge space; first and second barrier ribs respectively formed on the first and second discharge enhancement layers and defining first and second asymmetric stepped spaces along with the first and second discharge enhancement layers; a scan electrode and a common electrode inducing a mutual discharge in the main discharge space; an address electrode generating an address discharge along with the scan electrode and extending in a direction to intersect the scan electrode; a phosphor layer formed in at least the main discharge space; and a discharge gas filled in the main discharge space and the first and second stepped spaces. Accordingly, the PDP having high efficiency may operate with low power and obtain high luminous brightness.

Abstract: A plasma display panel (PDP) comprises: a front substrate and a rear substrate which face each other; and a barrier wall which is interposed between the front substrate and the rear substrate, which includes base portions arranged on either side of a main discharge space, and protruding portions protruding on the base portions, respectively, and which defines stepped spaces on either side of the main discharge space. The stepped spaces are formed according to stepped surfaces formed by the base portions and the protruding portions. The PDP further comprises a pair of a scan electrode and a sustain electrode which generate a mutual discharge through the main discharge space. A channel space is defined by outer walls of the protruding portions on either side of the main discharge space, and an external light absorbing layer covers the channel space.

Abstract: An electron emission display includes a first substrate, an electron emission unit formed at the first substrate to emit electrons, a second substrate facing the first substrate, and a light emission unit formed at the second substrate to emit visible light using electrons emitted from the electron emission unit. The light emission unit includes a phosphor layer formed on the second substrate and an anode electrode formed on the phosphor layer. The anode electrode includes a first metal layer and a second metal layer formed on the first metal layer and having a single- or multi-layered structure.

Abstract: Disclosed herein are a lead-free solder alloy and a manufacturing method thereof. More specifically, disclosed are: a lead-free solder alloy, which comprises 0.8-1.2 wt % silver (Ag), 0.8-1.2 wt % copper (Cu), 0.01-1.0 wt % palladium (Pd), 0.001-0.1 wt % tellurium (Te), and a balance of tin (Sn), and thus has a melting point similar to those of prior lead-free solder alloys, excellent wettability, very low segregation ratio, and excellent weldability with a welding base metal, such that it improves temperature cycle performance and drop impact resistance simultaneously, when it is applied to electronic devices and printed circuit boards; a manufacturing method of the above alloy; and electronic devices and printed circuit boards which include the same.

Abstract: A plasma display panel (PDP) and a method of manufacturing the same with improved luminous efficiency. The PDP includes: a first substrate; a second substrate facing the first substrate; a plurality of sustain electrode pairs between the first substrate and the second substrate and extending in a first direction; a plurality of address electrodes on the second substrate and extending in a second direction crossing the first direction; a first dielectric layer on the second substrate for covering the address electrodes; a discharge enhancement layer on the first dielectric layer; a plurality of barrier ribs on the discharge enhancement layer and defining discharge cells between the first and second substrates; and phosphor layers in the discharge cells, wherein the discharge enhancement layer has an opening in each of the discharge cells, and wherein the barrier ribs have a roughness less than that of the discharge enhancement layer.

Abstract: An electron emission device includes a first substrate, a second substrate facing the first substrate, a scan electrode formed on the first substrate and having a width Sv, and a data electrode formed on the first substrate perpendicular to and crossing the scan electrode at a crossed region. A unit pixel is disposed in an area of the crossed region and has a pitch Pv. An insulating layer is disposed between the scan electrodes and the data electrodes. An electron emission region is electrically coupled the scan electrode or the data electrode, and the scan electrode and the unit pixel satisfy the following condition: 0.5?Sv/Pv?0.95.

Abstract: An electron emission display device is constructed with first and second substrates facing each other, cathode electrodes formed on the first substrate, electron emission regions electrically connected to the cathode electrodes, and red, green and blue phosphor layers formed on a surface of the second substrate facing the first substrate. Each cathode electrode is constructed with a first electrode having opened portions arranged at the corresponding unit pixels defined on the first substrate with the same size, a second electrode spaced apart from the first electrode within the opened portion, and a resistance layer disposed between the first and the second electrodes to electrically interconnect the first and the second electrodes. The distance between the first and the second electrodes corresponding to the red, green and blue phosphor layers is established to be proportional to the light emission efficiency of the corresponding red, green and blue phosphor layers.

Abstract: An embodiment of an electron emission device includes first and second substrates facing each other, unit pixels being defined on the first and the second substrates, an electron emission unit on the first substrate, phosphor layers on a surface of the second substrate facing the first substrate, each phosphor layer corresponding to at least one unit pixel, non-light emission regions between the phosphor layers, and spacers interposed between the first and the second substrates and arranged in the non-light emission regions, wherein the non-light emission regions comprise spacer loading regions loaded with the spacers, wherein a width of a spacer loading region and a pitch of the unit pixels satisfies the following condition: A/B?about 0.2, where A indicates the width of the spacer loading region and B indicates the pitch of the unit pixels located along the width of the spacer loading region.

Abstract: A plasma display panel is disclosed. The plasma display panel has discharge cells which each have a range of widths between the first substrate and the second substrate. In addition, the discharge spaces are separated by non-discharge spaces having heights substantially the same as the heights of the discharge spaces.

Abstract: A plasma display panel is disclosed. The plasma display panel has discharge cells which each have a range of widths between the first substrate and the second substrate. In addition, the discharge spaces are separated by non-discharge spaces having heights which are less than the heights of the discharge spaces.