Patents by Inventor Sang-hyeob Lee

Sang-hyeob Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110233778
    Abstract: The invention provides a method of forming a film stack on a substrate, comprising depositing a tungsten nitride layer on the substrate, subjecting the substrate to a nitridation treatment using active nitrogen species from a remote plasma, and depositing a conductive bulk layer directly on the tungsten nitride layer without depositing a tungsten nucleation layer on the tungsten nitride layer as a growth site for tungsten.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 29, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Sang-Hyeob Lee, Sang Ho Yu, Wei Ti Lee, Seshadri Ganguli, Hyoung-Chan Ha, Hoon Kim
  • Patent number: 7732327
    Abstract: Embodiments of the invention provide an improved process for depositing tungsten-containing materials. The process utilizes soak processes and vapor deposition processes to provide tungsten films having significantly improved surface uniformity while increasing the production level throughput. In one embodiment, a method is provided which includes depositing a tungsten silicide layer on the substrate by exposing the substrate to a continuous flow of a silicon precursor while also exposing the substrate to intermittent pulses of a tungsten precursor. The method further provides that the substrate is exposed to the silicon and tungsten precursors which have a silicon/tungsten precursor flow rate ratio of greater than 1, for example, about 2, about 3, or greater. Subsequently, the method provides depositing a tungsten nitride layer on the tungsten suicide layer, depositing a tungsten nucleation layer on the tungsten nitride layer, and depositing a tungsten bulk layer on the tungsten nucleation layer.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: June 8, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Sang-Hyeob Lee, Avgerinos V. Gelatos, Kai Wu, Amit Khandelwal, Ross Marshall, Emily Renuart, Wing-Cheong Gilbert Lai, Jing Lin
  • Publication number: 20090081866
    Abstract: Embodiments of the invention provide an improved process for depositing tungsten-containing materials. The process utilizes soak processes and vapor deposition processes to provide tungsten films having significantly improved surface uniformity while increasing the production level throughput. In one embodiment, a method is provided which includes depositing a tungsten silicide layer on the substrate by exposing the substrate to a continuous flow of a silicon precursor while also exposing the substrate to intermittent pulses of a tungsten precursor. The method further provides that the substrate is exposed to the silicon and tungsten precursors which have a silicon/tungsten precursor flow rate ratio of greater than 1, for example, about 2, about 3, or greater. Subsequently, the method provides depositing a tungsten nitride layer on the tungsten suicide layer, depositing a tungsten nucleation layer on the tungsten nitride layer, and depositing a tungsten bulk layer on the tungsten nucleation layer.
    Type: Application
    Filed: September 26, 2008
    Publication date: March 26, 2009
    Inventors: SANG-HYEOB LEE, Avgerinos V. Gelatos, Kai Wu, Amit Khandelwal, Ross Marshall, Emily Renuart, Wing-Cheong Gilbert Lai, Jing Lin
  • Publication number: 20080202425
    Abstract: Embodiments of the invention provide apparatuses for vapor depositing tungsten-containing materials, such as metallic tungsten and tungsten nitride. In one embodiment, a processing chamber is provided which includes a lid assembly containing a lid plate, a showerhead, a mixing cavity, a distribution cavity, and a resistive heating element contained within the lid plate. In one example, the resistive heating element is configured to provide the lid plate at a temperature within a range from about 120° C. to about 180° C., preferably, from about 140° C. to about 160° C., more preferably, from about 145° C. to about 155° C. The mixing cavity may be in fluid communication with a tungsten precursor source containing tungsten hexafluoride and a nitrogen precursor source containing ammonia. In some embodiments, a single processing chamber may be used to deposit metallic tungsten and tungsten nitride materials by CVD processes.
    Type: Application
    Filed: January 29, 2008
    Publication date: August 28, 2008
    Inventors: Avgerinos V. Gelatos, Sang-Hyeob Lee, Xiaoxiong Yuan, Salvador P. Umotoy, Yu Chang, Gwo-Chuan Tzu, Emily Renuart, Jing Lin, Wing-Cheong Lai, Sang Q. Le
  • Publication number: 20080206987
    Abstract: Embodiments of the invention provide processes for vapor depositing tungsten-containing materials, such as metallic tungsten and tungsten nitride. In one embodiment, a method for forming a tungsten-containing material is provided which includes positioning a substrate within a processing chamber containing a lid plate, heating the lid plate to a temperature within a range from about 120° C. to about 180° C., exposing the substrate to a reducing gas during a pre-nucleation soak process, and depositing a first tungsten nucleation layer on the substrate during a first atomic layer deposition process within the processing chamber. The method further provides depositing a tungsten nitride layer on the first tungsten nucleation layer during a vapor deposition process, depositing a second tungsten nucleation layer on the tungsten nitride layer during a second atomic layer deposition process within the processing chamber, and exposing the substrate to another reducing gas during a post-nucleation soak process.
    Type: Application
    Filed: January 29, 2008
    Publication date: August 28, 2008
    Inventors: Avgerinos V. Gelatos, Sang-Hyeob Lee, Xiaoxiong Yuan, Salvador P. Umotoy, Yu Chang, Gwo-Chuan Tzu, Emily Renuart, Jing Lin, Wing-Cheong Lai, Sang Q. Le
  • Patent number: 7157798
    Abstract: A method for creating a refractory metal and refractory metal nitride cap effective for reducing copper electromigration and copper diffusion is described. The method includes depositing a refractory metal nucleation layer and nitriding at least the upper portion of the refractory metal layer to form a refractory metal nitride. Methods to reduce and clean the copper lines before refractory metal deposition are also described. Methods to form a thicker refractory metal layer using bulk deposition are also described.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: January 2, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: James A. Fair, Robert H. Havemann, Jungwan Sung, Nerissa Taylor, Sang-Hyeob Lee, Mary Anne Plano
  • Patent number: 7141494
    Abstract: A tungsten nucleation film is formed on a surface of a semiconductor substrate by alternatively providing to that surface, reducing gases and tungsten-containing gases. Each cycle of the method provides for one or more monolayers of the tungsten film. The film is conformal and has improved step coverage, even for a high aspect ratio contact hole.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: November 28, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Sang-Hyeob Lee, Karl B. Levy, Aaron R. Fellis, Panya Wongsenakhum, Juwen Gao, Joshua Collins, Kaihan A. Ashtiani, Junghwan Sung, Lana Hiului Chan
  • Patent number: 6887781
    Abstract: Electronic components such as semiconductor wafer VLSI and ULSI integrated circuit devices are provided having a robust barrier layer in the device interconnects. The robust barrier layer provides excellent step coverage, low resistance and enhanced adhesion to CVD copper and the interconnect has a double structure of a layer of a barrier material and a metal layer thereon. The metal layer is preferably tungsten and is formed by replacing silicon or other such atoms on the surface of the barrier layer with tungsten metal. A layer of silicon can be formed on the barrier layer, silicon atoms can be formed on the surface by reacting the barrier layer with a silicon containing reactant or a silicon containing barrier layer can be used.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: May 3, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Sang-Hyeob Lee, Sasangan Ramanathan
  • Publication number: 20050031786
    Abstract: A tungsten nucleation film is formed on a surface of a semiconductor substrate by alternatively providing to that surface, reducing gases and tungsten-containing gases. Each cycle of the method provides for one or more monolayers of the tungsten film. The film is conformal and has improved step coverage, even for a high aspect ratio contact hole.
    Type: Application
    Filed: August 26, 2003
    Publication date: February 10, 2005
    Inventors: Sang-Hyeob Lee, Karl Levy, Aaron Fellis, Panya Wongsenakhum, Juwen Gao, Joshua Collins, Kaihan Ashtiani, Junghwan Sung, Lana Chan
  • Patent number: 6844258
    Abstract: A method for creating a refractory metal and refractory metal nitride cap effective for reducing copper electromigration and copper diffusion is described. The method includes depositing a refractory metal nucleation layer and nitriding at least the upper portion of the refractory metal layer to form a refractory metal nitride. Methods to reduce and clean the copper lines before refractory metal deposition are also described. Methods to form a thicker refractory metal layer using bulk deposition are also described.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: January 18, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: James A. Fair, Robert H. Havemann, Jungwan Sung, Nerissa Taylor, Sang-Hyeob Lee, Mary Anne Plano
  • Patent number: 6635965
    Abstract: A tungsten nucleation film is formed on a surface of a semiconductor substrate by alternatively providing to that surface, reducing gases and tungsten-containing gases. Each cycle of the method provides for one or more monolayers of the tungsten film. The film is conformal and has improved step coverage, even for a high aspect ratio contact hole.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: October 21, 2003
    Assignee: Novellus Systems, Inc.
    Inventors: Sang-Hyeob Lee, Joshua Collins
  • Publication number: 20020081845
    Abstract: Electronic components such as semiconductor wafer VLSI and ULSI integrated circuit devices are provided having a robust barrier layer in the device interconnects. The robust barrier layer provides excellent step coverage, low resistance and enhanced adhesion to CVD copper and the interconnect has a double structure of a layer of a barrier material and a metal layer thereon. The metal layer is preferably tungsten and is formed by replacing silicon or other such atoms on the surface of the barrier layer with tungsten metal. A layer of silicon can be formed on the barrier layer, silicon atoms can be formed on the surface by reacting the barrier layer with a silicon containing reactant or a silicon containing barrier layer can be used.
    Type: Application
    Filed: December 27, 2000
    Publication date: June 27, 2002
    Applicant: Novellus Systems, Inc.
    Inventors: Sang-Hyeob Lee, Sasangan Ramanathan
  • Patent number: 6358789
    Abstract: A semiconductor device for use in a memory cell includes an active matrix, a capacitor structure, formed on top of the active matrix, an intermediate dielectric (IMD) layer formed on the capacitor structure and a barrier layer formed on the IMD layer, wherein the barrier layer includes a TiO2 layer and an Al2O3 layer. Since the Al2O3 layer is obtained by oxidizing the Ti1-xAlxN layer, the Al2O3 layer has a structure very dense. Therefore, the barrier layer prevents a capacitor structure from hydrogen damages caused by the formation of another IMD layer or a passivation layer during the following processes.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: March 19, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Sang-Hyeob Lee
  • Patent number: 6323083
    Abstract: A method for forming a lower electrode structure of a capacitor of a semiconductor device, includes the steps of: forming an active region in a semiconductor substrate; forming an insulation layer atop the semiconductor substrate having the active region formed therein; forming a contact hole in the insulation layer, the contact hole exposing the active region; forming a conductive plug connected to the active region through the contact hole, the conductive plug having an upper contact surface; forming a silicide contact on the upper contact surface of the conductive plug; forming a lower electrode layer in electrical contact with the silicide contact, by depositing titanium aluminum nitride on the insulation layer; and patterning the lower electrode layer to form a lower electrode having an upper surface. A natural oxide film is prevented from generating between the interface of the plug and the lower electrode.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: November 27, 2001
    Assignee: Hyundai Electronic Industries Co., Ltd.
    Inventors: Dae-gyu Park, Sang-hyeob Lee
  • Patent number: 6258725
    Abstract: There is provided a method for forming a metal line of a semiconductor device, in which a (TiAl)N layer having a lower reflectivity and permeability is formed as anti-reflective coating layer. Since the (TiAl)N anti-reflective coating layer effectively prevent a metal line from reflecting in lightening process using a shorter wavelength such as DUV, a fine metal line can be formed exactly.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: July 10, 2001
    Assignee: Yundai Electronics Industries Co., Ltd.
    Inventors: Sang Hyeob Lee, Young Jung Kim
  • Publication number: 20010005609
    Abstract: A semiconductor device for use in a memory cell includes an active matrix, a capacitor structure, formed on top of the active matrix, an intermediate dielectric (IMD) layer formed on the capacitor structure and a barrier layer formed on the IMD layer, wherein the barrier layer includes a TiO2 layer and an Al2O3 layer. Since the Al2O3 layer is obtained by oxidizing the Ti1-xAlxN layer, the Al2O3 layer has a structure very dense. Therefore, the barrier layer prevents a capacitor structure from hydrogen damages caused by the formation of another IMD layer or a passivation layer during the following processes.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 28, 2001
    Applicant: HYUNDAI ELECTRONICS INDUSTRIES CO., LTD.
    Inventor: Sang-Hyeob Lee
  • Patent number: 6184113
    Abstract: The present invention relates to a method for manufacturing a semiconductor device having a gate electrode (e.g. tungsten gate electrode) of low resistivity. In the method for manufacturing a semiconductor device, a conductive sacrifice polysilicon pattern is formed on a gate insulating film and then a first interlayer insulating film is deposited. The first interlayer insulating film is blank-etched so as to expose the surface of the sacrifice polysilicon pattern and then the exposed sacrifice polysilicon pattern is etched to form a recessed profile, in which, in the recessed portion, a predetermined thickness of sacrifice polysilicon pattern remains. On the surface of the remnant sacrifice polysilicon pattern in the recessed portion a metal film (e.g. a tungsten film) is selectively deposited. When selectively depositing of the metal film, most of remnant sacrifice polysilicon pattern is consumed.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: February 6, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Hwan Seok Seo, Sang Hyeob Lee
  • Patent number: 6171941
    Abstract: A method for fabricating a capacitor of a semiconductor memory device includes forming a titanium aluminum nitride layer, satisfying Ti1-xAlxN, where x<1, as a diffusion inhibiting film on a platinum upper layer for forming the capacitor's upper electrode.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: January 9, 2001
    Assignee: Hyundai Electronic Industries Co., Ltd.
    Inventors: Dae-gyu Park, Sang-hyeob Lee
  • Patent number: 6087259
    Abstract: A bit line of a semiconductor device capable of obtaining low line resistance and low contact resistance, thereby achieving an improvement in the operating speed and reliability of the semiconductor device. The bit line has a multilayer structure including a Ti film, an MOCVD-TiN film and a W film sequentially formed over the semiconductor substrate. The MOCVD-TiN film serves as a diffusion barrier to suppress a reaction of tungsten, which forms the bit line, with silicon existing on a contact region during a thermal process at a high temperature such as a BPSG reflow.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: July 11, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Sang Hyeob Lee
  • Patent number: 5918142
    Abstract: A method for fabricating a semiconductor device, wherein, when a blanket of the planarization layer is deposited and thermally treated for its reflow after the formation of a metal gate electrode consisting of a CVD-TiN layer pattern and a W layer pattern on a semiconductor substrate, a gate oxide is formed at the interface between the CVD-TiN layer and the semiconductor substrate by the reaction of the moisture absorbed in the CVD-TiN layer with the Si of the substrate, without executing an additional process and, thus, the stress between the gate oxide and the metal layer is not high, so that the gate oxide can be prevented from being degraded, and the production yield and the reliability of device operation is improved.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: June 29, 1999
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Heung Lak Park, Sang Hyeob Lee