Patents by Inventor Sang Hyouk Choi
Sang Hyouk Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11885040Abstract: Some aspects relate to methods of forming an epitaxial layer. In some examples, the methods include ejecting atoms from a molten metal sputtering material onto a heated crystalline substrate and growing a single epitaxial layer on the substrate from the ejected atoms, where the atoms are ejected with sufficient energy that the grown epitaxial layer has at least a partial rhombohedral lattice, and wherein the crystalline substrate is heated to a temperature of about 600 degrees Celsius or less, or about 500 degrees or less. Other aspects relate to materials, such as a material including a single epitaxial layer on top of a crystalline substrate, the layer including one or more semiconductor materials and having at least a partial rhombohedral lattice, or a substantially rhombohedral lattice.Type: GrantFiled: December 8, 2020Date of Patent: January 30, 2024Assignee: United States of America as represented by the Administrator of NASAInventors: Hyun Jung Kim, Sang Hyouk Choi
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Patent number: 11581104Abstract: The present disclosure is directed to nuclear thermionic avalanche cell (NTAC) systems and related methods of generating energy from captured high energy photons. Huge numbers of electrons in the intra-band of atom can be liberated through bound-to-free transition when coupled with high energy photons. If a power conversion process effectively utilizes these liberated electrons in an avalanche form through a power conversion circuit, the power output will be drastically increased. The power density of a system can be multiplied by the rate of high energy photon absorption. The present disclosure describes a system and methods built with multilayers of nuclear thermionic avalanche cells for the generation of energy. The multilayer structure of NTAC devices offers effective recoverable means to capture and harness the energy of gamma photons for useful purposes such as power systems for deep space exploration.Type: GrantFiled: May 21, 2020Date of Patent: February 14, 2023Assignee: UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF NASAInventors: Sang Hyouk Choi, Dennis M. Bushnell, Adam J. Duzik
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Publication number: 20210123158Abstract: Some aspects relate to methods of forming an epitaxial layer. In some examples, the methods include ejecting atoms from a molten metal sputtering material onto a heated crystalline substrate and growing a single epitaxial layer on the substrate from the ejected atoms, where the atoms are ejected with sufficient energy that the grown epitaxial layer has at least a partial rhombohedral lattice, and wherein the crystalline substrate is heated to a temperature of about 600 degrees Celsius or less, or about 500 degrees or less. Other aspects relate to materials, such as a material including a single epitaxial layer on top of a crystalline substrate, the layer including one or more semiconductor materials and having at least a partial rhombohedral lattice, or a substantially rhombohedral lattice.Type: ApplicationFiled: December 8, 2020Publication date: April 29, 2021Inventors: Hyun Jung Kim, Sang Hyouk Choi
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Patent number: 10858754Abstract: Some aspects relate to methods of forming an epitaxial layer. In some examples, the methods include ejecting atoms from a molten metal sputtering material onto a heated crystalline substrate and growing a single epitaxial layer on the substrate from the ejected atoms, where the atoms are ejected with sufficient energy that the grown epitaxial layer has at least a partial rhombohedral lattice, and wherein the crystalline substrate is heated to a temperature of about 600 degrees Celsius or less, or about 500 degrees or less. Other aspects relate to materials, such as a material including a single epitaxial layer on top of a crystalline substrate, the layer including one or more semiconductor materials and having at least a partial rhombohedral lattice, or a substantially rhombohedral lattice.Type: GrantFiled: November 22, 2016Date of Patent: December 8, 2020Assignee: UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF NASAInventors: Hyun Jung Kim, Sang Hyouk Choi
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Publication number: 20200373035Abstract: The present disclosure is directed to nuclear thermionic avalanche cell (NTAC) systems and related methods of generating energy from captured high energy photons. Huge numbers of electrons in the intra-band of atom can be liberated through bound-to-free transition when coupled with high energy photons. If a power conversion process effectively utilizes these liberated electrons in an avalanche form through a power conversion circuit, the power output will be drastically increased. The power density of a system can be multiplied by the rate of high energy photon absorption. The present disclosure describes a system and methods built with multilayers of nuclear thermionic avalanche cells for the generation of energy. The multilayer structure of NTAC devices offers effective recoverable means to capture and harness the energy of gamma photons for useful purposes such as power systems for deep space exploration.Type: ApplicationFiled: May 21, 2020Publication date: November 26, 2020Inventors: Sang Hyouk Choi, Dennis M. Bushnell, Adam J. Duzik
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Publication number: 20190308745Abstract: The present invention provides a method of controlling an unmanned aerial vehicle by a system for controlling a mission of the unmanned aerial vehicle on the basis of a user position. Herein the method includes acquiring information related to a position of the terminal; performing authentication for the unmanned aerial vehicle on the basis of the information related to the position of the terminal; and, when the authentication is completed, transmitting the information related to the position of the terminal to the unmanned aerial vehicle.Type: ApplicationFiled: April 4, 2019Publication date: October 10, 2019Applicant: Electronics and Telecommunications Research Instit uteInventors: Myung Seok KI, Sang Hyouk CHOI, Yun Su BOK, Ji Hwan SON, Jeong Hwan LEE, Ji Hun CHA, Jae Young AHN
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Patent number: 10389023Abstract: A method for receiving a signal by using M multiple beams in a multi-antenna system including N antenna elements, is provided in and embodiment of the present application. The method includes setting, by M beams, a beam direction for the M beams and a modulation frequency for frequency modulation of a beam response and generating the M beams according to the beam direction and the modulation frequency set by the beams. M beam responses are generated for a receiving signal by using the generated M beams and the generated M beam responses are frequency modulated by using the modulation frequency set by the beams. The frequency-modulated M beam responses are band-pass filtered so as to separate the M beam responses and the separated M beam responses are respectively demodulated.Type: GrantFiled: November 6, 2014Date of Patent: August 20, 2019Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and TechnologyInventors: Sang-Hyouk Choi, Yong-Hoon Kim, Hee-Seong Yang, Joo-Hwan Chun
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Publication number: 20190227159Abstract: Disclosed is a method of sensing illegal flight of a low-flying drone. Here, the method of sensing illegal flight includes: changing a direction of a beam on the basis of a preset period; and detecting an object by using the beam changed on the basis of the preset period. Here, the direction of the beam is changed on the basis of a first direction and a second direction. The first direction is changed on the basis of conversion of a center frequency, and the second direction is changed on the basis of a phase and a particular value.Type: ApplicationFiled: January 22, 2019Publication date: July 25, 2019Applicant: Electronics and Telecommunications Research InstituteInventors: Sang Hyouk CHOI, Jae Young AHN, Man Seok UHM, Jong Suk CHAE
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Patent number: 10269463Abstract: Systems, methods, and devices of the various embodiments described herein enable an energy conversion system comprising a radioactive element for generating conduction-band electrons in an avalanche cell and generating heat, wherein the conduction-band electrons are provided to an anode to generate avalanche cell power, and the heat is provided to a thermoelectric generator to generate thermoelectric power. In an embodiment, the avalanche cell is irradiated with gamma rays, which excite electrons within the avalanche cell, generating a current. In an additional embodiment, the thermoelectric power and avalanche cell power can comprise a dual power system.Type: GrantFiled: February 3, 2016Date of Patent: April 23, 2019Assignee: The United States of America as represented by the Administrator of NASAInventors: Sang Hyouk Choi, Kunik Lee
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Patent number: 10256305Abstract: An electronic device includes a trigonal crystal substrate defining a (0001) C-plane. The substrate may comprise Sapphire or other suitable material. A plurality of rhombohedrally aligned SiGe (111)-oriented crystals are disposed on the (0001) C-plane of the crystal substrate. A first region of material is disposed on the rhombohedrally aligned SiGe layer. The first region comprises an intrinsic or doped Si, Ge, or SiGe layer. The first region can be layered between two secondary regions comprising n+doped SiGe or n+doped Ge, whereby the first region collects electrons from the two secondary regions.Type: GrantFiled: March 3, 2017Date of Patent: April 9, 2019Assignee: The United States of America as represented by the Administrator of NASAInventors: Sang Hyouk Choi, Yeonjoon Park, Glen C. King, Hyun-Jung Kim, Kunik Lee
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Patent number: 10096472Abstract: Various embodiments may provide a low temperature (i.e., less than 850° C.) method of Silicon-Germanium (SiGe) on sapphire (Al2O3) (SiGe/sapphire) growth that may produce a single crystal film with less thermal loading effort to the substrate than conventional high temperature (i.e., temperatures above 850° C.) methods. The various embodiments may alleviate the thermal loading requirement of the substrate, which in conventional high temperature (i.e., temperatures above 850° C.) methods had surface temperatures within the range of 850° C.-900° C. The various embodiments may provide a new thermal loading requirement of the sapphire substrate for growing single crystal SiGe on the sapphire substrate in the range of about 450° C. to about 500° C.Type: GrantFiled: December 21, 2016Date of Patent: October 9, 2018Assignee: The United States of America as represented by the Administrator of NASAInventors: Sang Hyouk Choi, Adam J. Duzik
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Patent number: 9835570Abstract: An X-ray defraction (XRD) characterization method for sigma=3 twin defects in cubic semiconductor (100) wafers includes a concentration measurement method and a wafer mapping method for any cubic tetrahedral semiconductor wafers including GaAs (100) wafers and Si (100) wafers. The methods use the cubic semiconductor's (004) pole figure in order to detect sigma=3/{111} twin defects. The XRD methods are applicable to any (100) wafers of tetrahedral cubic semiconductors in the diamond structure (Si, Ge, C) and cubic zinc-blend structure (InP, InGaAs, CdTe, ZnSe, and so on) with various growth methods such as Liquid Encapsulated Czochralski (LEC) growth, Molecular Beam Epitaxy (MBE), Organometallic Vapor Phase Epitaxy (OMVPE), Czochralski growth and Metal Organic Chemical Vapor Deposition (MOCVD) growth.Type: GrantFiled: September 12, 2014Date of Patent: December 5, 2017Assignee: The United States of America as represented by the Administrator of NASAInventors: Yeonjoon Park, Hyun Jung Kim, Jonathan R. Skuza, Kunik Lee, Glen C. King, Sang Hyouk Choi
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Patent number: 9824885Abstract: One aspect of the present invention is a double sided hybrid crystal structure including a trigonal Sapphire wafer containing a (0001) C-plane and having front and rear sides. The Sapphire wafer is substantially transparent to light in the visible and infrared spectra, and also provides insulation with respect to electromagnetic radio frequency noise. A layer of crystalline Si material having a cubic diamond structure aligned with the cubic <111> direction on the (0001) C-plane and strained as rhombohedron to thereby enable continuous integration of a selected (SiGe) device onto the rear side of the Sapphire wafer. The double sided hybrid crystal structure further includes an integrated III-Nitride crystalline layer on the front side of the Sapphire wafer that enables continuous integration of a selected III-Nitride device on the front side of the Sapphire wafer.Type: GrantFiled: September 13, 2016Date of Patent: November 21, 2017Assignee: The Unites States of America as represented by the Administrator of NASAInventors: Yeonjoon Park, Sang Hyouk Choi
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Patent number: 9711680Abstract: An integrated hybrid crystal Light Emitting Diode (“LED”) display device that may emit red, green, and blue colors on a single wafer. The various embodiments may provide double-sided hetero crystal growth with hexagonal wurtzite III-Nitride compound semiconductor on one side of (0001) c-plane sapphire media and cubic zinc-blended III-V or II-VI compound semiconductor on the opposite side of c-plane sapphire media. The c-plane sapphire media may be a bulk single crystalline c-plane sapphire wafer, a thin free standing c-plane sapphire layer, or crack-and-bonded c-plane sapphire layer on any substrate. The bandgap energies and lattice constants of the compound semiconductor alloys may be changed by mixing different amounts of ingredients of the same group into the compound semiconductor. The bandgap energy and lattice constant may be engineered by changing the alloy composition within the cubic group IV, group III-V, and group II-VI semiconductors and within the hexagonal III-Nitrides.Type: GrantFiled: September 13, 2016Date of Patent: July 18, 2017Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Yeonjoon Park, Sang Hyouk Choi
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Publication number: 20170179233Abstract: An electronic device includes a trigonal crystal substrate defining a (0001) C-plane. The substrate may comprise Sapphire or other suitable material. A plurality of rhombohedrally aligned SiGe (111)-oriented crystals are disposed on the (0001) C-plane of the crystal substrate. A first region of material is disposed on the rhombohedrally aligned SiGe layer. The first region comprises an intrinsic or doped Si, Ge, or SiGe layer. The first region can be layered between two secondary regions comprising n+doped SiGe or n+doped Ge, whereby the first region collects electrons from the two secondary regions.Type: ApplicationFiled: March 3, 2017Publication date: June 22, 2017Inventors: Sang Hyouk Choi, Yeonjoon Park, Glen C. King, Hyun-Jung Kim, Kunik Lee
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Publication number: 20170178903Abstract: Various embodiments may provide a low temperature (i.e., less than 850° C.) method of Silicon-Germanium (SiGe) on sapphire (Al2O3) (SiGe/sapphire) growth that may produce a single crystal film with less thermal loading effort to the substrate than conventional high temperature (i.e., temperatures above 850° C.) methods. The various embodiments may alleviate the thermal loading requirement of the substrate, which in conventional high temperature (i.e., temperatures above 850° C.) methods had surface temperatures within the range of 850° C.-900° C. The various embodiments may provide a new thermal loading requirement of the sapphire substrate for growing single crystal SiGe on the sapphire substrate in the range of about 450° C. to about 500° C.Type: ApplicationFiled: December 21, 2016Publication date: June 22, 2017Inventors: Sang Hyouk Choi, Adam J. Duzik
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Publication number: 20170145589Abstract: Some aspects relate to methods of forming an epitaxial layer. In some examples, the methods include ejecting atoms from a molten metal sputtering material onto a heated crystalline substrate and growing a single epitaxial layer on the substrate from the ejected atoms, where the atoms are ejected with sufficient energy that the grown epitaxial layer has at least a partial rhombohedral lattice, and wherein the crystalline substrate is heated to a temperature of about 600 degrees Celsius or less, or about 500 degrees or less. Other aspects relate to materials, such as a material including a single epitaxial layer on top of a crystalline substrate, the layer including one or more semiconductor materials and having at least a partial rhombohedral lattice, or a substantially rhombohedral lattice.Type: ApplicationFiled: November 22, 2016Publication date: May 25, 2017Inventors: Hyun Jung Kim, Sang Hyouk Choi
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Patent number: 9634750Abstract: A beamforming method is provided. The beamforming method includes determining different beams for pieces of user equipment based on channel information fed back from the pieces of user equipment, predicting beam qualities of the pieces of user equipment for the beams, determining whether the beam qualities satisfy Quality of Service (QoS) for the pieces of user equipment, generating a wide nulling beam by applying wide nulling to a second beam having a side lobe acting as interference against one first beam, when the beam quality of the first beam does not satisfy the QoS; predicting beam qualities for the beams including the wide nulling beam instead of the second beam, and simultaneously communicating with the user equipment through the beams including the wide nulling beam instead of the second beam, when the beam qualities for the beams including the wide nulling beam instead of the second beam satisfy the QoS.Type: GrantFiled: March 27, 2015Date of Patent: April 25, 2017Assignees: Samsung Electronics Co., Ltd., Korea Advanced Insitute Of Science and TechnologyInventors: Se-Min Kwak, Yong-Hoon Kim, Hee-Seong Yang, Sang-Hyouk Choi, Joo-Hwan Chun
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Patent number: 9614026Abstract: An electronic device includes a trigonal crystal substrate defining a (0001) C-plane. The substrate may comprise Sapphire or other suitable material. A plurality of rhombohedrally aligned SiGe (111)-oriented crystals are disposed on the (0001) C-plane of the crystal substrate. A first region of material is disposed on the rhombohedrally aligned SiGe layer. The first region comprises an intrinsic or doped Si, Ge, or SiGe layer. The first region can be layered between two secondary regions comprising n+doped SiGe or n+doped Ge, whereby the first region collects electrons from the two secondary regions.Type: GrantFiled: March 10, 2014Date of Patent: April 4, 2017Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Sang Hyouk Choi, Yeonjoon Park, Glen C. King, Hyun-Jung Kim, Kunik Lee
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Publication number: 20170004962Abstract: One aspect of the present invention is a double sided hybrid crystal structure including a trigonal Sapphire wafer containing a (0001) C-plane and having front and rear sides. The Sapphire wafer is substantially transparent to light in the visible and infrared spectra, and also provides insulation with respect to electromagnetic radio frequency noise. A layer of crystalline Si material having a cubic diamond structure aligned with the cubic <111> direction on the (0001) C-plane and strained as rhombohedron to thereby enable continuous integration of a selected (SiGe) device onto the rear side of the Sapphire wafer. The double sided hybrid crystal structure further includes an integrated III-Nitride crystalline layer on the front side of the Sapphire wafer that enables continuous integration of a selected III-Nitride device on the front side of the Sapphire wafer.Type: ApplicationFiled: September 13, 2016Publication date: January 5, 2017Inventors: Yeonjoon Park, Sang Hyouk Choi