Patents by Inventor Sang-Hyuk An

Sang-Hyuk An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960408
    Abstract: A unit page buffer block includes first to fourth page buffer pairs. Each of the page buffer pairs includes a common column decoder block; and an upper page buffer stage and a lower page buffer stage electrically and commonly connected to the common column decoder block. Each of the upper page buffer stages includes an upper selection block; an upper latch block; and an upper cache block. Each of the lower page buffer stage includes a lower selection block; a lower latch block; and a lower cache block. Each of the upper selection blocks includes first to fourth sub-selection blocks. Each of the upper and lower latch blocks includes first to twelfth upper sub-latch blocks. Each of the upper and lower cache blocks includes first to twelfth upper sub-cache blocks. Each of the common column decoder block includes first to third sub-common column decoder blocks arranged in a row direction.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: April 16, 2024
    Assignee: SK HYNIX INC.
    Inventors: Dong Hyuk Kim, Tae Sung Park, Sang Hyun Sung, Sung Lae Oh, Soo Nam Jung
  • Patent number: 11953023
    Abstract: The present disclosure relates to a two-vane pump for wastewater and a design method of a two-vane pump for wastewater using machine learning, and more particularly, a design method of a two-vane pump using machine learning capable of having efficiency of a target head and performing optimal design for sizes of solids that can pass through and a two-vane pump for wastewater according to the machine learning.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: April 9, 2024
    Assignee: Korea Institute of Industrial Technology
    Inventors: Jin Hyuk Kim, Sung Kim, Sang Bum Ma
  • Publication number: 20240113152
    Abstract: A display apparatus can include a substrate having a penetrating area and a separating area, the penetrating area including a substrate hole, a first buffer layer having a first-buffer lower layer, and a first-buffer upper layer, a first thin film transistor including a first semiconductor pattern, a first gate electrode, and a first source electrode and a first drain electrode, a first interlayer insulating film; a second interlayer insulating film, an opening extending through the second interlayer insulating film, the first interlayer insulating film, the first gate insulating film and the first-buffer upper layer, and a separation structure in the opening, the separation structure including a first separation layer having a same stacked structure as the first-buffer upper layer, a second separation layer having a same stacked structure as the first gate insulating film, and a third separation layer having a same stacked structure as the first gate electrode.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 4, 2024
    Applicant: LG Display Co., Ltd.
    Inventors: Dong-Il CHU, Min-Joo KIM, Jae-Won LEE, Sang-Hoon PAK, Sang-Hyuk WON, Seung-Hyun YOUK, Seon-Hee LEE
  • Patent number: 11949012
    Abstract: A semiconductor device including: a first transistor which include a first gate stack on a substrate; and a second transistor which includes a second gate stack on the substrate, wherein the first gate stack includes a first ferroelectric material layer disposed on the substrate, a first work function layer disposed on the first ferroelectric material layer and a first upper gate electrode disposed on the first work function layer, wherein the second gate stack includes a second ferroelectric material layer disposed on the substrate, a second work function layer disposed on the second ferroelectric material layer and a second upper gate electrode disposed on the second work function layer, wherein the first work function layer includes the same material as the second work function layer, and wherein an effective work function of the first gate stack is different from an effective work function of the second gate stack.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: April 2, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Ho Park, Wan Don Kim, Weon Hong Kim, Hyeon Jun Baek, Byoung Hoon Lee, Jeong Hyuk Yim, Sang Jin Hyun
  • Publication number: 20240101740
    Abstract: A curable composition is capable of forming a thick film having excellent curing characteristics even at a relatively low temperature and is capable of securing an excellent level of thermal conductivity as well as a desired level of appropriate adhesion force while having fast curing characteristics. A battery pack to which the curable composition is applied, and a device comprising the battery pack are also provided.
    Type: Application
    Filed: October 7, 2022
    Publication date: March 28, 2024
    Applicant: LG Chem, Ltd.
    Inventors: Bethy Kim, Je Sik Jung, Sang Hyuk Seo, Sung Bum Hong, Sol Yi Lee
  • Publication number: 20240107609
    Abstract: A method, performed by a user equipment (UE), of transmitting and receiving signals in a wireless communication system, according to an embodiment, includes receiving a logical channel release request from a next-generation node B (gNB), determining a logical channel to release, an operation mode of the logical channel to release, and whether a packet data convergence protocol (PDCP) layer apparatus connected to the logical channel is re-established, based on the logical channel release request, and performing PDCP data recovery based on the determination result.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Inventors: Dong gun KIM, Sang Bum KIM, Soeng Hun KIM, Alexander SAYENKO, Jae Hyuk JANG, Seung Ri JIN
  • Publication number: 20240092951
    Abstract: The present disclosure relates to a photo-curable composition, a cured product thereof, and an optical member and a display device comprising same. The photo-curable composition has excellent low refractive index, light transmittance, and low haze characteristics by comprising a first olefinic monomer containing fluorine, a second olefinic monomer having an absolute viscosity of 7 cP or less at 25° C., a photo-polymerization initiator, and an amine compound.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 21, 2024
    Inventors: Tai Hoon YEO, Hyoc Min YOUN, Sang Hoon LEE, Jong Hyuk PARK, Jea Young LEE, Ja Young KIM
  • Publication number: 20240099116
    Abstract: Provided is a method for preparing a perovskite crystal that improves the performance of a photovoltaic cell. One embodiment of the present disclosure provides a method for preparing a perovskite crystal, the method including: a step S1 of preparing a perovskite solution containing a perovskite precursor and a first polar aprotic solvent; and a step S2 of preparing a perovskite crystal by mixing the perovskite solution and an antisolvent, wherein the antisolvent includes a second polar aprotic solvent.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Inventors: Woo Sik Kim, Sang Hyuk Im, Tarak Nath Mandal, Jin Hyuck Heo
  • Publication number: 20240086345
    Abstract: A memory device includes a buffer die configured to receive a first broadcast command and a second broadcast command from an external device; and a plurality of core dies stacked on the buffer die. The plurality of core dies include: a first core die including a first processing circuit, a first memory cell array, a first command decoder configured to decode the first broadcast command, and a first data input/output circuit configured to output data of the first memory cell array to a common data input/output bus under control of the first command decoder; and a second core die including a second processing circuit, a second memory cell array, a second command decoder configured to decode the second broadcast command, and a second data input/output circuit configured to receive the data of the first memory cell array through the common data input/output bus under control of the second command decoder.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: SAMSUNG ELECTRONICS Co., LTD.
    Inventors: Sang-Hyuk KWON, Nam Sung KIM, Kyomin SOHN, Jaeyoun YOUN
  • Patent number: 11929487
    Abstract: A method of preparing a negative electrode for a lithium secondary battery, which includes forming a negative electrode mixture layer including a negative electrode active material on a negative electrode current collector, disposing lithium metal powder on at least a part of the negative electrode mixture layer, pressing the negative electrode mixture layer on which the lithium metal powder is disposed, wetting the pressed negative electrode mixture layer with a first electrolyte solution, and drying the wet negative electrode mixture layer. A battery including the negative electrode of the present invention has enhanced rapid charge/discharge characteristics and enhanced lifespan characteristics.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: March 12, 2024
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Oh Byong Chae, Sang Wook Woo, Je Young Kim, Yoon Ah Kang, Jun Hyuk Song
  • Publication number: 20240080713
    Abstract: Methods and apparatuses are provided in a wireless communication system. Packet data convergence protocol (PDCP) configuration information that configures a PDCP entity of the terminal to use an uplink data compression (UDC) is received from a base station. The PDCP entity generates a UDC header and a UDC data block, based on the PDCP configuration information. The PDCP entity ciphers the UDC header and the UDC data block. The PDCP entity generates PDCP data including a PDCP header, the ciphered UDC header and the ciphered UDC data block. The generated PDCP data is transmitted to the base station. A header compression is not configured in case that the UDC is configured.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 7, 2024
    Inventors: Sang Bum KIM, Soeng Hun KIM, Dong Gun KIM, Jae Hyuk JANG, Alexander SAYENKO, Seung Ri JIN
  • Publication number: 20240076127
    Abstract: Provided is a ceiling storage system capable of correcting a working position and constantly checking stability of a structure by detecting an amount of change in a facility. According to the ceiling storage system, a transport vehicle moves to an upper portion of a first storage area of a plurality of storage areas in a state of gripping an article, and the transport vehicle measures a first distance value between the transport vehicle and the first storage area using a distance sensor and measures a relative position value between the transport vehicle and the first storage area using a vision sensor, before unloading the article from the first storage area.
    Type: Application
    Filed: May 23, 2023
    Publication date: March 7, 2024
    Inventors: Sang Kyung LEE, Seung Gyu KANG, Hyun Jae KANG, Young Wook KIM, Sang A BANG, Yong-Jun AHN, Min Kyun LEE, Hyun Woo LEE, Jeong Hun LIM, Jun Hyuk CHANG
  • Patent number: 11923542
    Abstract: The present disclosure relates to a positive active material for a lithium rechargeable battery, a manufacturing method thereof, and a lithium rechargeable battery including the positive active material, and it provides a positive active material which is a lithium composite metal oxide including nickel, cobalt, and manganese, and either has orientation in a direction of with respect to an ND axis that is equal to or greater than 29% or has orientation in a direction of [120]+[210] with respect to an RD axis that is equal to or greater than 82% in the case of an EBSD analysis with a misorientation angle (?g) that is equal to or less than 30 degrees.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: March 5, 2024
    Assignee: RESEARCH INSTITUTE OF INDUSTRIAL SCIENCE & TECHNOLOGY
    Inventors: Jung Hoon Song, Geun Hwangbo, Sang Cheol Nam, Sang Hyuk Lee, Do Hyeong Kim, Hye Won Park
  • Publication number: 20240071910
    Abstract: A three-dimensional semiconductor device may comprise a first cell region, a second cell region, and a via plug region disposed between the first cell region and the second cell region; a word line stack disposed in the first cell region, the via plug region, and the second cell region, the word line stack including a plurality of word lines and a plurality of interlayer insulating layers which are alternately stacked; and a plurality of via plugs exclusively connected to the plurality of the word lines, respectively, by vertically penetrating through the word line stack in the via plug region. The via plugs may have an arrangement of a zigzag pattern in a row direction from a top view. The diameters of the via plugs may increase in the row direction.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Sung Lae OH, Sang Woo PARK, Dong Hyuk CHAE
  • Publication number: 20240072140
    Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Won Hyuk Lee, Jong Chul Park, Sang Duk Park, Hong Sik Shin, Do Haing Lee
  • Patent number: 11917818
    Abstract: A memory may include a first wafer, and a second wafer stacked on and bonded to the first wafer. The first wafer may include a cell structure including a memory cell array; and a first logic structure disposed under the cell structure, and including a row control circuit. The second wafer may include a second logic structure including a column control circuit.
    Type: Grant
    Filed: November 25, 2022
    Date of Patent: February 27, 2024
    Assignee: SK HYNIX INC.
    Inventors: Sung Lae Oh, Sang Woo Park, Dong Hyuk Chae, Ki Soo Kim
  • Publication number: 20240064979
    Abstract: A non-volatile memory device comprises a substrate, a mold structure that includes gate electrodes stacked on the substrate and mold insulating layers alternately stacked with the gate electrodes, a cell contact on the substrate, wherein the cell contact is electrically connected to a selection gate electrode of the gate electrodes and is not electrically connected to a non-selection gate electrode of the gate electrodes, an insulating ring on the substrate, wherein the insulating ring is between the non-selection gate electrode and a sidewall of the cell contact and is in contact with the non-selection gate electrode, and a high dielectric constant layer between respective ones of the gate electrodes and the mold insulating layers, wherein the insulating ring includes a first portion that overlaps the high dielectric constant layer in a vertical direction, and a second portion that does not overlap the high dielectric constant layer in the vertical direction.
    Type: Application
    Filed: May 2, 2023
    Publication date: February 22, 2024
    Inventors: Woo Jun Park, Kyung Hyun Kim, Kun-Woo Park, Jun-Youl Yang, Dong Woo Lee, Sang Hyuk Hong
  • Publication number: 20240063385
    Abstract: The present exemplary embodiments provide a positive electrode active material, a manufacturing method thereof, and a lithium secondary battery including the same. The positive electrode active material according to an exemplary embodiment is a metal oxide particle including a center and a surface portion positioned on the surface of the center, but the metal oxide particle is composed of a single particle, and the surface portion includes a film in which no peak is observed during XRD measurement.
    Type: Application
    Filed: December 13, 2021
    Publication date: February 22, 2024
    Applicants: POSCO Holdings Inc., RESEARCH INSTITUTE OF INDUSTRIAL SCIENCE & TECHNOLOGY
    Inventors: Sang Cheol NAM, Kwon Young CHOI, Jung Hoon SONG, Sang Hyuk LEE
  • Patent number: 11901552
    Abstract: The present disclosure relates to a positive active material for a lithium rechargeable battery and a lithium rechargeable battery including the same, which include a first compound represented by Chemical Formula 1 and a second compound represented by Chemical Formula 2, and a content of the first compound is 65 wt % or more based of the positive active material of 100 wt %. Lia1Nib1Coc1Mnd1M1e1M2f1O2-f1[??Chemical Formula 1] Lia2Nib2COc2Mnd2M3e2M4f2O2-f2[??Chemical Formula 2] Chemical Composition 1 and 2 of each composition and molar ratio is as defined in the specification. Each composition and molar ratio of Chemical Formula 1 and 2 is as defined in the specification.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: February 13, 2024
    Assignees: POSCO HOLDINGS INC., RESEARCH INSTITUTE OF INDUSTRIAL SCIENCE & TECHNOLOGY, POSCO FUTURE M CO., LTD.
    Inventors: Kwon Young Choi, Jong Il Park, Sang Cheol Nam, Sang Hyuk Lee
  • Patent number: 11901398
    Abstract: A display apparatus includes a substrate including a penetrating area including a substrate hole, and a separating area surrounding the penetrating area, a first buffer layer including a first-buffer lower layer on the substrate, and a first-buffer upper layer on the first-buffer lower layer, a first TFT including a first semiconductor pattern on the first-buffer upper layer, and a first gate electrode overlapping with the first semiconductor pattern under conditions that a first gate insulating film is interposed therebetween, and first source/drain electrodes connected to the first semiconductor pattern, a second TFT, a separation structure disposed in the separating area of the substrate while including a first separation layer having the same stacked structure as the first-buffer upper layer, a second separation layer having the same stacked structure as the first gate insulating film, and a third separation layer having the same stacked structure as the first gate electrode.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: February 13, 2024
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Dong-Il Chu, Min-Joo Kim, Jae-Won Lee, Sang-Hoon Pak, Sang-Hyuk Won, Seung-Hyun Youk, Seon-Hee Lee