Abstract: The present invention relates to protein tyrosine phosphatase (PTP) and a method for preparing the same, precisely, a method for expressing PTP active domain with high activity and stability without help of a fusion protein, by using computer based protein structure prediction technique. PTP prepared by the method of the present invention can be effectively used as a protein for high efficiency drug screening for the development of a novel drug, as an antigen protein for the construction of a selective antibody and as a protein for the studies of PTP structure and functions.

Abstract: The present invention relates to water-soluble photochromic compounds for labeling biomolecules and a method of detecting biomolecules using the same. More specifically, relates to water-soluble photochromic compounds for labeling biomolecules, in which a functional group rendering photochromic molecules water-soluble is linked to a functional group capable of binding to biomolecules, and a method of detecting biomolecules using the same. Because the disclosed water-soluble photochromic compounds exhibit the color corresponding to the wavelength of visible light range, they allow signals to be easily detected not only with an UV-VIS spectrophotometer but also visually. Accordingly, the photochromic compounds can be advantageously used in sensors for diagnosing diseases.

Abstract: In a method of manufacturing a semiconductor device, a recess is formed in an active region of a substrate. A gate insulation layer is formed in the first recess. A barrier layer is formed on the gate insulation layer. A preliminary nucleation layer having a first resistance is formed on the barrier layer. The preliminary nucleation layer is converted into a nucleation layer having a second resistance substantially smaller than the first resistance. A conductive layer is formed on the nucleation layer. The conductive layer, the nucleation layer, the barrier layer and the gate insulation layer are partially etched to form a buried gate structure including a gate insulation layer pattern, a barrier layer pattern, a nucleation layer pattern and a conductive layer pattern.

Abstract: An integrated circuit device includes a semiconductor substrate including an active region defined by an isolation region and having at least one trench therein, a gate insulating layer formed in the at least one trench, a gate electrode layer having a nano-crystalline structure disposed on the gate insulating layer and a word line on the gate electrode layer in the at least one trench. The device may further include a capping layer on the word line.

Abstract: The present invention relates to a method for preparing an protein monolayer using a peptide hybrid for protein immobilization, more precisely a peptide hybrid for protein immobilization which has improved solubility by introducing a PEG linker and a proper reaction group to the oligopeptide having specific affinity to selected types of proteins and is designed to provide enough space between solid substrates and proteins immobilized, whereby various solid substrates treated by the hybrid catch specific proteins effectively on. The peptide hybrid for protein immobilization of the present invention facilitates the control of orientation of an antibody on various solid surfaces and immobilization of various antibodies of different origins or having different isotypes with different affinity. Therefore, the surface treatment technique using the peptide hybrid of the invention can be effectively used for the production of various immunosensors and immune chips.

Abstract: The present invention relates to a cascade enzyme-linked immunosorbent assay, more precisely a cascade enzyme-linked immunosorbent assay using magnetic microparticles (MMPs) immobilized with the target antigen specific primary antibody and silica nanoparticles (SPs) immobilized with a cascade reaction initiator and the antigen-specific secondary antibody. When the method of the present invention is applied in the detection of an antigen in biosamples, the detection sensitivity can be significantly increased.

Abstract: The memory device includes a first tunnel insulation layer pattern on a semiconductor substrate, a second tunnel insulation layer pattern having an energy band gap lower than that of the first tunnel insulation layer pattern on the first tunnel insulation layer pattern, a charge trapping layer pattern on the second tunnel insulation layer pattern, a blocking layer pattern on the charge trapping layer pattern, and a gate electrode on the blocking layer pattern. The memory device further includes a source/drain region at an upper portion of the semiconductor substrate. The upper portion of the semiconductor substrate is adjacent to the first tunnel insulation layer pattern.

Abstract: A linear power amplifier system using pulse area modulation includes: an envelop/phase decomposer for decomposing an input signal into an envelop signal and a phase signal; a pulse area modulator for modulating the envelop signal such that an area of the modulated envelop signal is proportional to an amplitude of the envelop signal; a control signal generator for converting the modulated envelop signal into a control signal; an automatic gain adjuster for equalizing pulse height of the modulated envelop signal; a mixer for mixing the phase signal with the output of the automatic gain adjustor to produce a RF pulse train; a power amplifier for amplifying the RF pulse train, to generate an amplified RF pulse train; and a band pass filter for restoring the original input signal from the amplified RF pulse train. The output level of the power amplifier is controlled by the control signal.

Abstract: Disclosed is an apparatus and method of communicating data for a digital mobile station, and more particularly a data transmitting and receiving apparatus and method capable of transmitting and receiving graphic and/or data using a Short Message Service (SMS). According to the present invention, an SMS message comprises an SMS header field and an SMS user data field, wherein the SMS user data field comprises a data transmission header field and a data field. The data transmission header field comprises a code field to indicate one of plural types of data associated with data contained in the data field of the SMS user data field, a data transmitting and receiving apparatus and method capable of transmitting and receiving graphic and/or audio data using a Short Message Service (SMS). Further, an SMS message comprises an SMS header field and an SMS user data field, wherein the SMS user data field comprises a data transmission header field and a data field.

Abstract: Example embodiments provide a non-volatile semiconductor memory device and method of forming the same. The non-volatile memory device may include a tunnel insulation layer on a semiconductor substrate, a charge storage layer on the tunnel insulation layer, a first blocking insulation layer on the charge storage layer, and a gate electrode on the first blocking insulation layer, wherein the gate electrode includes aluminum and the first blocking insulation layer does not include aluminum.

Abstract: The memory device includes a first tunnel insulation layer pattern on a semiconductor substrate, a second tunnel insulation layer pattern having an energy band gap lower than that of the first tunnel insulation layer pattern on the first tunnel insulation layer pattern, a charge trapping layer pattern on the second tunnel insulation layer pattern, a blocking layer pattern on the charge trapping layer pattern, and a gate electrode on the blocking layer pattern. The memory device further includes a source/drain region at an upper portion of the semiconductor substrate, The upper portion of the semiconductor substrate is adjacent to the first tunnel insulation layer pattern.

Abstract: A semiconductor device may include a semiconductor substrate and first and second transistors. The first transistor may have a first gate structure on the semiconductor substrate, and the first gate structure may include a first gate insulating layer between a first gate electrode and the semiconductor substrate. The first gate insulating layer may include first and second dielectric materials with the second dielectric material having a greater dielectric constant than the first dielectric material. Moreover, the first gate electrode may be in contact with the second dielectric material. The second transistor may have a second gate structure on the semiconductor substrate, with the second gate structure including a second gate insulating layer between a second gate electrode and the semiconductor substrate. Related methods are also discussed.

Abstract: The present invention provides novel structure of light emitting material and an organic light emitting diode using the same.

Abstract: A display substrate includes a plurality of gate lines, a plurality of data lines, a gate signal-inputting unit, a first test unit, and a first dummy switching unit. The gate lines extend in a first direction. The data lines extend in a second direction intersected with the first direction. The gate signal-inputting unit is formed at a first end of each of the gate lines to apply gate signals to the gate lines. The first test unit is formed at a second end of each of the gate lines opposite to the first end applying a first test signal to the gate lines. The first dummy switching unit is formed between the gate signal-inputting unit and the first test unit and transferring the first test signal to the gate lines.

Abstract: Example embodiments relate to a gate electrode, a method of forming the gate electrode, a transistor having the gate electrode, a method of manufacturing the transistor, a semiconductor device having the transistor and a method of manufacturing the semiconductor device. The gate electrode may include an embossing structure including a metal or a metal compound and having a first work function and a conductive layer pattern having a second work function formed on the embossing structure. A work function of the gate electrode may be adjusted between a work function of the embossing structure and a work function of the conductive layer pattern formed on the embossing structure. An NMOS transistor and a PMOS transistor having different work functions respectively may be formed on a substrate.

Abstract: A semiconductor device includes a substrate divided into an NMOS region and a PMOS region, a first gate pattern formed on the PMOS region, and a second gate pattern formed on the NMOS region. The first gate pattern includes a first gate oxide layer pattern, a metal oxide layer pattern, a silicon nitride layer pattern and a first polysilicon layer pattern that are sequentially stacked. The second gate pattern includes a second oxide layer pattern and a second polysilicon layer pattern. Related methods are also provided.

Abstract: Disclosed is a gas cylinder, for improving sealing characteristics of the gas cylinder and improving convenience in manufacturing, including: a valve having a gas opening/closing pin at a through hole in its center, for intermittently passing a gas, and additionally having a valve dividing body seated on a groove approximately in a lower part of the through hole; a spindle to an upper inside of which the valve is inserted; and a piston inserted to an inside of an open cylinder of the spindle, and having, a step threshold formed at a predetermined distance from an upper end, to which an O-ring for maintaining sealing is fit, and having another step threshold ranging from a lower side of the step threshold to a lower end on an inner lateral surface of the piston, to which an O-ring is fit.

Abstract: The present invention relates to a column unit which connects a chair sheet to a base in which a wheel is installed. The present invention provides a column unit which comprises a base tube having a lower end portion vertically fixed to a base of a chair and having the hollow interior; a spindle having the interior filled with a pressure gas and divided to upper and lower chambers by a piston, an upper end portion of a piston rod being connected to the piston, a lower end portion of the piston rod being rotatably installed at the lower end portion of the inner side of the base tube, the upper and lower chambers are communicated by a bypass, a valve being installed at the bypass; and a guide sleeve installed between the base tube and the spindle and engaged with the spindle to be integrally moved upward and downward together with the spindle.

Abstract: A plasma processing apparatus effectively generates plasma in a large area by applying an external magnetic field generated by an electromagnet to the plasma in a direction which is not in parallel with a wall of a plasma container, such that the magnetic field diverge or converge in the vicinity of a work piece (for example, a wafer). The plasma processing apparatus includes a power supply to generate a high frequency power, an antenna to receive the high frequency power and to generate an electromagnetic field, a chamber to generate the plasma using power generated through the electromagnetic field, and a coil provided on a side wall of the chamber to disrupt a uniformity of the electromagnetic field within the chamber.

Abstract: Disclosed is a compound of Formula 1 and an organic light emitting device using the same. In Formula 1, R1, R2, and R3 each independently is selected from the group consisting of a phenyl group, an 1-naphthyl group, a 2-naphthyl group, and a pyrene.