Abstract: Method for manufacturing a semiconductor device includes the steps of forming a lower electrode pattern on a substrate, forming a first interlayer insulating layer on the lower electrode pattern, forming an upper electrode pattern on the first interlayer insulating layer, forming a second interlayer insulating layer on the upper electrode pattern, forming an etch blocking layer on a side of the upper electrode pattern, wherein the etch blocking layer passes through the first interlayer insulating layer, forming a cavity which exposes the side of the etch blocking layer by etching the second interlayer insulating layer, and forming a contact ball in the cavity.

Abstract: Method for manufacturing a semiconductor device includes the steps of forming a lower electrode pattern on a substrate, forming a first interlayer insulating layer on the lower electrode pattern, forming an upper electrode pattern on the first interlayer insulating layer, forming a second interlayer insulating layer on the upper electrode pattern, forming an etch blocking layer on a side of the upper electrode pattern, wherein the etch blocking layer passes through the first interlayer insulating layer, forming a cavity which exposes the side of the etch blocking layer by etching the second interlayer insulating layer, and forming a contact ball in the cavity.

Abstract: A method for manufacturing an image sensor including forming a microlens array over a color filter array, forming a capping layer over the semiconductor substrate including the microlens array, forming a pad mask over the capping layer, and then exposing a pad in an interlayer dielectric layer.

Abstract: An image sensor and a method of manufacturing an image sensor. A method of manufacturing an image sensor may include forming an interconnection and/or an interlayer dielectric over a semiconductor substrate including circuitry connected to an interconnection. A method of manufacturing an image sensor may include forming a photodiode having a first doping layer and/or a second doping layer over an interlayer dielectric, and forming a via hole through a photodiode, which may expose a portion of a surface of an interconnection. A method of manufacturing an image sensor may include forming a barrier pattern over a via hole which may cover an exposed surface of a second doping layer, and a contact plug on and/or over a via hole, which may connect an interconnection and a first doping layer. An upper portion of a contact plug may be etched. An insulating layer may be formed over a contact plug.

Abstract: A metal interconnection of semiconductor device and method for fabricating the same is provided. The semiconductor device can include a semiconductor substrate formed with device structures such as transistors. An interlayer dielectric layer can be formed on the semiconductor substrate with a metal interconnection formed therethrough. A spacer can be formed on at least a portion of a sidewall of the metal interconnection. A diffusion barrier can be formed on an upper surface of the metal interconnection.

Abstract: An image sensor including an interlayer dielectric layer formed over a semiconductor substrate, a color filter layer formed over the interlayer dielectric layer, a planarization layer formed over the color filter, and a microlens array having a gapless, continuous shape and a multilayered structure formed over the planarization layer.

Abstract: An image sensor and fabricating method thereof which reduces a light intensity differential between a pixel center and a pixel edge and prevents crosstalk. The image sensor can include a plurality of convex lens provided within a passivation layer and in vertical alignment with a corresponding photodiode, each convex lens including a color filter; having a predetermined color array, and a plurality of microlens provided over the passivation layer and in vertical alignment with a corresponding color filer.

Abstract: An image sensor and method of manufacturing thereof are provided. In an embodiment, an image sensor can include a photodiode on a substrate, an interlayer dielectric formed on the substrate, an insulating layer micro-lens on the interlayer dielectric, and an organic micro-lens on the insulating layer micro-lens.

Abstract: A method for forming a trench isolation in a semiconductor device is provided. This is a novel method for rounding the top corners of trench isolations. The method ensures that rounded corner portions with a uniform shape are consistently formed regardless of the pattern densities of active areas. The method increases the reliability of semiconductor integrated circuit devices, without degrading electrical characteristics, and making it easier to achieve high integration and performance in semiconductor integrated circuit devices.

Abstract: An image sensor and method for manufacturing the same are provided. The image sensor can include a semiconductor substrate, a metal interconnection layer, a light-receiving unit, a lens-type upper electrode, and a color filter. The semiconductor substrate can include a circuit region. The metal interconnection layer can include a metal interconnection and an interlayer dielectric. The light-receiving unit can be a photodiode disposed on the metal interconnection layer. The lens-type upper electrode can be disposed on the light-receiving unit and formed in a convex lens shape. The color filter can be disposed on the lens-type upper electrode.

Abstract: A method of manufacturing a semiconductor device that may include steps of forming a pad oxide layer and an insulating layer on a semiconductor substrate; and then performing a first etching process on the semiconductor device to form an insulating layer pattern exposing a portion of the pad oxide layer in a trench area; and then performing a second etching process with respect to the pad oxide layer by using the insulating layer pattern as a mask; and then performing a blanket ion implantation process with respect to the insulating layer pattern and the exposed portion of the pad oxide layer to form an ion layer in the semiconductor substrate; and then performing a third etching process with respect to the semiconductor substrate to simultaneously form a pad oxide layer pattern and a trench in the semiconductor substrate; and then forming an insulating layer on the semiconductor substrate including the trench; and then performing a planarization process with respect to the semiconductor substrate including t

Abstract: An image sensor and a method of manufacturing the same capable of improving image quality by preventing the generation of a lens bridge formed due to a mutual connection of neighboring microlenses. The image sensor can include a semiconductor substrate having a plurality of photodiodes formed thereon; an insulation layer formed over the semiconductor substrate; a color filter layer formed over the insulation layer; a planarization layer formed over the whole surface including the color filter layer and having a plularity of concave regions and a convex regions repeatedly arranged in a pixel period; and a microlens formed over each of the concave regions and the convex regions.

Abstract: An image sensor and a method of manufacturing an image sensor. A method of manufacturing an image sensor may include forming an interconnection and/or an interlayer dielectric over a semiconductor substrate including circuitry connected to an interconnection. A method of manufacturing an image sensor may include forming a photodiode having a first doping layer and/or a second doping layer over an interlayer dielectric, and forming a via hole through a photodiode, which may expose a portion of a surface of an interconnection. A method of manufacturing an image sensor may include forming a barrier pattern over a via hole which may cover an exposed surface of a second doping layer, and a contact plug on and/or over a via hole, which may connect an interconnection and a first doping layer. An upper portion of a contact plug may be etched. An insulating layer may be formed over a contact plug.

Abstract: A method for manufacturing an image sensor according to an embodiment includes performing a plasma surface treatment on an oxide film microlens to mitigate high surface morphology. The image sensor can include a passivation layer on a substrate having a pad region and a pixel region and a color filter layer on the passivation layer. A first low temperature oxide can be formed over the substrate including the color filter layer; and an oxide film microlens can be formed on the first low temperature oxide layer. A portion of the first low temperature oxide layer can provide a seed microlens upon which a second low temperature oxide layer is formed to form the oxide film microlenses. The plasma surface treatment can then be applied with respect to the oxide film microlenses.

Abstract: An image sensor include an interlayer dielectric layer formed over a semiconductor substrate; a color filter array formed over the interlayer dielectric layer; a planarization layer formed over the color filter; and a microlens array having a continuous, gapless shape formed over the planarization layer and spatially corresponding to the color filter array. The microlens array is composed of a first dielectric layer and a second dielectric layer formed over the first dielectric layer.

Abstract: Provided is a method of fabricating a semiconductor device with a dual damascene pattern. According to the method, a diffusion barrier layer, dielectric, a capping layer, and an organic bottom anti-reflection coating (BARC) are sequentially formed on a substrate where a metal interconnection is formed. A photoresist pattern on the organic BARC is formed and the organic BARC, the capping layer, and the dielectric are selectively etched to form a trench using the photoresist pattern as a mask. The photoresist pattern and the organic BARC are removed, and a byproduct capping mask is formed by reacting the capping layer with a reaction gas to form a byproduct. A portion of the trench is filled with the byproduct. Then, a via hole is formed in the trench using the byproduct capping mask as a mask, and the byproduct capping mask, the diffusion barrier layer, and the capping layer are removed.

Abstract: A method for manufacturing a semiconductor device is provided. A first interlayer dielectric film can be formed on a semiconductor substrate, and a metal wire can be formed on the first interlayer dielectric film. A second interlayer dielectric film can be formed on the first interlayer dielectric film, including the metal wire. A photoresist pattern can be formed on the second interlayer dielectric film. The photoresist pattern can include a high pattern density region having a first plurality of openings, a low pattern density region having a second plurality of openings, and a dummy pattern region having a third plurality of openings. Via holes can be formed by etching the second interlayer dielectric film using the photoresist pattern as a mask.

Abstract: An image sensor and a manufacturing method thereof are provided. The image sensor can include a semiconductor substrate having a photodiode, an interlayer dielectric layer on the semiconductor substrate, and an upper insulating layer on the interlayer dielectric layer. A trench can be provided in the upper insulating layer and the interlayer dielectric layer over the photodiode, and the trench can have a curved sidewall. A lens color filter can be disposed in the trench.

Abstract: Methods for forming a contact hole in a semiconductor device are provided. An exposed portion of an isolation layer, which may be generated during a process of forming a borderless contact hole, can be covered with a material similar to that of the substrate.

Abstract: A semiconductor device and fabricating method thereof are disclosed. The method includes forming a first metal line over a substrate, forming a barrier layer over the substrate and the first metal line, forming an insulating layer on the barrier layer, forming a capping layer on the insulating layer, forming a photoresist pattern on the capping layer, implanting halogen ions into the insulating layer using the photoresist pattern as a mask, forming a via-hole exposing the first metal line by dry-etching the insulating layer using the photoresist pattern as an etch mask, and forming a second metal line in the via-hole in contact with the first metal line.