Abstract: Disclosed are a method for removing a photoresist layer and a method for forming a metal line using the same. The method for removing a photoresist pattern, including the steps of: forming a bottom layer on a substrate by using the photoresist pattern as a mask; and removing the photoresist pattern with use of a high density plasma (HDP) apparatus. The method for forming a metal line, including the steps of: preparing a semi-finished substrate including an inter-layer insulation layer; forming a photoresist pattern on the inter-layer insulation layer; forming an opening by etching the inter-layer insulation layer with use of the photoresist pattern as an etch mask; removing the photoresist pattern by using a high density plasma (HDP) apparatus; and forming the metal line by filling the opening with a predetermined material.

Abstract: The present invention relates to a method of forming a metal line in a semiconductor device, in which an etch-stopping layer is deposited between the interlayer insulation films and then over-etching is performed by using the etch-stopping layer as an etching barrier during the etching process for forming the subsequent trenches. Therefore, it is possible to restrain occurrence of parasitic spacers in the trenches.

Abstract: A method is provided for forming a conductive wire of a semiconductor device using, for example, a damascene process. A conductive wire, such as a metal wire, is formed, based on a notching phenomenon which occurs when the etching selectivity between a polycrystalline silicon layer and a lower film is approximately 5 to 500:1.

Abstract: Disclosed herein is a method of forming metal wirings of semiconductor devices a lower metal wiring is formed in a dual damascene pattern formed in an interlayer insulating film and is etched as much as a given thickness of the interlayer insulating film, thereby exposing the top of the lower metal wiring. A via plug is then formed on the exposed top of the lower metal wiring. Accordingly, even if alignment error is generated, increases of resistance, which is caused by contact of the via plug and the lower metal wiring through the sidewall of the projected lower metal wiring, can be prevented. Furthermore, reliability of a process and electrical properties of the devices can be improved.

Abstract: The present invention is provided to form a trench in a semiconductor device, wherein by performing an ion implanting process to an area of a semiconductor substrate in which the trench would be formed to cause lattice defects in the area before forming the trench, an etching speed of the area is increased in subsequent trench forming processes. As a result, it is possible to prevent micro trenches from being formed in edge portions of patterns and to suppress a micro loading effect to be generated depending upon pattern sizes.

Abstract: The present invention discloses an image sensor and a method for manufacturing the same which is capable of increasing the light-collection efficiency of a photodiode. The image sensor comprises: at least one photodiode formed on a semiconductor substrate; multilayer interlayer insulating films formed on the photodiode and stacked in at least two layers so that the density of the upper interlayer insulating film becomes lower than that of the lower interlayer insulating film as the multilayer interlayer insulating films proceed upward; a light shield layer and an element-protecting film sequentially stacked on the multilayer interlayer insulating film; color filter arrays and a flattening layer sequentially stacked on the element-protecting film; and microlenses arranged on the positions corresponding to the color filters on the flattening layer.

Abstract: A method is provided for forming a conductive wire of a semiconductor device using, for example, a damascene process. A conductive wire, such as a metal wire, is formed, based on a notching phenomenon which occurs when the etching selectivity between a polycrystalline silicon layer and a lower film is approximately 5 to 500:1.

Abstract: A method is provided for forming a conductive wire of a semiconductor device using, for example, a damascene process. A conductive wire, such as a metal wire, is formed, based on a notching phenomenon which occurs when the etching selectivity between a polycrystalline silicon layer and a lower film is approximately 5 to 500:1.

Abstract: A method is provided for forming a conductive wire of a semiconductor device using, for example, a damascene process. A conductive wire, such as a metal wire, is formed, based on a notching phenomenon which occurs when the etching selectivity between a polycrystalline silicon layer and a lower film is approximately 5 to 500:1.