Patents by Inventor Sang-Chul Lim
Sang-Chul Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240130950Abstract: Provided a liquid crystal composition including ceramide, a method of preparing the same, and a cosmetic composition including the same. According to a liquid crystal composition including various types of ceramide of an aspect and a method of preparing the same, the liquid crystal composition not only has high liquid crystal stability that liquid crystal is maintained even after 4 weeks at a high temperature, but also activities of increasing an amount of ceramide, increasing an expression level of aquaporin 3, increasing an amount of filaggrin, increasing an expression level of hyaluronic acid, increasing an expression level of loricrin, increasing an expression level of involucrin, and increasing a thickness of the skin, resulting in effects usefully available for amelioration of the skin conditions.Type: ApplicationFiled: April 3, 2023Publication date: April 25, 2024Applicant: Croda Korea LtdInventors: Ji Hye HAN, Sang Chul KIM, Mi Kyung SUNG, So Jung LIM, Seung Won PARK
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Publication number: 20240105991Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.Type: ApplicationFiled: January 21, 2022Publication date: March 28, 2024Inventors: Min Jung JANG, Min Goo KIM, Young Rok LIM, Ji Young CHOI, Sang Ho LEE, Wan Chul KANG, Jong Cheol YUN, Ji Seong HAN, Hee Jeong RYU, Jae Won CHUNG
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Publication number: 20240097190Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.Type: ApplicationFiled: January 21, 2022Publication date: March 21, 2024Inventors: Min Jung JANG, Min Goo KIM, Young Rok LIM, Ji Young CHOI, Sang Ho LEE, Wan Chul KANG, Jong Cheol YUN, Ji Seong HAN, Hee Jeong RYU, Jae Won CHUNG
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Publication number: 20240097189Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.Type: ApplicationFiled: January 21, 2022Publication date: March 21, 2024Inventors: Min Jung JANG, Min Goo KIM, Young Rok LIM, Ji Young CHOI, Sang Ho LEE, Wan Chul KANG, Jong Cheol YUN, Ji Seong HAN, Hee Jeong RYU, Jae Won CHUNG
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Publication number: 20240097188Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.Type: ApplicationFiled: January 21, 2022Publication date: March 21, 2024Inventors: Min Jung JANG, Min Goo KIM, Young Rok LIM, Ji Young CHOI, Sang Ho LEE, Wan Chul KANG, Jong Cheol YUN, Ji Seong HAN, Hee Jeong RYU, Jae Won CHUNG
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Patent number: 10629744Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.Type: GrantFiled: May 31, 2018Date of Patent: April 21, 2020Assignee: Electronics and Telecommunications Research InstituteInventors: Kyoung Ik Cho, Jae Bon Koo, Chan Woo Park, Bock Soon Na, Sang Seok Lee, Sang Chul Lim, Soon-Won Jung, Hye Yong Chu
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Publication number: 20180277684Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.Type: ApplicationFiled: May 31, 2018Publication date: September 27, 2018Applicant: Electronics and Telecommunications Research InstituteInventors: Kyoung Ik CHO, Jae Bon KOO, Chan Woo PARK, Bock Soon NA, Sang Seok LEE, Sang Chul LIM, Soon-Won JUNG, Hye Yong CHU
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Patent number: 10026844Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.Type: GrantFiled: March 17, 2017Date of Patent: July 17, 2018Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kyoung Ik Cho, Jae Bon Koo, Chan Woo Park, Bock Soon Na, Sang Seok Lee, Sang Chul Lim, Soon-Won Jung, Hye Yong Chu
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Patent number: 9807886Abstract: Provided is an electronic circuit including a substrate having a flat device region and a curved interconnection region. A conduction line may extend along an uneven portion in the interconnection region and may be curved. The uneven portion and the conductive line may have a wavy shape. An external force applied to the electronic circuit may be absorbed by the uneven portion and the conductive line. The electronic device may not be affected by the external force. Therefore, functions of the electronic circuit may be maintained. A method of fabricating an electronic circuit according to the present invention may easily adjust areas and positions of the interconnection region and the device region.Type: GrantFiled: February 20, 2013Date of Patent: October 31, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chan Woo Park, Jae Bon Koo, Sang Chul Lim, Ji-Young Oh, Soon-Won Jung
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Publication number: 20170186876Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.Type: ApplicationFiled: March 17, 2017Publication date: June 29, 2017Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kyoung Ik CHO, Jae Bon KOO, Chan Woo PARK, Bock Soon NA, Sang Seok LEE, Sang Chul LIM, Soon-Won JUNG, Hye Yong CHU
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Patent number: 9634120Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.Type: GrantFiled: January 30, 2015Date of Patent: April 25, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kyoung Ik Cho, Jae Bon Koo, Chan Woo Park, Bock Soon Na, Sang Seok Lee, Sang Chul Lim, Soon-Won Jung, Hye Yong Chu
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Patent number: 9535283Abstract: Provided is a display device and a method of manufacturing the same. The display device includes a reflective display part including a first cathode electrode and a first anode electrode and a liquid crystal layer, a light emitting display part including a second cathode electrode and a second anode electrode and a light emission film, and a thin film transistor part being electrically connected to the first and second anode electrodes. The light emitting display part further includes a bank disposed on one side of the second anode electrode between the second anode electrode and the light emission film.Type: GrantFiled: May 23, 2014Date of Patent: January 3, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Hae Kim, Gi Heon Kim, Hojun Ryu, Chi-Sun Hwang, Jong-Heon Yang, Sang Chul Lim, Jae Bon Koo, Jonghee Lee, Jeong Ik Lee
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Patent number: 9434970Abstract: Disclosed is a method for the preparation of carbamic acid (R)-1-aryl-2-tetrazolyl-ethyl esters, comprising the enantioselective enzyme reduction of a 1-aryl-2-tetrazolyl-ethyl ketone to form a (R)-1-aryl-2-tetrazolyl-ethyl alcohol and the carbamation of said alcohol.Type: GrantFiled: May 22, 2015Date of Patent: September 6, 2016Assignee: SK BIOPHARMACEUTICALS CO., LTD.Inventors: Sang Chul Lim, Moo Yong Uhm, Dae Won Lee, Hui Ho Kim, Dong Ho Lee, Hyun Seok Lee
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Patent number: 9345123Abstract: A method for manufacturing a planarized printed electronic device includes performing a surface treatment on a base substrate to provide a surface treated base substrate and facilitate release during a delamination process; printing a layer having an electrode pattern onto the surface-treated base substrate; forming an organic material layer comprised of an organic material on the base substrate on which the printed layer is printed such that the printed layer is embedded therein to provide an embedded layer; providing a target substrate onto which the embedded layer is to be transferred; laminating by sandwiching the embedded layer between the base substrate on which the embedded layer is formed and the target substrate; delaminating by detaching the embedded layer from the base substrate; and transferring the printed layer onto the target substrate to provide a planarized printed layer. Large areas with reduced defects due to surface roughness are possible.Type: GrantFiled: July 3, 2013Date of Patent: May 17, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Suk Yang, In-Kyu You, Minseok Kim, Soon-Won Jung, Bock Soon Na, Sang Chul Lim
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Patent number: 9331126Abstract: Provided is a method for fabricating a flexible display device. The method includes attaching a shape memory alloy film memorizing a shape thereof as a curved shape at a shape memory temperature or lower to a flexible substrate at a temperature higher than the shape memory temperature, forming a display device on the flexible substrate, and returning the shape memory alloy to the curved shape to remove the shape memory alloy film from the flexible substrate.Type: GrantFiled: May 17, 2014Date of Patent: May 3, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang Seok Lee, Kyoung Ik Cho, Bock Soon Na, Sang Chul Lim, Chan Woo Park, Soon-Won Jung, Jae Bon Koo, Hye Yong Chu
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Patent number: 9276119Abstract: Provided is a method of manufacturing a gradually stretchable substrate. The method includes forming convex regions and concave regions on a top surface of a stretchable substrate by compressing a mold onto the stretchable substrate and forming non-stretchable patterns by filling the concave regions of the stretchable substrate. The stretchable substrate includes a stretchable region defined by the non-stretchable patterns, the non-stretchable patterns have side surfaces in contact with the stretchable region, and the side surfaces of the non-stretchable patterns are formed of protrusions and a non-protrusion between the protrusions repetitively connected to one another.Type: GrantFiled: April 2, 2014Date of Patent: March 1, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Ji-Young Oh, Jae Bon Koo, Sang Chul Lim, Chan Woo Park, Soon-Won Jung, Bock Soon Na, Sang Seok Lee, Hye Yong Chu
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Patent number: 9263592Abstract: A transistor includes source/drain electrodes provided on a substrate; a semiconductor oxide layer provided between the source/drain electrodes; a gate electrode facing the semiconductor oxide layer; and a gate insulating layer interposed between the semiconductor oxide layer and the gate electrode, wherein the semiconductor oxide layer has a nano-layered structure including at least one first nano layer comprised of a first material and at least one second nano layer comprised of a second material that are alternatingly stacked one on another to provide at least one interface, and wherein the first material and the second material are different materials that are effective to form an electron transfer channel layer at the interface.Type: GrantFiled: September 6, 2013Date of Patent: February 16, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Su Jae Lee, Chi-Sun Hwang, Hye Yong Chu, Sang Chul Lim, Jae-Eun Pi, Min Ki Ryu
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Publication number: 20150348800Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.Type: ApplicationFiled: January 30, 2015Publication date: December 3, 2015Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kyoung Ik CHO, Jae Bon KOO, Chan Woo PARK, Bock Soon NA, Sang Seok LEE, Sang Chul LIM, Soon-Won JUNG, Hye Yong CHU
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Publication number: 20150349136Abstract: Methods for manufacturing semiconductor devices according to embodiments of the present invention may include providing a sacrificial substrate including a wiring region and a device region, sequentially forming a sacrificial layer and a buffer layer on the sacrificial substrate, forming a thin-film transistor on the buffer layer of the device region, forming a device protection element surrounding the thin-film transistor within the device region, forming a flexible substrate on the buffer layer, and exposing a surface of the buffer layer by separating the sacrificial substrate by removing the sacrificial layer. Since typical semiconductor process technologies may be directly used, the process compatibility may be improved, and semiconductor devices having high resolution and high performance may be manufactured.Type: ApplicationFiled: January 30, 2015Publication date: December 3, 2015Inventors: Jae Bon KOO, Chan Woo PARK, Soon-Won JUNG, Bock Soon NA, Sang Chul LIM, Sang Seok LEE, Kyoung Ik CHO, Hye Yong CHU
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Patent number: 9177821Abstract: Provided is a method of fabricating an electronic circuit. The method includes preparing a substrate, forming a polymer film on the substrate, patterning the polymer film to form a polymer pattern, and forming an electronic device on the polymer pattern.Type: GrantFiled: April 22, 2014Date of Patent: November 3, 2015Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Soon-Won Jung, Jae Bon Koo, Chan Woo Park, Bock Soon Na, Sang Chul Lim, Sang Seok Lee, Kyoung Ik Cho, Hye Yong Chu