Patents by Inventor Sanjay Gopinath

Sanjay Gopinath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136192
    Abstract: Provided herein are low resistance metallization stack structures for 3D-NAND applications and related methods of fabrication. In some embodiments, thin metal oxynitride nucleation layers are deposited on dielectric material followed by deposition of a pure metal conductor using process conditions that increase non-molybdenum component element content at the oxynitride-dielectric interface. Certain embodiments of the methods described below convert less than all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.
    Type: Application
    Filed: February 18, 2022
    Publication date: April 25, 2024
    Inventors: Lawrence Schloss, Joshua Collins, Griffin John Kennedy, Hanna Bamnolker, Sang-Hyeob Lee, Patrick van Cleemput, Sanjay Gopinath
  • Publication number: 20230049157
    Abstract: Methods, systems, and computer programs are presented for predicting the performance of semiconductor manufacturing equipment operations. One method includes an operation for obtaining machine-learning (ML) models, each model related to predicting a performance metric for an operation of a semiconductor manufacturing tool. Further, each ML model utilizes features defining inputs for the ML model. The method further includes an operation for receiving a process definition for manufacturing a product with the semiconductor manufacturing tool. One or more ML models are utilized to estimate a performance of the process definition used in the semiconductor manufacturing tool. Additionally, the method includes presenting, on a display, results showing the estimate of the performance of the manufacturing of the product.
    Type: Application
    Filed: January 26, 2021
    Publication date: February 16, 2023
    Inventors: Kapil Umesh Sawlani, Michal Danek, Ravi Vellanki, Sanjay Gopinath, David g. Cohen, Sassan Roham, Saravanapriyan Sriraman, Benjamin Allen Haskell, Lee j. Brogan
  • Publication number: 20220364232
    Abstract: Described herein are methods of filling features with tungsten and related apparatus. The methods described herein involve deposition of a tungsten nucleation layer prior to deposition of a bulk layer. The methods involve multiple atomic layer deposition (ALD) cycles. According to various embodiments, both a boron-containing reducing agent and silicon-reducing agent may be pulses during a single cycle to react with a tungsten-containing precursor and form a tungsten film.
    Type: Application
    Filed: August 10, 2020
    Publication date: November 17, 2022
    Inventors: Pragna NANNAPANENI, Novy TJOKRO, Sema ERMEZ, Ruopeng DENG, Tianhua YU, Xiaolan BA, Sanjay GOPINATH
  • Publication number: 20220290300
    Abstract: Various showerheads and methods are provided. A showerhead may include a faceplate partially defined by a front surface and a back surface, a back plate having a gas inlet, a first conical frustum surface, and a second conical frustum surface, a plenum volume fluidically connected to the gas inlet and at least partially defined by the gas inlet, the back surface of the faceplate, the first conical frustum surface, and the second conical frustum surface, and a baffle plate positioned within the plenum volume, and having a plurality of baffle plate through-holes extending through the baffle plate. The second conical frustum surface may be positioned radially outwards from the first conical frustum surface with respect to a center axis of the showerhead, and the second conical frustum surface may be positioned along the center axis farther from the gas inlet than the first conical frustum surface.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 15, 2022
    Inventors: Ravi Vellanki, Eric H. Lenz, Vinayakaraddy Gulabal, Sanjay Gopinath, Michal Danek, Prodyut Majumder, Novy Tjokro, Yen-Chang Chen, Shruti Vivek Thombare, Gorun Butail, Patrick A. van Cleemput
  • Publication number: 20220262640
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Application
    Filed: May 5, 2022
    Publication date: August 18, 2022
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Publication number: 20220254685
    Abstract: Provided herein are methods of depositing tungsten (W) films without depositing a nucleation layer. In certain embodiments, the methods involve depositing a conformal reducing agent layer of boron (B) and/or silicon (Si) on a substrate. The substrate generally includes a feature to be filled with tungsten with the reducing agent layer conformal to the topography of the substrate including the feature. The reducing agent layer is then exposed to a fluorine-containing tungsten precursor, which is reduced by the reducing agent layer to form a layer of elemental tungsten. The conformal reducing agent layer is converted to a conformal tungsten layer.
    Type: Application
    Filed: May 18, 2020
    Publication date: August 11, 2022
    Inventors: Sema ERMEZ, Ruopeng DENG, Yutaka NISHIOKA, Xiaolan BA, Sanjay GOPINATH, Michal DANEK
  • Publication number: 20220186370
    Abstract: Provided herein are methods and related apparatus for purging processing chambers during an atomic layer deposition (ALD) process. The methods involve flowing purging gas from one or more accumulators to remove process gases from the processing chambers. Following the flowing of purging gas, additional reactants may be introduced into the processing chamber to continue an ALD cycle.
    Type: Application
    Filed: April 15, 2020
    Publication date: June 16, 2022
    Applicant: Lam Research Corporation
    Inventors: Pragna Nannapaneni, Sema Ermez, Novy Tjokro, Ruopeng Deng, Tianhua Yu, Xiaolan Ba, Juwen Gao, Sanjay Gopinath
  • Patent number: 11355345
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Grant
    Filed: December 21, 2019
    Date of Patent: June 7, 2022
    Assignee: Lam Research Corporation
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Patent number: 11348795
    Abstract: Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: May 31, 2022
    Assignee: Lam Research Corporation
    Inventors: Lawrence Schloss, Raashina Humayun, Sanjay Gopinath, Juwen Gao, Michal Danek, Kaihan Abidi Ashtiani
  • Publication number: 20210313183
    Abstract: Described herein are methods and apparatuses for filling semiconductor substrate structures with conductive material. The methods involve depositing multi-layer bulk metal films in structures with one or more deposition conditions changed when transitioning from layer-to-layer. The methods result in high fill quality, high throughput, low precursor consumption, and low roughness. Multi-station chambers to perform the methods are also provided.
    Type: Application
    Filed: July 31, 2019
    Publication date: October 7, 2021
    Inventors: Xiaolan Ba, Ruopeng Deng, Juwen Gao, Sanjay Gopinath, Lawrence Schloss
  • Publication number: 20200211853
    Abstract: Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.
    Type: Application
    Filed: August 10, 2018
    Publication date: July 2, 2020
    Inventors: Lawrence Schloss, Raashina Humayun, Sanjay Gopinath, Juwen Gao, Michal Danek, Kaihan Abidi Ashtiani
  • Publication number: 20200144066
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Application
    Filed: December 21, 2019
    Publication date: May 7, 2020
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Patent number: 10573522
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 25, 2020
    Assignee: Lam Research Corporation
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Publication number: 20180053660
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Application
    Filed: August 9, 2017
    Publication date: February 22, 2018
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Publication number: 20170170114
    Abstract: A method for forming a barrier diffusion layer on a substrate includes depositing a tantalum layer in features of the substrate using an atomic layer deposition process. The method includes depositing a titanium layer on the tantalum layer using an atomic layer deposition process. The method includes annealing the substrate to form the barrier diffusion layer including a tantalum-titanium alloy.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Inventors: Paul Raymond Besser, Sanjay Gopinath
  • Patent number: 9484251
    Abstract: Methods of lightly implanting platinum, iridium, osmium, erbium, ytterbium, dysprosium, and gadolinium in semiconductor material in shallow depths by plasma-immersion ion implantation (PIII) and/or pulsed PIII are provided herein. Methods include depositing a liner layer prior to masking and implanting features to form n-type and p-type semiconductors and implanting materials through the liner layer. Methods are suitable for integration schemes involving fabrication of fin-type field effect transistors (FinFETs).
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: November 1, 2016
    Assignee: Lam Research Corporation
    Inventors: Paul Raymond Besser, William Worthington Crew, Jr., Sanjay Gopinath
  • Patent number: 9478411
    Abstract: Methods of depositing and tuning deposition of sub-stoichiometric titanium oxide are provided. Methods involve depositing highly pure and conformal titanium on a substrate in a chamber by (i) exposing the substrate to titanium tetraiodide, (ii) purging the chamber, (iii) exposing the substrate to a plasma, (iv) purging the chamber, (v) repeating (i) through (iv), and treating the deposited titanium on the substrate to form sub-stoichiometric titanium oxide. Titanium oxide may also be deposited prior to depositing titanium on the substrate. Treatments include substrate exposure to an oxygen source and/or annealing the substrate.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: October 25, 2016
    Assignee: Lam Research Corporation
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Reza Arghavani, Michal Danek
  • Patent number: 9478438
    Abstract: Methods of depositing highly conformal and pure titanium films at low temperatures are provided. Methods involve exposing a substrate to titanium tetraiodide, purging the chamber, exposing the substrate to a plasma, purging the chamber, and repeating these operations. Titanium films are deposited at low temperatures less than about 450° C.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: October 25, 2016
    Assignee: Lam Research Corporation
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Michal Danek
  • Patent number: 9447499
    Abstract: A dual-plenum showerhead for semiconductor processing operations is provided. The showerhead may include a faceplate with two sets of gas distribution holes, each set fed by a separate plenum. One set of gas distribution holes may be through-holes in the faceplate of the showerhead and may allow gases trapped between the faceplate and a plasma dome to flow towards a wafer. The other set of gas distribution holes may distribute gas routed through passages or channels in the faceplate towards the wafer. The passages or channels in the faceplate may include radial channels and annular channels and may be fed from an annular gas distribution channel about the periphery of the faceplate.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: September 20, 2016
    Assignee: Novellus Systems, Inc.
    Inventors: Shambhu N. Roy, Vincent E. Burkhart, Natan Solomon, Sanjay Gopinath, Kaihan Abidi Ashtiani, Bart van Schravendijk, Jason Stevens, Dhritiman Subha Kashyap, David Cohen
  • Patent number: 9349637
    Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: May 24, 2016
    Assignee: Lam Research Corporation
    Inventors: Jeong-Seok Na, Tianhua Yu, Michal Danek, Sanjay Gopinath