Patents by Inventor Sanjay Gopinath

Sanjay Gopinath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160056037
    Abstract: Methods of depositing and tuning deposition of sub-stoichiometric titanium oxide are provided. Methods involve depositing highly pure and conformal titanium on a substrate in a chamber by (i) exposing the substrate to titanium tetraiodide, (ii) purging the chamber, (iii) exposing the substrate to a plasma, (iv) purging the chamber, (v) repeating (i) through (iv), and treating the deposited titanium on the substrate to form sub-stoichiometric titanium oxide. Titanium oxide may also be deposited prior to depositing titanium on the substrate. Treatments include substrate exposure to an oxygen source and/or annealing the substrate.
    Type: Application
    Filed: August 20, 2014
    Publication date: February 25, 2016
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Reza Arghavani, Michal Danek
  • Publication number: 20160056053
    Abstract: Methods of depositing highly conformal and pure titanium films at low temperatures are provided. Methods involve exposing a substrate to titanium tetraiodide, purging the chamber, exposing the substrate to a plasma, purging the chamber, and repeating these operations. Titanium films are deposited at low temperatures less than about 450° C.
    Type: Application
    Filed: August 20, 2014
    Publication date: February 25, 2016
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Michal Danek
  • Publication number: 20160056074
    Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors.
    Type: Application
    Filed: August 21, 2014
    Publication date: February 25, 2016
    Inventors: Jeong-Seok Na, Tianhua Yu, Michal Danek, Sanjay Gopinath
  • Patent number: 9255326
    Abstract: Systems and methods deposit a film on a substrate by introducing a precursor gas into a reaction volume of a processing chamber. A substrate is arranged in the reaction volume. After a predetermined soak period, the precursor gas is purged from the reaction volume. The substrate is exposed with plasma gas using a remote plasma source.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 9, 2016
    Assignee: Novellus Systems, Inc.
    Inventors: Jeong-Seok Na, Sanjay Gopinath
  • Patent number: 9117884
    Abstract: A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 25, 2015
    Assignee: Novellus Systems, Inc.
    Inventors: Roey Shaviv, Sanjay Gopinath, Peter Holverson, Anshu A. Pradhan
  • Publication number: 20140272185
    Abstract: Systems and methods deposit a film on a substrate by introducing a precursor gas into a reaction volume of a processing chamber. A substrate is arranged in the reaction volume. After a predetermined soak period, the precursor gas is purged from the reaction volume. The substrate is exposed with plasma gas using a remote plasma source.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Inventors: Jeong-Seok Na, Sanjay Gopinath
  • Publication number: 20130341433
    Abstract: A dual-plenum showerhead for semiconductor processing operations is provided. The showerhead may include a faceplate with two sets of gas distribution holes, each set fed by a separate plenum. One set of gas distribution holes may be through-holes in a faceplate of the showerhead and may allow gases trapped between the faceplate and a plasma dome to flow towards a wafer. The other set of gas distribution holes may distribute gas routed through passages or channels in the faceplate towards the wafer. The passages or channels in the faceplate may include radial channels and annular channels and may be fed from an annular gas distribution channel about the periphery of the faceplate.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 26, 2013
    Inventors: Shambhu N. Roy, Vincent E. Burkhart, Natan Solomon, Sanjay Gopinath, Kaihan Abidi Ashtiani, Bart van Schravendijk, Jason Stevens, Dhritiman Subha Kashyap, David Cohen
  • Patent number: 8298933
    Abstract: A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: October 30, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Roey Shaviv, Sanjay Gopinath, Peter Holverson, Anshu A. Pradhan
  • Publication number: 20100009533
    Abstract: A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.
    Type: Application
    Filed: May 15, 2009
    Publication date: January 14, 2010
    Applicant: NOVELLUS SYSTEMS, INC.
    Inventors: Roey Shaviv, Sanjay Gopinath, Peter Holverson, Anshu A. Pradhan
  • Patent number: 7503334
    Abstract: A system is provided for cleaning wafers that includes specialized pressurization, process vessel, recirculation, chemical addition, depressurization, and recapture-recycle subsystems. A solvent delivery mechanism converts a liquid-state sub-critical solution to a supercritical cleaning solution and introduces it into a process vessel that contains a wafer or wafers. The supercritical cleaning solution is recirculated through the process vessel by a recirculation system. An additive delivery system introduces chemical additives to the supercritical cleaning solution via the solvent delivery mechanism, the process vessel, or the recirculation system. Addition of chemical additives to the sub-critical solution may also be performed. The recirculation system provides efficient mixing of chemical additives, efficient cleaning, and process uniformity. A depressurization system provides dilution and removal of cleaning solutions under supercritical conditions.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: March 17, 2009
    Assignee: Novellus Systems, Inc.
    Inventors: Krishnan Shrinivasan, Souvik Banerjee, Francisco Juarez, Karen A. Reinhardt, Sanjay Gopinath
  • Patent number: 7456101
    Abstract: Methods for depositing a ruthenium metal layer on a dielectric substrate are provided. The methods involve, for instance, exposing the dielectric substrate to an amine-containing compound, followed by exposing the substrate to a ruthenium precursor and an optional co-reactant such that the amine-containing compound facilitates the nucleation on the dielectric surface.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: November 25, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: Sanjay Gopinath, Jeremie Dalton, Jason M. Blackburn, John Drewery, Willibrordus Gerardus Maria van den Hoek
  • Patent number: 7279417
    Abstract: Methods for protecting an exposed copper surface of a partially fabricated IC from oxidation during exposure to an oxygen-containing environment are disclosed. The methods involve treating the exposed copper surface with a metallocene compound in order to minimize formation of copper oxide on the exposed surface, and exposing the copper surface to an oxygen-containing environment.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: October 9, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Jeremie Dalton, Sanjay Gopinath, Jason M. Blackburn
  • Patent number: 7211509
    Abstract: Methods for depositing a ruthenium metal layer on a dielectric substrate are provided. The methods involve, for instance, exposing the dielectric substrate to an amine-containing compound, followed by exposing the substrate to a ruthenium precursor and an optional co-reactant such that the amine-containing compound facilitates the nucleation on the dielectric surface.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: May 1, 2007
    Assignee: Novellus Systems, Inc,
    Inventors: Sanjay Gopinath, Jeremie Dalton, Jason M. Blackburn, John Drewery, Willibrordus Gerardus Maria van den Hoek
  • Patent number: 7041596
    Abstract: An excited surfactant species is created by generating plasma discharge in a surfactant precursor gas. A surfactant species typically includes at least one of iodine, led, thin, gallium, and indium. A surface of an integrated circuit substrate is exposed to the excited surfactant species to form a plasma-treated surface. A ruthenium thin film is deposited on the plasma-treated surface using a CVD technique.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: May 9, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Jeremie James Dalton, Sanjay Gopinath, Jason M. Blackburn, John Stephen Drewery
  • Patent number: 7037574
    Abstract: An atomic layer deposition (ALD) process deposits thin films for microelectronic structures, such as advanced gap and tunnel junction applications, by plasma annealing at varying film thicknesses to obtain desired intrinsic film stress and breakdown film strength. The primary advantage of the ALD process is the near 100% step coverage with properties that are uniform along sidewalls. The process provides smooth (Ra˜2 ?), pure (impurities<1 at. %), AlOx films with improved breakdown strength (9–10 MV/cm) with a commercially feasible throughput.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: May 2, 2006
    Assignee: Veeco Instruments, Inc.
    Inventors: Ajit P. Paranjpe, Sanjay Gopinath, Thomas R. Omstead, Randhir S. Bubber, Ming Mao
  • Patent number: 6951765
    Abstract: The present invention pertains to apparatus and methods for introduction of solid precursors and reactants into a supercritical fluid reactor. Solids are dissolved in supercritical fluid solvents in generator apparatus separate from the supercritical fluid reactor. Such apparatus preferably generate saturated solutions of solid precursors via recirculation of supercritical fluids through a vessel containing the solid precursors. Supercritical solutions of the solids are introduced into the reactor, which itself is charged with a supercritical fluid. Supercritical conditions are maintained during the delivery of the dissolved precursor to the reactor. Recirculation of supercritical precursor solutions through the reactor may or may not be implemented in methods of the invention. Methods of the invention are particularly well suited for integrated circuit fabrication, where films are deposited on wafers under supercritical conditions.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: October 4, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Sanjay Gopinath, Patrick A. Van Cleemput, Michelle Schulberg, Sasangan Ramanathan, Francisco Juarez, Patrick Joyce
  • Patent number: 6848458
    Abstract: The present invention pertains to a system for cleaning wafers that includes specialized pressurization, process vessel, recirculation, chemical addition, depressurization, and recapture-recycle subsystems, as well as methods for implementing wafer cleaning using such a system. A solvent delivery mechanism converts a liquid-state sub-critical solution to a supercritical cleaning solution and introduces it into a process vessel that contains a wafer or wafers. The supercritical cleaning solution is recirculated through the process vessel by a recirculation system. An additive delivery system introduces chemical additives to the supercritical cleaning solution via the solvent delivery mechanism, the process vessel, or the recirculation system. Addition of chemical additives to the sub-critical solution may also be performed. The recirculation system provides efficient mixing of chemical additives, efficient cleaning, and process uniformity.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: February 1, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Krishnan Shrinivasan, Souvik Banerjee, Francisco Juarez, Karen A. Reinhardt, Sanjay Gopinath
  • Patent number: 6645847
    Abstract: A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier includes a refractory metal such as cobalt, cobalt-based alloys, ruthenium or ruthenium-based alloys for promoting adhesion of copper. The barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: November 11, 2003
    Assignee: CVC Products, Inc.
    Inventors: Ajit P. Paranjpe, Mehrdad M. Moslehi, Boris Relja, Randhir S. Bubber, Lino A. Velo, Thomas R. Omstead, David R. Campbell, Sr., David M. Leet, Sanjay Gopinath
  • Patent number: 6627995
    Abstract: A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier includes a refractory metal such as cobalt, cobalt-based alloys, ruthenium or ruthenium-based alloys for promoting adhesion of copper. The barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: September 30, 2003
    Assignee: CVC Products, Inc.
    Inventors: Ajit P. Paranjpe, Mehrdad M. Moslehi, Boris Relja, Randhir S. Bubber, Lino A. Velo, Thomas R. Omstead, David R. Campbell, Sr., David M. Leet, Sanjay Gopinath
  • Patent number: 6550484
    Abstract: The present invention pertains to apparatus and methods for maintaining wafer back side, bevel, and front side edge exclusion during supercritical fluid processing. Apparatus of the invention include a pedestal and an exclusion ring. When the exclusion ring is engaged with the pedestal a channel is formed. A reactant-free supercritical fluid is passed through the channel and over a circumferential front edge of a wafer. The flow of reactant-free supercritical fluid protects the bevel and circumferential front edge of the wafer from exposure to reactants in a supercritical processing medium. The back side of the wafer is protected by contact with the pedestal and the flow of reactant-free supercritical fluid. Exclusion rings of the invention, when engaged with their corresponding pedestals make no or very little physical contact with the wafer front side.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: April 22, 2003
    Assignee: Novellus Systems, Inc.
    Inventors: Sanjay Gopinath, Patrick A. Van Cleemput, Francisco Juarez, Krishnan Shrinivasan