Patents by Inventor Sanjay Gopinath

Sanjay Gopinath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210313183
    Abstract: Described herein are methods and apparatuses for filling semiconductor substrate structures with conductive material. The methods involve depositing multi-layer bulk metal films in structures with one or more deposition conditions changed when transitioning from layer-to-layer. The methods result in high fill quality, high throughput, low precursor consumption, and low roughness. Multi-station chambers to perform the methods are also provided.
    Type: Application
    Filed: July 31, 2019
    Publication date: October 7, 2021
    Inventors: Xiaolan Ba, Ruopeng Deng, Juwen Gao, Sanjay Gopinath, Lawrence Schloss
  • Publication number: 20200211853
    Abstract: Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.
    Type: Application
    Filed: August 10, 2018
    Publication date: July 2, 2020
    Inventors: Lawrence Schloss, Raashina Humayun, Sanjay Gopinath, Juwen Gao, Michal Danek, Kaihan Abidi Ashtiani
  • Publication number: 20200144066
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Application
    Filed: December 21, 2019
    Publication date: May 7, 2020
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Patent number: 10573522
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 25, 2020
    Assignee: Lam Research Corporation
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Publication number: 20180053660
    Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.
    Type: Application
    Filed: August 9, 2017
    Publication date: February 22, 2018
    Inventors: Adam Jandl, Sema Ermez, Lawrence Schloss, Sanjay Gopinath, Michal Danek, Siew Neo, Joshua Collins, Hanna Bamnolker
  • Publication number: 20170170114
    Abstract: A method for forming a barrier diffusion layer on a substrate includes depositing a tantalum layer in features of the substrate using an atomic layer deposition process. The method includes depositing a titanium layer on the tantalum layer using an atomic layer deposition process. The method includes annealing the substrate to form the barrier diffusion layer including a tantalum-titanium alloy.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Inventors: Paul Raymond Besser, Sanjay Gopinath
  • Patent number: 9484251
    Abstract: Methods of lightly implanting platinum, iridium, osmium, erbium, ytterbium, dysprosium, and gadolinium in semiconductor material in shallow depths by plasma-immersion ion implantation (PIII) and/or pulsed PIII are provided herein. Methods include depositing a liner layer prior to masking and implanting features to form n-type and p-type semiconductors and implanting materials through the liner layer. Methods are suitable for integration schemes involving fabrication of fin-type field effect transistors (FinFETs).
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: November 1, 2016
    Assignee: Lam Research Corporation
    Inventors: Paul Raymond Besser, William Worthington Crew, Jr., Sanjay Gopinath
  • Patent number: 9478411
    Abstract: Methods of depositing and tuning deposition of sub-stoichiometric titanium oxide are provided. Methods involve depositing highly pure and conformal titanium on a substrate in a chamber by (i) exposing the substrate to titanium tetraiodide, (ii) purging the chamber, (iii) exposing the substrate to a plasma, (iv) purging the chamber, (v) repeating (i) through (iv), and treating the deposited titanium on the substrate to form sub-stoichiometric titanium oxide. Titanium oxide may also be deposited prior to depositing titanium on the substrate. Treatments include substrate exposure to an oxygen source and/or annealing the substrate.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: October 25, 2016
    Assignee: Lam Research Corporation
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Reza Arghavani, Michal Danek
  • Patent number: 9478438
    Abstract: Methods of depositing highly conformal and pure titanium films at low temperatures are provided. Methods involve exposing a substrate to titanium tetraiodide, purging the chamber, exposing the substrate to a plasma, purging the chamber, and repeating these operations. Titanium films are deposited at low temperatures less than about 450° C.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: October 25, 2016
    Assignee: Lam Research Corporation
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Michal Danek
  • Patent number: 9447499
    Abstract: A dual-plenum showerhead for semiconductor processing operations is provided. The showerhead may include a faceplate with two sets of gas distribution holes, each set fed by a separate plenum. One set of gas distribution holes may be through-holes in the faceplate of the showerhead and may allow gases trapped between the faceplate and a plasma dome to flow towards a wafer. The other set of gas distribution holes may distribute gas routed through passages or channels in the faceplate towards the wafer. The passages or channels in the faceplate may include radial channels and annular channels and may be fed from an annular gas distribution channel about the periphery of the faceplate.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: September 20, 2016
    Assignee: Novellus Systems, Inc.
    Inventors: Shambhu N. Roy, Vincent E. Burkhart, Natan Solomon, Sanjay Gopinath, Kaihan Abidi Ashtiani, Bart van Schravendijk, Jason Stevens, Dhritiman Subha Kashyap, David Cohen
  • Patent number: 9349637
    Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: May 24, 2016
    Assignee: Lam Research Corporation
    Inventors: Jeong-Seok Na, Tianhua Yu, Michal Danek, Sanjay Gopinath
  • Publication number: 20160056074
    Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors.
    Type: Application
    Filed: August 21, 2014
    Publication date: February 25, 2016
    Inventors: Jeong-Seok Na, Tianhua Yu, Michal Danek, Sanjay Gopinath
  • Publication number: 20160056053
    Abstract: Methods of depositing highly conformal and pure titanium films at low temperatures are provided. Methods involve exposing a substrate to titanium tetraiodide, purging the chamber, exposing the substrate to a plasma, purging the chamber, and repeating these operations. Titanium films are deposited at low temperatures less than about 450° C.
    Type: Application
    Filed: August 20, 2014
    Publication date: February 25, 2016
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Michal Danek
  • Publication number: 20160056037
    Abstract: Methods of depositing and tuning deposition of sub-stoichiometric titanium oxide are provided. Methods involve depositing highly pure and conformal titanium on a substrate in a chamber by (i) exposing the substrate to titanium tetraiodide, (ii) purging the chamber, (iii) exposing the substrate to a plasma, (iv) purging the chamber, (v) repeating (i) through (iv), and treating the deposited titanium on the substrate to form sub-stoichiometric titanium oxide. Titanium oxide may also be deposited prior to depositing titanium on the substrate. Treatments include substrate exposure to an oxygen source and/or annealing the substrate.
    Type: Application
    Filed: August 20, 2014
    Publication date: February 25, 2016
    Inventors: Shruti Vivek Thombare, Ishtak Karim, Sanjay Gopinath, Reza Arghavani, Michal Danek
  • Patent number: 9255326
    Abstract: Systems and methods deposit a film on a substrate by introducing a precursor gas into a reaction volume of a processing chamber. A substrate is arranged in the reaction volume. After a predetermined soak period, the precursor gas is purged from the reaction volume. The substrate is exposed with plasma gas using a remote plasma source.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 9, 2016
    Assignee: Novellus Systems, Inc.
    Inventors: Jeong-Seok Na, Sanjay Gopinath
  • Patent number: 9117884
    Abstract: A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 25, 2015
    Assignee: Novellus Systems, Inc.
    Inventors: Roey Shaviv, Sanjay Gopinath, Peter Holverson, Anshu A. Pradhan
  • Publication number: 20140272185
    Abstract: Systems and methods deposit a film on a substrate by introducing a precursor gas into a reaction volume of a processing chamber. A substrate is arranged in the reaction volume. After a predetermined soak period, the precursor gas is purged from the reaction volume. The substrate is exposed with plasma gas using a remote plasma source.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Inventors: Jeong-Seok Na, Sanjay Gopinath
  • Publication number: 20130341433
    Abstract: A dual-plenum showerhead for semiconductor processing operations is provided. The showerhead may include a faceplate with two sets of gas distribution holes, each set fed by a separate plenum. One set of gas distribution holes may be through-holes in a faceplate of the showerhead and may allow gases trapped between the faceplate and a plasma dome to flow towards a wafer. The other set of gas distribution holes may distribute gas routed through passages or channels in the faceplate towards the wafer. The passages or channels in the faceplate may include radial channels and annular channels and may be fed from an annular gas distribution channel about the periphery of the faceplate.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 26, 2013
    Inventors: Shambhu N. Roy, Vincent E. Burkhart, Natan Solomon, Sanjay Gopinath, Kaihan Abidi Ashtiani, Bart van Schravendijk, Jason Stevens, Dhritiman Subha Kashyap, David Cohen
  • Patent number: 8298933
    Abstract: A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: October 30, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Roey Shaviv, Sanjay Gopinath, Peter Holverson, Anshu A. Pradhan
  • Publication number: 20100009533
    Abstract: A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.
    Type: Application
    Filed: May 15, 2009
    Publication date: January 14, 2010
    Applicant: NOVELLUS SYSTEMS, INC.
    Inventors: Roey Shaviv, Sanjay Gopinath, Peter Holverson, Anshu A. Pradhan