Abstract: A semiconductor power device includes a circuit to provide a gate signal wherein the gate signal has a negative temperature coefficient of gate driving voltage for decreasing a gate driving voltage with an increase temperature whereby the semiconductor power device has a net Ids temperature coefficient that is less than or equal to zero. In an exemplary embodiment, the gate voltage driver includes a diode that has a negative forward voltage temperature coefficient connected between a gate and a source of the semiconductor power device. In another embodiment, the gate voltage is integrated with the semiconductor power device manufactured as part of an integrated circuit with the semiconductor power device.

Abstract: A circuit for limiting di/dt caused by a main switching FET during its turn-off against an inductive switching circuit is proposed. The circuit for limiting di/dt includes: An auxiliary inductor in series with the main switching FET for inducing an auxiliary inductive voltage proportional to di/dt. An auxiliary FET in parallel with the main switching FET. The auxiliary FET gate is connected to produce a gate voltage equal to the auxiliary inductive voltage. When the di/dt tends to exceed a pre-determined maximum rate of decrease, the auxiliary FET produces an auxiliary current component counteracting further decrease of the di/dt. The main switching FET and the auxiliary FET can be formed from a single die with shared source and drain. The auxiliary inductor can be implemented as a parasitic inductance of an inherently required bonding wire connecting the main switching FET to its device terminal to simplify packaging with reduced cost.

Abstract: A switching device includes a high-side MOSFET chip having a first high-side source connected to a low-side drain of a low-side MOSFET chip. The switching device further includes a transient reverse current diversion circuit connected to a drain of the low side MOSFET chip for diverting a reverse transient current therethrough whereby a reverse transient current in turning off the low side MOSFET chip is diverted from passing through a body diode of the low side MOSFET chip reducing a transient ringing oscillation. The reverse transient current diversion circuit includes a diode for conducting the reverse transient current from the drain. The reverse transient current diversion circuit further includes a capacitor connected between the diode and a source of the low side MOSFET chip.

Abstract: A stacked dual MOSFET package is disclosed.

Abstract: A semiconductor power device includes a circuit to provide a gate signal wherein the gate signal has a negative temperature coefficient of gate driving voltage for decreasing a gate driving voltage with an increase temperature whereby the semiconductor power device has a net Ids temperature coefficient that is less than or equal to zero. In an exemplary embodiment, the gate voltage driver includes a diode that has a negative forward voltage temperature coefficient connected between a gate and a source of the semiconductor power device. In another embodiment, the gate voltage is integrated with the semiconductor power device manufactured as part of an integrated circuit with the semiconductor power device.

Abstract: A stacked dual MOSFET package is disclosed.

Abstract: A semiconductor power device includes a circuit to provide a gate signal wherein the gate signal has a negative temperature coefficient of gate driving voltage for decreasing a gate driving voltage with an increase temperature whereby the semiconductor power device has a net Ids temperature coefficient that is less than or equal to zero. In an exemplary embodiment, the gate voltage driver includes a diode that has a negative forward voltage temperature coefficient connected between a gate and a source of the semiconductor power device. In another embodiment, the gate voltage is integrated with the semiconductor power device manufactured as part of an integrated circuit with the semiconductor power device.

Abstract: A switching device includes a high-side MOSFET chip having a first high-side source connected to a low-side drain of a low-side MOSFET chip. The switching device further includes a transient reverse current diversion circuit connected to a drain of the low side MOSFET chip for diverting a reverse transient current therethrough whereby a reverse transient current in turning off the low side MOSFET chip is diverted from passing through a body diode of the low side MOSFET chip reducing a transient ringing oscillation. The reverse transient current diversion circuit includes a diode for conducting the reverse transient current from the drain. The reverse transient current diversion circuit further includes a capacitor connected between the diode and a source of the low side MOSFET chip.

Abstract: A switched mode power converter includes a transformer having a primary winding and at least one secondary winding, a primary side power switch coupled to the primary winding and adapted to periodically apply an input voltage to the primary winding, and an output filter operatively coupled to the secondary winding to provide an output voltage and output current. First and second active switch devices are operatively coupled in series between the secondary winding and the output filter, and a third active switch device is operatively coupled in shunt with the secondary winding and the output filter. The first and second active switches are arranged such that in an inactivated state each one blocks current between the secondary winding and the output filter in an opposite direction. A control circuit is coupled to the first, second and third active switches.

Abstract: A switched mode power converter comprises a transformer having a primary winding and at least one secondary winding, a primary side power switch coupled to the primary winding and adapted to periodically apply an input voltage to the primary winding, and an output filter operatively coupled to the secondary winding to provide an output voltage and output current. First and second active switch devices are operatively coupled in series between the secondary winding and the output filter, and a third active switch device is operatively coupled in shunt with the secondary winding and the output filter. The first and second active switches are arranged such that in an inactivated state each one blocks current between the secondary winding and the output filter in an opposite direction. A control circuit is coupled to the first, second and third active switches.