Patents by Inventor Sanjay Mehrotra
Sanjay Mehrotra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7460399Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: GrantFiled: July 13, 1998Date of Patent: December 2, 2008Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Patent number: 7447069Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: GrantFiled: April 22, 1998Date of Patent: November 4, 2008Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Patent number: 7437631Abstract: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.Type: GrantFiled: August 13, 2004Date of Patent: October 14, 2008Assignee: SanDisk CorporationInventors: Daniel L. Auclair, Jeffrey Craig, John S. Mangan, Robert D. Norman, Daniel C. Guterman, Sanjay Mehrotra
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Patent number: 7397713Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: GrantFiled: January 21, 2003Date of Patent: July 8, 2008Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Publication number: 20080158995Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: ApplicationFiled: October 24, 2007Publication date: July 3, 2008Inventors: Eliyahou Harari, Sanjay Mehrotra
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Patent number: 7362618Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: GrantFiled: April 16, 2003Date of Patent: April 22, 2008Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Patent number: 7283397Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. A chunk of user data is programmed into a group of memory cells in parallel, the programming of individual memory cells being terminated when they are determined to have reached desired threshold level ranges while the programming of other memory cells continues. Other improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped.Type: GrantFiled: November 7, 2002Date of Patent: October 16, 2007Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Patent number: 7266017Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. A chunk of user data is programmed into a group of memory cells in parallel, the programming of individual memory cells being terminated when they are determined to have reached desired threshold level ranges while the programming of other memory cells continues. Other improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped.Type: GrantFiled: May 30, 2001Date of Patent: September 4, 2007Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Patent number: 7190617Abstract: A system of Flash EEprom chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: GrantFiled: June 23, 1998Date of Patent: March 13, 2007Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Publication number: 20060112049Abstract: A method and system using branching on hyperplanes and half-spaces computed from integral adjoint and/or kernel or dual lattice basis for solving mixed integer programs within specified tolerance. It comprises steps of: (1) preprocessing to ensure feasibility and linear objective; (2) computing adjoint and/or kernel lattice basis of the equality constraint coefficient matrix, or its transformed sub-matrix; (3) generating a generalized-branch-and-cut tree; (4) selecting a node and adding new constraints or approximating existing constraints; (5) processing a node to update lower and upper bounds, deleting nodes, or removing variables; (6 optional) computing an ellipsoidal approximation of continuous relaxation of (5); (7 optional) computing new lattice basis; (8) partitioning the set in (4) generating two or more nodes; (9) repeating (5-8) till termination.Type: ApplicationFiled: September 29, 2005Publication date: May 25, 2006Inventors: Sanjay Mehrotra, Zhifeng Li
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Publication number: 20050286336Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: ApplicationFiled: August 13, 2003Publication date: December 29, 2005Inventors: Eliyahou Harari, Robert Norman, Sanjay Mehrotra
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Patent number: 6914846Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: GrantFiled: December 26, 2002Date of Patent: July 5, 2005Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Publication number: 20050083726Abstract: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.Type: ApplicationFiled: October 26, 2004Publication date: April 21, 2005Inventors: Daniel Auclair, Jeffrey Craig, John Mangan, Robert Norman, Daniel Guterman, Sanjay Mehrotra
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Publication number: 20050058008Abstract: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.Type: ApplicationFiled: August 13, 2004Publication date: March 17, 2005Inventors: Daniel Auclair, Jeffrey Craig, John Mangan, Robert Norman, Daniel Guterman, Sanjay Mehrotra
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Patent number: 6829673Abstract: An EEPROM system includes flash EEPROM cells organized into subarrays. Pairs of subarrays share row address decoders by sharing word lines, and individual subarrays have dedicated column address decoders and data registers. Each row decoder has an associated row address latch, and each column decoder has an associated column address latch. Multiple data chunks are concurrently written into the subarrays by first latching chunk addresses into the row and column address latches, and corresponding chunks of data into the data registers, then activating a programming signal to initiate concurrent programming and verifying the programming of the data chunks.Type: GrantFiled: November 1, 2002Date of Patent: December 7, 2004Assignee: SanDisk CorporationInventors: Douglas J. Lee, Mehrdad Mofidi, Sanjay Mehrotra, Raul-Adrian Cernea
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Publication number: 20040237010Abstract: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.Type: ApplicationFiled: June 22, 2004Publication date: November 25, 2004Inventors: Daniel L. Auclair, Jeffrey Craig, John S. Mangan, Robert D. Norman, Daniel C. Guterman, Sanjay Mehrotra
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Publication number: 20040186948Abstract: A memory system includes an array of solid-state memory devices are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is assigned an array address by an array mount. An memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array mount configuration is used to unconditionally select the device mounted.Type: ApplicationFiled: March 24, 2004Publication date: September 23, 2004Inventors: Karl M. J. Lofgren, Jeffrey Donald Stai, Anil Gupta, Robert D. Norman, Sanjay Mehrotra
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Publication number: 20040170064Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: ApplicationFiled: March 3, 2004Publication date: September 2, 2004Inventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra
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Publication number: 20040168014Abstract: A memory system includes an array of solid-state memory devices are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is assigned an array address by an array mount. An memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array mount configuration is used to unconditionally select the device mounted.Type: ApplicationFiled: February 23, 2004Publication date: August 26, 2004Inventors: Karl M. J. Lofgren, Jeffrey Donald Stai, Anil Gupta, Robert D. Norman, Sanjay Mehrotra
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Patent number: 6763480Abstract: A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.Type: GrantFiled: December 26, 2002Date of Patent: July 13, 2004Assignee: SanDisk CorporationInventors: Eliyahou Harari, Robert D. Norman, Sanjay Mehrotra