Patents by Inventor Sanjay Patel

Sanjay Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080190580
    Abstract: A pinseam press fabric is smoothed in the area of the seam by depositing polyurethane particles having a size of about 1 to 500 micrometers across the seam of the felt defined by the ends of the fabric. The polyurethane particles are drawn into the seam end by the application of a vacuum. Once the particles are deposited, the fabric is heated so that the polyurethane particles melt to form a polymeric matrix.
    Type: Application
    Filed: February 9, 2007
    Publication date: August 14, 2008
    Inventors: Robert Crook, Sanjay Patel, Clifton Wilder
  • Publication number: 20080159681
    Abstract: Various embodiments provide an apparatus and a method for operating the apparatus. The apparatus, in one embodiment, may include an optical waveguide located over a substrate, the optical waveguide having a first segment and a second segment. The apparatus may further include a single heating element configured to heat both the first segment and the second segment, wherein a light propagation direction at a point in the second segment differs by at least 90 degrees with respect to a light propagation direction at the point in the first segment.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Applicant: Lucent Technologies Inc.
    Inventors: Douglas M. Gill, Sanjay Patel, Mahmoud Rasras
  • Patent number: 7383641
    Abstract: A through air dryer (TAD) fabric having a composite configuration whereby side fabric portions made of a more resistant material are woven to the main body portion of the fabric. Side fabric portions that are not protected from the paper web, and therefore exposed to harsher environmental conditions than the portion of the fabric covered by the paper web, deteriorate faster. By replacing the side portions that are exposed to harsher environment with more resistant material, the TAD fabric will last longer.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: June 10, 2008
    Assignee: Voith Paper Patent GmbH
    Inventors: Lippi Alves Fernandes, Sanjay Patel
  • Patent number: 7333691
    Abstract: An apparatus, including an optical ring resonator having a waveguide ring with substantially straight waveguide segments and bent waveguide segments. The bent waveguide segments are optically coupled to the substantially straight waveguide segments and have optical cores with substantially smaller cross-sectional areas than the substantially straight waveguide segments. The bent waveguide segments change a propagation direction of received light by more than ½ of a right angle.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: February 19, 2008
    Assignee: Lucent Technologies Inc.
    Inventors: Douglas M. Gill, Sanjay Patel, Mahmoud Rasras
  • Publication number: 20080013876
    Abstract: Optical modulator devices exhibiting improved response characteristics are constructed from a ring resonator having a tunable loss element positioned within the ring resonator structure and one or more phase shifters. By tuning and/or controlling the loss within the resonator, desired modulator response characteristics are obtained.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 17, 2008
    Applicant: LUCENT TECHNOLOGIES INC.
    Inventors: Douglas GILL, Mahmoud RASRAS, Sanjay PATEL
  • Publication number: 20080016325
    Abstract: In one embodiment, a processor comprises a core configured to execute instructions; a register file comprising a plurality of storage locations; and a window management unit. The window management unit is configured to operate the plurality of storage locations as a plurality of windows, wherein register addresses encoded into the instructions identify storage locations among a subset of the plurality of storage locations that are within a current window. Additionally, the window management unit is configured to allocate a second window in response to a predetermined event. One of the current window and the second window serves as a checkpoint of register state, and the other one of the current window and the second window is updated in response to instructions processed subsequent to the checkpoint. The checkpoint may be restored if the speculative execution results are discarded.
    Type: Application
    Filed: July 12, 2006
    Publication date: January 17, 2008
    Inventors: James P. Laudon, Adam R. Talcott, Sanjay Patel, Thirumalai S. Suresh
  • Publication number: 20070299634
    Abstract: In one embodiment, a system and method for an automated analysis system for semiconductor manufacturing fabrication is disclosed. In one embodiment, the system comprises one or more site databases that each store data generated by an associated one or more semiconductor fabrication plants, a configuration database, and a server communicatively coupled to the one or more site databases and the configuration database, the server to analyze the data from the one or more site databases upon a request by a client, the data to be analyzed based on configuration settings in the configuration database that provide uniform configuration synchronization for applying algorithms to the data. Other embodiments are also described.
    Type: Application
    Filed: June 27, 2006
    Publication date: December 27, 2007
    Inventors: Sutirtha Bhattacharya, Brenda Buttrick, David Eggleston, Ayman Fayed, Raj Mohan, Girish Nirgude, Sanjay Patel, Ashit Sawhney, Raghu Yeluri
  • Patent number: 7310709
    Abstract: A method and apparatus is disclosed for maintaining coherency between a primary cache and a secondary cache in a directory-based cache system. Upon identifying a parity error in the primary cache, a tag parity packet and a load instruction are sent from the primary cache to the secondary cache. In response to the tag parity packet, each tag entry in the secondary cache that is associated with the parity error is invalidated. Upon receiving an acknowledgment of receipt of the tag parity packet, the primary cache functions to invalidate each tag entry in the primary cache that is associated with the parity error. Then, the secondary cache communicates data requested in the load instruction to the primary cache.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: December 18, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Kathirgamar Aingaran, Ramaswamy Sivaramakrishnan, Sanjay Patel
  • Publication number: 20070270444
    Abstract: This invention describes novel pyrazole compounds of formula IV: wherein Ring D is a 5-7 membered monocyclic ring or 8-10 membered bicyclic ring selected from aryl, heteroaryl, heterocyclyl or carbocyclyl; Rx and Ry are independently selected from T-R3, or taken together with their intervening atoms to form a fused, unsaturated or partially unsaturated, 5-8 membered ring having 1-3 ring heteroatoms selected from oxygen, sulfur, or nitrogen; and R2, R2?, T, and R3 are as described in the specification. The compounds are useful as protein kinase inhibitors, especially as inhibitors of aurora-2 and GSK-3, for treating diseases such as cancer, diabetes and Alzheimer's disease.
    Type: Application
    Filed: March 6, 2006
    Publication date: November 22, 2007
    Inventors: David Bebbington, Hayley Binch, Ronald Knegtel, Julian Golec, Sanjay Patel, Jean-Damien Charrier, David Kay, Robert Davies, Pan Li, Marion Wannamaker, Cornelia Forster, Albert Pierce
  • Publication number: 20070264741
    Abstract: A fixed parallel plate micro-mechanical systems (MEMS) based sensor is fabricated to allow a dissolved dielectric to flow through a porous top plate, coming to rest on a bottom plate. A post-deposition bake ensures further purity and uniformity of the dielectric layer. In one embodiment the dielectric is a polymer. In one embodiment, a support layer is deposited onto the top plate for strengthening the sensor. In another embodiment, the bottom plate is dual-layered for a narrowed gap. Integrated circuit arrays of such sensors can be made, having multiple devices separated from each other by a physical barrier, such as a polycrystalline containment rim or rough, for preventing polymer material from one sensor from Interfering with that of another.
    Type: Application
    Filed: March 20, 2007
    Publication date: November 15, 2007
    Inventors: Sanjay Patel, Bernd Fruhberger, Erno Klaassen, Todd Misna, David Baselt
  • Patent number: 7281096
    Abstract: A hardware implemented method for writing data to a cache is provided. In this hardware implemented method, a Block Initializing Store (BIS) instruction is received to write the data from a processor core to a memory block. The BIS instruction includes the data from the processor core. Thereafter, a dummy read request is sent to a memory controller and known data is received from the memory controller without accessing a main memory. The known data is then written to the cache and, after the known data is written, the data from the processor core is written to the cache. A system and processor for writing data to the cache also are described.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: October 9, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Ramaswamy Sivaramakrishnan, Sunil Vemula, Sanjay Patel, James P. Laudon
  • Publication number: 20070220378
    Abstract: Read and write data steering logic in the I/O of a memory array is tested by providing a data bus lane for each addressable subunit of a memory array storage location. Each bus lane is connected to the data input of a comparator. A BIST controller writes test patterns to the memory through the write steering logic and reads the test patterns in parallel to test the write steering logic. The BIST controller writes test patterns to the memory in parallel and reads the test patterns through the read steering logic to test the read steering logic. In both cases, a separate comparator dedicated to each bus lane verifies that the subunit data was properly shifted between the data bus lane and memory storage location subunit. The comparators are effectively disabled during normal operations to prevent logic gate switching.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 20, 2007
    Inventors: Lakshmikant Mamileti, Anand Krishnamurthy, Clint Wayne Mumford, Sanjay Patel
  • Publication number: 20070216651
    Abstract: The invention relates to an improved keyboard and keyboard driver for facilitating a reduction in the number of key presses required to create or delete a given data string (i.e. mnemonics, abbreviations, words, sentences, paragraphs etc.). The keyboard includes an array of keys having multi-character indicia and an interface system comprising data storage means; data processing means; and data display means, wherein the data processing means reduces key presses by filtering data stored within the data storage means by initial character, as determined by the character or characters ascribed to a data input key initially pressed by a user, and prioritizing the filtered data in real-time according to user-configurable prioritization parameters (using qualitative and/or quantitative information relating to each data string stored within the storage means). The invention also provides improved calculator functionality and function-lock keys.
    Type: Application
    Filed: March 23, 2005
    Publication date: September 20, 2007
    Inventor: Sanjay Patel
  • Publication number: 20070208968
    Abstract: A multi-port memory array is tested by simultaneously writing data to the array via two or more write ports, and/or simultaneously reading data from the array via two or more read ports, at the processor operating frequency. Comparing the data read from the array to that written to the array may be performed sequentially or in parallel. Comparator circuits are effectively disabled during normal processor operations. By simultaneously writing and/or reading data via multiple ports, latent electrical marginalities may be exposed. In addition, writing test patterns using multiple write ports and reading the patterns using multiple read ports significantly reduces test time during semiconductor manufacturing tests.
    Type: Application
    Filed: March 1, 2006
    Publication date: September 6, 2007
    Inventors: Anand Krishnamurthy, Clint Mumford, Lakshmikant Mamileti, Sanjay Patel
  • Patent number: 7260924
    Abstract: A pintle for joining the ends of a pin-seamable paper machine fabric wherein the pintle comprises a braided sheath of an ultra high molecular weight polyethylene yarn and optionally is filled with polyamide monofilament or polyethylene yarn. The pintle is configured to substantially fill the voids in the fabric loops when inserted so that a smoother seam is achieved that significantly reduces marks on the resultant paper.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: August 28, 2007
    Assignee: Voith Fabrics, Inc.
    Inventors: Sanjay Patel, Robert L. Crook, Jr., Bryan Wilson
  • Publication number: 20070194406
    Abstract: A fixed parallel plate micro-mechanical systems (MEMS) based sensor is fabricated to allow a dissolved dielectric to flow through a porous top plate, coming to rest on a bottom plate. A post-deposition bake ensures further purity and uniformity of the dielectric layer. In one embodiment, the dielectric is a polymer. In one embodiment, a support layer is deposited onto the top plate for strengthening the sensor. In another embodiment, the bottom plate is dual-layered for a narrowed gap. Integrated circuit arrays of such sensors can be made, having multiple devices separated from each other by a physical barrier, such as a polycrystalline containment rim or trough, for preventing polymer material from one sensor from interfering with that of another.
    Type: Application
    Filed: October 2, 2006
    Publication date: August 23, 2007
    Applicant: Xsilogy, Inc.
    Inventors: Sanjay Patel, Bernd Fruhberger, Erno Klaassen, Todd Mlsna, David Baselt
  • Publication number: 20070167099
    Abstract: A paper machine fabric INCLUDES A fabric having a roll side and a paper side and a surface matrix on the paper side; and a chrome complex treatment in the surface matrix. The chrome complex treatment chemically reacts with the surface matrix and orients hydrophobic organic chains away from the surface of the fabric and thereby provides enhanced release property.
    Type: Application
    Filed: January 17, 2007
    Publication date: July 19, 2007
    Inventors: Sanjay Patel, Robert Crook
  • Publication number: 20070155269
    Abstract: A press felt for the press section of a papermaking machine can include a base fabric and at least one layer of an assembly of fibers, can form a carded web or batt, the assembly of fibers containing a plurality of fibers. The press felts can be produced with reduced fine diameter surface cap loss without having to “contaminate” the surface of a fabric with a high percentage of bonding resin, while preserving a high degree of permeability in the overall structure. Other aspects of the disclosure are directed to a method for applying a bonding resin to a press felt.
    Type: Application
    Filed: August 24, 2006
    Publication date: July 5, 2007
    Inventors: Sanjay Patel, Robert Crook, Bryan Wilson
  • Publication number: 20070095496
    Abstract: A method of joining two ends of a fabric for use in a paper machine, carried out using a joining assembly, includes the steps of: placing a first end of the fabric on a first portion of a pin plate, the pins in the first portion of the pin plate extending into the first end; placing a second end of the fabric on a second portion of the pin plate such that the first end and the second end are in close proximity to each other in a join area, the pins in the second portion of the pin plate extending into the second end; and joining the first end and the second end in the join area. The method results in a perforated (and therefore permeable) join area.
    Type: Application
    Filed: August 25, 2006
    Publication date: May 3, 2007
    Inventors: Sanjay Patel, Robert Crook, Bryan Wilson
  • Patent number: 7207356
    Abstract: A through-air dryer (TAD) fabric formed by interweaving of a warp yarn system with a weft yarn system. The TAD fabric has a paper side with a contact area between 20% and 30%. The warp yarn system includes flat warp yarns and/or the weft yarn system includes flat weft yarns which have not been subjected to a sanding process after weaving of the fabric and which have an aspect ratio of 1.15:1 to 1.35:1.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: April 24, 2007
    Assignee: Voith Paper Patent GmbH
    Inventors: Sanjay Patel, Jeff Herman