Patents by Inventor Sanjay Subbarao

Sanjay Subbarao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200393994
    Abstract: A memory sub-system having memory cells formed on a plurality of integrated circuit dies. After receiving a command from a host system to store data, the memory sub-system queues the command to allocate pages of memory cells in a plurality of dies in the plurality of integrated circuit dies based on a determination that each of the plurality of dies is available to perform a data programming operation for the command. Based on the page application, the memory sub-system generates a portion of a media layout to at least map logical addresses of the data identified in the command to the allocated pages and receives the data from the host system. The memory sub-system stores the data into the pages using a multi-pass programming technique, where an atomic multi-pass programming operation can be configured to use at least two pages in separate planes in one or more dies in the plurality of integrated circuit dies to program at least a portion of the data.
    Type: Application
    Filed: May 4, 2020
    Publication date: December 17, 2020
    Inventors: Sanjay Subbarao, Steven S. Williams, Mark Ish, John Edward Maroney
  • Patent number: 10860508
    Abstract: Data management functions are offloaded from a main controller to individual storage devices in a multi-device storage environment. The main controller receives a data management request from a host system, and responds by determining one or more storage devices and one or more data management operations to be performed by the one or more storage devices. The main controller initiates performance of a data management function corresponding to the data management request, by sending one or more data management commands to the one or more storage devices, and initiating one or more data transfers, such as a direct memory access operation to transfer data between a memory buffer of a storage device and a host memory buffer of the host system, and an internal data transfer between two or more of the storage devices using an internal communication fabric of the data storage subsystem.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: December 8, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Vladislav Bolkhovitin, Sanjay Subbarao, Brian W. O'Krafka, Anand Kulkarni, Warren Fritz Kruger
  • Publication number: 20200379684
    Abstract: A memory sub-system configured to predictively schedule the transfer of data to reduce idle time and the amount and time of data being buffered in the memory sub-system. For example, write commands received from a host system can be queued without buffering the data of the write commands at the same time. When executing a first write command using a media unit, the memory sub-system can predict a duration to a time the media unit becoming available for execution of a second write command. The communication of the data of the second command from the host system to a local buffer memory of the memory sub-system can be postponed and initiated according to the predicted duration. After the execution of the first write command, the second write command can be executed by the media unit without idling to store the data from the local buffer memory.
    Type: Application
    Filed: May 4, 2020
    Publication date: December 3, 2020
    Inventors: Sanjay Subbarao, Steven S. Williams, Mark Ish
  • Publication number: 20200363995
    Abstract: A memory sub-system configured to partially execute write commands from a host system to optimize performance. After receiving a write command from a host system, the memory sub-system can identify, based on a media physical layout, a preferred input/output size for the execution of the write command. The memory sub-system can execute the write command according to the preferred input/output size, configure a response for the write command to identify the second input/output size, and transmit the response identifying the second input/output size to the host system. The host system is configured to generate a subsequent write command to write at least the data that is initially identified in the write command that has been executed but not been included in the execution of the write command performed according to the preferred input/output size.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 19, 2020
    Inventors: Sanjay Subbarao, Mark Ish
  • Publication number: 20200356484
    Abstract: A memory sub-system configured to schedule the transfer of data from a host system for write commands to reduce the amount and time of data being buffered in the memory sub-system. For example, after receiving a plurality of streams of write commands from a host system, the memory sub-system identifies a plurality of media units in the memory sub-system for concurrent execution of a plurality of write commands respectively. In response to the plurality of commands being identified for concurrent execution in the plurality of media units respectively, the memory sub-system initiates communication of the data of the write commands from the host system to a local buffer memory of the memory sub-system. The memory sub-system has capacity to buffer write commands in a queue, for possible out of order execution, but limited capacity for buffering only the data of a portion of the write commands that are about to be executed.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 12, 2020
    Inventor: Sanjay Subbarao
  • Publication number: 20200356307
    Abstract: A memory sub-system configured to dynamically determine input/output sizes of write commands based on a media physical layout of a memory sub-system. The memory sub-system can identify, dynamically in response to write commands being selected for execution in media units of the memory sub-system, a portion of a media layout that maps from logical addresses identified by the write commands in the logical address space to physical addresses of memory units in the media units. Based on the media layout, an input/output size for a next write command is identified and transmitted to the host system in a response. The host system generates the next write command and configures the amount of data to be written through the next write command based on based on the input/output size identified in the response.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 12, 2020
    Inventors: Sanjay Subbarao, Mark Ish
  • Publication number: 20200356306
    Abstract: A memory sub-system configured to dynamically generate a media layout to avoid media access collisions in concurrent streams. The memory sub-system can identify plurality of media units that are available to write data concurrently, select commands from the plurality of streams for concurrent execution in the available media units, generate and store a portion of a media layout dynamically in response to the commands being selected for concurrent execution in the plurality of media units, and executing the selected commands concurrently by storing data into the memory units according to physical addresses to which logical addresses used in the selected commands are mapped in the dynamically generated portion of the media layout.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 12, 2020
    Inventor: Sanjay Subbarao
  • Patent number: 10831603
    Abstract: Methods, systems, and other aspects for reconstructing data and rebuilding a failed storage device in a storage system using one or more functioning compute resources and/or storage resources of the failed storage device. For example, a method may include, responsive to a detection of a failed storage device in a storage system, locating data and redundancy information in functioning storage device(s) in the storage system for reconstructing data of the failed storage device; issuing peer-to-peer commands to the functioning storage device(s) to obtain the data and the redundancy information from the functioning storage device(s); and reconstructing the data of the failed storage device based on the data and the redundancy information obtained from the functioning storage device(s), wherein a functioning compute resource of the failed computing device at least partially performs one or more of the locating, issuing, and reconstructing.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: November 10, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Anand Kulkarni, Vladislav Bolkhovitin, Brian Walter O'Krafka, Sanjay Subbarao
  • Publication number: 20200327074
    Abstract: Example multi-device storage systems, storage devices, and methods provide hosted services on peer storage devices. Storage devices include a storage medium, a logical mapping memory, and a processor for executing hosted services using the logical mapping memory. Each storage device is configured to communicate with peer storage devices over an interconnect fabric. The logical mapping memory includes storage device media logical mapping information configured in continuous logical blocks with a media block size equal to a page programming size of the storage medium. The logical mapping memory also includes host logical mapping information, configured in host logical blocks with a host block size smaller than the media block size, for the peer storage devices.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Inventors: Sanjay Subbarao, Vladislav Bolkhovitin, Anand Kulkarni, Brian Walter O'Krafka
  • Patent number: 10769062
    Abstract: A Data Storage Device (DSD) includes a non-volatile memory configured to store data, and control circuitry configured to receive a memory access command from a host to access data in the non-volatile memory. A location is identified in the non-volatile memory for performing the memory access command using an Address Translation Layer (ATL) that has a finer logical-to-physical granularity than a logical-to-physical granularity of a logical block-based file system executed by the host or a granularity based on a memory Input/Output (IO) transaction size of a processor of the host. The non-volatile memory is accessed at the identified location to perform the memory access command.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: September 8, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventor: Sanjay Subbarao
  • Patent number: 10761929
    Abstract: A system and method improve the performance of non-volatile memory storage by rebuilding, on the fly, “lost data” in response to a read request, which identifies data to be read or recovered, by identifying a parity data storage device in a set of data storage devices that contains parity corresponding to the identified data; sending a reconstruction request to a respective data storage device, which may be the parity data storage device or other data storage device in the system, to reconstruct the identified data, and receiving the identified data from the respective data storage device. The reconstruction request commands the respective data storage device to retrieve, via peer-to-peer read requests, from other data storage devices, data from one or more data blocks, and to reconstruct the identified data based on the retrieved data and parity data locally stored at the parity data storage device.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: September 1, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Vladislav Bolkhovitin, Brian W. O'Krafka, Sanjay Subbarao
  • Publication number: 20200257590
    Abstract: A system and method improve the performance of non-volatile memory storage by rebuilding, on the fly, “lost data” in response to a read request, which identifies data to be read or recovered, by identifying a parity data storage device in a set of data storage devices that contains parity corresponding to the identified data; sending a reconstruction request to a respective data storage device, which may be the parity data storage device or other data storage device in the system, to reconstruct the identified data, and receiving the identified data from the respective data storage device. The reconstruction request commands the respective data storage device to retrieve, via peer-to-peer read requests, from other data storage devices, data from one or more data blocks, and to reconstruct the identified data based on the retrieved data and parity data locally stored at the parity data storage device.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 13, 2020
    Inventors: Vladislav Bolkhovitin, Brian W. O'Krafka, Sanjay Subbarao
  • Patent number: 10725859
    Abstract: A system and method improve the performance of non-volatile memory storage by offloading parity computations to facilitate high speed data transfers, including direct memory access (DMA) transfers, between a remote host and a non-volatile memory based storage system, such as a flash memory based data storage device (e.g., SSD). In conjunction with writing to non-volatile memory storage, a stripe map is used to target a selected data storage device for parity generation. All data of a stripe is transmitted to the selected data storage device to generate the parity and the generated parity is propagated from the selected data storage device to other data storage devices in the stripe. The data for the stripe may also be propagated from the selected data storage device to the other data storage devices in the stripe.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: July 28, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Vladislav Bolkhovitin, Brian W. O'Krafka, Sanjay Subbarao
  • Patent number: 10725941
    Abstract: Example multi-device storage systems, storage devices, and methods provide hosted services on peer storage devices. Storage devices include local memory resources, such as operating memory, remotely addressable memory, or logical mapping memory, and compute resources, such as a processor or coding engine. Each storage device is configured to communicate with a plurality of peer storage devices over an interconnect fabric. The storage devices identify requested hosted services from service host requests received through the interconnect fabric. The storage devices store a plurality of hosted services are to enable access to local memory resources and local compute resources for data management operations for the plurality of peer storage devices.
    Type: Grant
    Filed: June 30, 2018
    Date of Patent: July 28, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sanjay Subbarao, Vladislav Bolkhovitin, Anand Kulkarni, Brian Walter O'Krafka
  • Publication number: 20200218463
    Abstract: A method of indirection replay for a flash storage system includes writing data, in a host stream, to blocksets of the flash storage system. The host blocksets are assigned a major sequence number incremented from the most recently closed host blockset. The method includes writing an indirection journal to each host blockset which are associated with the assigned major sequence number. The method includes writing data, in a garbage collection (GC) stream, to other blocksets of the flash storage system. The GC blocksets are assigned a major sequence number, based on the most recently closed host blockset, and a minor sequence number, incremented from the most recently closed GC blockset. The method includes writing an indirection journal to each GC blockset which are associated with the assigned major and minor sequence numbers. The indirection table is constructed by replaying the journals of the blocksets in order of major sequence and minor sequence numbers.
    Type: Application
    Filed: March 19, 2020
    Publication date: July 9, 2020
    Inventors: David George DREYER, Colin Christopher MCCAMBRIDGE, Phillip PETERSON, Sanjay SUBBARAO
  • Patent number: 10642525
    Abstract: A main controller in a data storage system having multiple storage devices determines an initial set of memory block candidates for data lifetime operations by receiving from each of a plurality of the storage devices information identifying one or more potential memory block candidates, with respective received memory blocks having been classified by respective storage devices as potential candidates. The main controller determines a set of related memory blocks, and, based on received usage information for the candidate memory blocks and the related memory blocks, selects a target group of memory blocks and initiates performance of the data lifetime operations on the memory blocks of the selected target group.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: May 5, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Vladislav Bolkhovitin, Sanjay Subbarao, Brian W. O'Krafka, Anand Kulkarni
  • Patent number: 10635341
    Abstract: A method of indirection replay for a flash storage system includes writing data, in a host stream, to blocksets of the flash storage system. The host blocksets are assigned a major sequence number incremented from the most recently closed host blockset. The method includes writing an indirection journal to each host blockset which are associated with the assigned major sequence number. The method includes writing data, in a garbage collection (GC) stream, to other blocksets of the flash storage system. The GC blocksets are assigned a major sequence number, based on the most recently closed host blockset, and a minor sequence number, incremented from the most recently closed GC blockset. The method includes writing an indirection journal to each GC blockset which are associated with the assigned major and minor sequence numbers. The indirection table is constructed by replaying the journals of the blocksets in order of major sequence and minor sequence numbers.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: April 28, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: David George Dreyer, Colin Christopher McCambridge, Phillip Peterson, Sanjay Subbarao
  • Publication number: 20200104252
    Abstract: A Data Storage Device (DSD) includes a non-volatile memory configured to store data, and control circuitry configured to receive a memory access command from a host to access data in the non-volatile memory. A location is identified in the non-volatile memory for performing the memory access command using an Address Translation Layer (ATL) that has a finer logical-to-physical granularity than a logical-to-physical granularity of a logical block-based file system executed by the host or a granularity based on a memory Input/Output (IO) transaction size of a processor of the host. The non-volatile memory is accessed at the identified location to perform the memory access command.
    Type: Application
    Filed: January 11, 2019
    Publication date: April 2, 2020
    Inventor: Sanjay Subbarao
  • Publication number: 20200104047
    Abstract: A Data Storage Device (DSD) includes at least one non-volatile storage media. A command is received to modify a portion of a data object or file, with the command being byte-addressable for overwriting, deleting or adding the modified portion. The modified portion of the data object or file is written with an indication of a page container entry at a storage location in the at least one non-volatile storage media. The page container points to a previous storage location for previously written data for the data object or file that was most recently written before writing the modified portion. A mapping or data container entry in a container data structure is updated for the data object or file to point to the storage location storing the modified portion of the data object or file and the indication of the page container entry.
    Type: Application
    Filed: January 11, 2019
    Publication date: April 2, 2020
    Inventor: Sanjay Subbarao
  • Publication number: 20200042725
    Abstract: Example storage systems, storage devices, and methods provide secure transfer of data between peer storage devices using protection information. Data operation commands may be received that use a protection information data block format for transferring a target data block between peer storage devices. A local data operation may operate on the target data block in a first storage device and compare at least one protection information tag value to a first data check value. At least one destination verification protection information tag value and the target data block may be transferred to a second storage device through a peer communication channel. The destination verification protection information tag value may be compared to a destination data block protection information tag value by the second storage device. The second storage device may then execute a data operation on the target data block.
    Type: Application
    Filed: August 3, 2018
    Publication date: February 6, 2020
    Inventors: Vladislav Bolkhovitin, Stephen Gold, Adam Roberts, Sanjay Subbarao