Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: Stacked flex cable assemblies and their manufacture are described. One assembly includes a first flex cable and a second flex cable electrically coupled to the first flex cable. The assembly also includes a connector electrically coupled to the first flex cable. The first flex cable is positioned between the connector and the second flex cable. Other embodiments are described and claimed.

Abstract: An integrated circuit package is presented. In an embodiment, the integrated circuit package has contact pads formed on the top side of a package substrate, a die electrically attached to the contact pads, and input/output (I/O) pads formed on the top side of the package substrate. The I/O pads are electrically connected to the contact pads. The integrated circuit package also includes a flex cable receptacle electrically connected to the I/O pads on the top side of the package substrate. The flex cable receptacle is non-compressively attachable to a flex cable connector and includes receptacle connection pins electrically connected to the I/O pads.

Abstract: The present description relates to the field of fabricating microelectronic assemblies, wherein a microelectronic device may be attached to a microelectronic substrate with a plurality of shaped and oriented solder joints. The shaped and oriented solder joints may be substantially oval, wherein the major axis of the substantially oval solder joints may be substantially oriented toward a neutral point or center of the microelectronic device. Embodiments of the shaped and oriented solder joint may reduce the potential of solder joint failure due to stresses, such as from thermal expansion stresses between the microelectronic device and the microelectronic substrate.

Abstract: Embodiments related to integrated circuit (IC) connectors are described. In some embodiments, an IC assembly may include an IC package substrate, an intermediate member, and a male connector. The IC package substrate may have first signal contacts on a top or bottom surface, and the bottom surface may have second signal contacts for coupling with a socket on a circuit board. The intermediate member may have a first end coupled to the first signal contacts and a second end extending beyond the side surface. The male connector may be disposed at the second end of the intermediate member, and may have signal contacts coupled to the signal contacts of the intermediate member. The male connector may be mateable with a female connector when the female connector is brought into engagement in a direction parallel to the axis of the intermediate member. Other embodiments may be disclosed and/or claimed.

Abstract: The present description relates to the field of fabricating microelectronic assemblies, wherein a microelectronic device may be attached to a microelectronic substrate with a plurality of shaped and oriented solder joints. The shaped and oriented solder joints may be substantially oval, wherein the major axis of the substantially oval solder joints may be substantially oriented toward a neutral point or center of the microelectronic device. Embodiments of the shaped and oriented solder joint may reduce the potential of solder joint failure due to stresses, such as from thermal expansion stresses between the microelectronic device and the microelectronic substrate.

Abstract: A die package architecture with an embedded die and simplified redistribution layer is described. In one example a method includes attaching a front side of a die to a temporary carrier panel applying a molding compound around the die and over the temporary carrier panel. Removing the temporary carrier, applying a metal routing layer over the front side of the die and the molding compound, and applying a connection array to the metal routing layer.

Abstract: Embodiments related to integrated circuit (IC) connectors are described. In some embodiments, an IC assembly may include an IC package substrate, an intermediate member, and a male connector. The IC package substrate may have first signal contacts on a top or bottom surface, and the bottom surface may have second signal contacts for coupling with a socket on a circuit board. The intermediate member may have a first end coupled to the first signal contacts and a second end extending beyond the side surface. The male connector may be disposed at the second end of the intermediate member, and may have signal contacts coupled to the signal contacts of the intermediate member. The male connector may be mateable with a female connector when the female connector is brought into engagement in a direction parallel to the axis of the intermediate member. Other embodiments may be disclosed and/or claimed.

Abstract: Stacked flex cable assemblies and their manufacture are described. One assembly includes a first flex cable and a second flex cable electrically coupled to the first flex cable. The assembly also includes a connector electrically coupled to the first flex cable. The first flex cable is positioned between the connector and the second flex cable. Other embodiments are described and claimed.

Abstract: An integrated circuit package is presented. In an embodiment, the integrated circuit package has contact pads formed on the top side of a package substrate, a die electrically attached to the contact pads, and input/output (I/O) pads formed on the top side of the package substrate. The I/O pads are electrically connected to the contact pads. The integrated circuit package also includes a flex cable receptacle electrically connected to the I/O pads on the top side of the package substrate. The flex cable receptacle is non-compressively attachable to a flex cable connector and includes receptacle connection pins electrically connected to the I/O pads.

Abstract: Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part. The apparatus also includes a solder resistant coating covering the first part of the surface and leaving the second part of the surface uncovered. Other embodiments are described and claimed.

Abstract: An electronic device for transmitting data is described herein. In some examples, the electronic device includes a package substrate, and a plurality of integrated circuits to be coupled to the package substrate, at least one integrated circuit comprising a topside connector or an edge connector to be coupled to a cable that is to couple to a cable receptacle.

Abstract: The present description relates to the field of fabricating microelectronic assemblies, wherein a microelectronic device may be attached to a microelectronic substrate with a plurality of shaped and oriented solder joints. The shaped and oriented solder joints may be substantially oval, wherein the major axis of the substantially oval solder joints may be substantially oriented toward a neutral point or center of the microelectronic device. Embodiments of the shaped and oriented solder joint may reduce the potential of solder joint failure due to stresses, such as from thermal expansion stresses between the microelectronic device and the microelectronic substrate.

Abstract: Embodiments of the invention relate to a package-on-package (PoP) assembly comprising a top device package and a bottom device package interconnected by way of an electrically interconnected planar stiffener. Embodiments of the invention include a first semiconductor package having a plurality of inter-package contact pads and a plurality of second level interconnect (SLI) pads; a second semiconductor package having a plurality of SLI pads on the bottom side of the package; and a planar stiffener having a first plurality of planar contact pads on the top side of the stiffener electrically connected to the SLI pads of the second package, and a second plurality of planar contact pads electrically connected to the inter-package contact pads of the first package.

Abstract: Embodiments of the invention relate to a package-on-package (PoP) assembly comprising a top device package and a bottom device package interconnected by way of an electrically interconnected planar stiffener. Embodiments of the invention include a first semiconductor package having a plurality of inter-package contact pads and a plurality of second level interconnect (SLI) pads; a second semiconductor package having a plurality of SLI pads on the bottom side of the package; and a planar stiffener having a first plurality of planar contact pads on the top side of the stiffener electrically connected to the SLI pads of the second package, and a second plurality of planar contact pads electrically connected to the inter-package contact pads of the first package.

Abstract: An assembly of substrate packages interconnected with flex cables. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing detachable inter-package flex cable connection. The flex cable comprises a transmission region that includes a plurality of signal traces and a ground plane. A plurality of solder mask strips are disposed on the plurality of signals traces to provide anchoring for the signal traces. The solder mask strips intersect the signals traces. The exposed signal traces and the ground plane are coated with organic solderability preservative material. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package.

Abstract: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package flex cable connection. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package. Embodiments of the method of fabrication relate to simultaneously forming hermetically-sealed guiding through holes and I/O contact pads.

Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

Abstract: An assembly of substrate packages interconnected with flex cables. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing detachable inter-package flex cable connection. The flex cable comprises a transmission region that includes a plurality of signal traces and a ground plane. A plurality of solder mask strips are disposed on the plurality of signals traces to provide anchoring for the signal traces. The solder mask strips intersect the signals traces. The exposed signal traces and the ground plane are coated with organic solderability preservative material. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package.

Abstract: A column is coupled to a last metallization of a die and the column is mated to a mounting substrate with that aid of a solder. The column may have the solder attached thereto before mating to the mounting substrate and the mounting substrate may be a bare-board (no solder mask) during the mating process. The column has an aspect ratio between 0.75 and 10.