Patents by Inventor Santosh Sharma

Santosh Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200044648
    Abstract: A half bridge GaN circuit is disclosed. The half bridge GaN circuit includes a first power node having a first power voltage, where the first power voltage is referenced to a switch voltage at the switch node. The half bridge GaN circuit also includes a VMID power node having a VMID power voltage, where the VMID power voltage is referenced to the first power voltage and is less than the first power voltage by a DC voltage. The half bridge GaN circuit also includes a logic circuit, where a negative power terminal of the logic circuit is connected to the VMID node, and where a positive power terminal of the first logic circuit is connected to the first power node, where the logic circuit is configured to generate a logic output voltage, which controls the conductivity of the high side power switch.
    Type: Application
    Filed: August 28, 2019
    Publication date: February 6, 2020
    Applicant: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Santosh Sharma, Marco Giandalia, Daniel Marvin Kinzer, Thomas Ribarich
  • Patent number: 10554112
    Abstract: A GaN driver circuit is disclosed. The circuit includes a low side switch causing the voltage at an output node to be a first voltage, a high side switch causing the voltage at the output node to be a second voltage in response to a control signal, and a high side switch driver circuit configured to cause the high side switch to apply the second voltage to the output node. The high side switch driver includes a pull-down switch configured to turn off the high side switch in response to an input signal, and a pass gate configured to cause the high side switch to apply the second voltage to the output node by causing the voltage of the control signal to become substantially equal to the second voltage plus a third voltage.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: February 4, 2020
    Assignee: Navitas Semiconductor, Inc.
    Inventors: Santosh Sharma, Daniel Marvin Kinzer
  • Publication number: 20200028437
    Abstract: A half bridge circuit is disclosed. The circuit includes low side and high side power switches selectively conductive according to one or more control signals. The circuit also includes a low side power switch driver, configured to control the conductivity state of the low side power switch, and a high side power switch driver, configured to control the conductivity state of the high side power switch. The circuit also includes a controller configured to generate the one or more control signals, a high side slew detect circuit configured to prevent the high side power switch driver from causing the high side power switch to be conductive while the voltage at the switch node is increasing, and a low side slew detect circuit configured to prevent the low side power switch driver from causing the low side power switch to be conductive while the voltage at the switch node is decreasing.
    Type: Application
    Filed: March 4, 2019
    Publication date: January 23, 2020
    Inventors: Santosh Sharma, Thomas Ribarich, Victor Sinow, Daniel Marvin Kinzer
  • Patent number: 10536140
    Abstract: A half bridge circuit is disclosed. The circuit includes a GaN-based substrate, an oscillator on the substrate, and one or more components forming one or more of a low side power transistor, a low side driver, low side logic circuitry, a high side power transistor, a high side driver, and high side logic circuitry. At least one of the low side power transistor, the low side driver, the low side logic circuitry, the high side power transistor, the high side driver, and the high side logic circuitry is at least partially formed on the substrate. The oscillator is configured to generate non-overlapping pulses, and the non-overlapping pulses are separated by a dead time.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: January 14, 2020
    Assignee: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Thomas Ribarich, Santosh Sharma
  • Patent number: 10530169
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: January 7, 2020
    Assignee: Navitas Semiconductor, Inc.
    Inventors: Daniel Marvin Kinzer, Santosh Sharma, Ju Zhang
  • Publication number: 20200006482
    Abstract: A heterojunction bipolar transistor (HBT) is fabricated using a selectively implanted collector (SIC) implant mask including multiple openings located over the HBT's collector region. During the SIC implant process, resist mask edge (well proximity) effects caused by the SIC dopant passing through the multiple openings generates multiple secondary shallow increased-doping regions in the collector region adjacent to the substrate surface, where the mask openings are sized such that each secondary increased-doping region has a doping concentration that is comparable to primary increased-doping regions, which are simultaneously formed deeper in the SIC region. A base structure and an emitter structure are then formed over the SIC region using known techniques. The secondary increased-doping regions produce enhanced base-collector junction between the SIC region and the base structure that measurably decreases Kirk Effect by way of enhancing the HBT's cutoff frequency (Ft) and break-down voltage (BVCEO).
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Santosh Sharma, Edward J. Preisler
  • Publication number: 20190386503
    Abstract: An electronic circuit is disclosed. The electronic circuit includes a GaN substrate, a first power supply node on the substrate, an output node, a signal node, and an output component on the substrate, where the output component is configured to generate a voltage at the output node based at least in part on a voltage at the signal node. The electronic circuit also includes a capacitor coupled to the signal node, where, the capacitor is configured to selectively cause the voltage at the signal node to be greater than the voltage of the first power supply node, such that the output component causes the voltage at the output node to be substantially equal to the voltage of the first power supply node.
    Type: Application
    Filed: August 25, 2019
    Publication date: December 19, 2019
    Applicant: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Zhang
  • Publication number: 20190352644
    Abstract: Provided are methods for inhibiting cancer cell growth comprising contacting the cancer cell with an agent which inhibits the expression of the gene, or the activity of, apolipoprotein B editing catalytic 3G (APOBEC3G). Also provided are methods for identifying agents which can induce or inhibit C>U deamination in RNA driven by apolipoprotein B editing catalytic proteins. The method comprises contacting APOBEC3G with a suitable RNA substrate and determining the extent of C>U deamination under conditions which induce APOBEC driven C>U deamination.
    Type: Application
    Filed: August 5, 2019
    Publication date: November 21, 2019
    Inventors: Bora E. Baysal, Shraddha Sharma, Santosh K. Patnaik
  • Publication number: 20190326426
    Abstract: A gallium nitride transistor includes a substrate on which a source region, a drain region, a drift region and a gate region are defined. The drift region extends between the source region and the drain region. The gate region includes a combination of enhancement-mode and depletion-mode devices that are positioned across the drift region and are used together to control charge density and mobility of electrons in the drift region with a relatively low threshold voltage (Vth). Enhancement-mode devices are formed using a P-type layer disposed on the substrate and coupled to a gate electrode.
    Type: Application
    Filed: April 23, 2019
    Publication date: October 24, 2019
    Applicant: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Pil Sung Park, Maher J. Hamdan, Santosh Sharma, Daniel M. Kinzer
  • Patent number: 10454481
    Abstract: A GaN digital circuit is disclosed. The circuit includes a first output node on a substrate, a pull up switch connected to a first output node and a power supply node having a second voltage, a capacitor having a first terminal configured to cause the voltage at the gate of the pull up switch to increase to substantially the sum of the second voltage and a third voltage in response to the voltage at the first output node increasing to the second voltage. The circuit also includes a first depletion mode charging switch configured to cause a voltage at the first terminal of the capacitor to become substantially equal to the third voltage while the voltage at the first output node is substantially equal to the first voltage and is configured to be substantially nonconductive while the voltage at the first output node is substantially equal to the second voltage.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: October 22, 2019
    Assignee: NAVITAS SEMICONDUCTOR, INC
    Inventor: Santosh Sharma
  • Publication number: 20190319471
    Abstract: A half bridge circuit is disclosed. The half bridge circuit includes a low side transistor having a low side transistor gate, where a low side transistor gate voltage at the low side transistor gate is controlled by a low side gate signal. The half bridge circuit also includes a high side transistor having a high side transistor gate, where a high side transistor gate voltage at the high side transistor gate is controlled by a high side gate signal. The half bridge circuit also includes a semiconductor circuit configured to allow current to flow from a ground referenced power supply node to a first floating power supply terminal. The semiconductor circuit includes a first transistor, where a gate voltage is controlled by a gate drive circuit control signal, a source is connected to the ground referenced power supply node, and a drain connected to the first floating power supply terminal.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 17, 2019
    Applicant: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Patent number: 10404256
    Abstract: A half bridge GaN circuit is disclosed. The circuit includes a low side power switch configured to be selectively conductive according to one or more input signals, a high side power switch configured to be selectively conductive according to the one or more input signals, and a high side power switch controller, configured to control the conductivity of the high sigh power switch based on the one or more input signals. The high side power switch controller includes a capacitor, and a logic circuit, wherein the capacitor is configured to capacitively couple a signal based on the input signals to the logic circuit, and the logic circuit is configured to control the conductivity of the high sigh power switch based on the capacitively coupled signal.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: September 3, 2019
    Assignee: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Santosh Sharma, Marco Giandalia, Daniel Marvin Kinzer, Thomas Ribarich
  • Patent number: 10396579
    Abstract: An electronic circuit is disclosed. The electronic circuit includes a GaN substrate, a first power supply node on the substrate, an output node, a signal node, and an output component on the substrate, where the output component is configured to generate a voltage at the output node based at least in part on a voltage at the signal node. The electronic circuit also includes a capacitor coupled to the signal node, where, the capacitor is configured to selectively cause the voltage at the signal node to be greater than the voltage of the first power supply node, such that the output component causes the voltage at the output node to be substantially equal to the voltage of the first power supply node.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: August 27, 2019
    Assignee: NAVITAS SEMICONDUCTOR, INC.
    Inventors: Daniel Marvin Kinzer, Santosh Sharma, Ju Zhang
  • Publication number: 20190214993
    Abstract: A half bridge GaN circuit is disclosed. The circuit includes a low side power switch configured to be selectively conductive according to one or more input signals, a high side power switch configured to be selectively conductive according to the one or more input signals, and a high side power switch controller, configured to control the conductivity of the high sigh power switch based on the one or more input signals. The high side power switch controller includes a capacitor, and a logic circuit, wherein the capacitor is configured to capacitively couple a signal based on the input signals to the logic circuit, and the logic circuit is configured to control the conductivity of the high sigh power switch based on the capacitively coupled signal.
    Type: Application
    Filed: January 28, 2019
    Publication date: July 11, 2019
    Applicant: Navitas Semiconductor, Inc.
    Inventors: Santosh Sharma, Marco Giandalia, Daniel Marvin Kinzer, Thomas Ribarich
  • Patent number: 10333327
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: June 25, 2019
    Assignee: Navitas Semiconductor, Inc.
    Inventors: Daniel Marvin Kinzer, Santosh Sharma, Ju Jason Zhang
  • Patent number: 10305472
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments, a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: May 28, 2019
    Assignee: Navitas Semiconductor, Inc.
    Inventors: Daniel Marvin Kinzer, Santosh Sharma, Ju Zhang
  • Publication number: 20190158086
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments, a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions.
    Type: Application
    Filed: April 24, 2018
    Publication date: May 23, 2019
    Inventors: Daniel Marvin Kinzer, Santosh Sharma, Ju Zhang
  • Publication number: 20190147387
    Abstract: The present disclosure includes a prescriptive engine system and a method of using the prescriptive engine system. The method includes receiving information on actions and receiving information on participants, the information on the participants including first suitability information of at least one participant for at least one of the actions, generating, based on the first suitability information, second suitability information for a set of participants for at least one action, allocating, based on the second suitability information, the at least one action to the set of participants, deploying the at least one action to the set of participants, receiving, after the at least one action has been performed, results of the at least one action for each participant in the set of participants, and updating, based on the received results, the first suitability information of each participant in the set of participants for the at least one action.
    Type: Application
    Filed: August 29, 2018
    Publication date: May 16, 2019
    Inventors: Matthew Fritz, Venkata Pakkala, Mehmet Yunt, Santosh Chikoti, Saurabh Sharma
  • Publication number: 20190148961
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.
    Type: Application
    Filed: April 24, 2018
    Publication date: May 16, 2019
    Inventors: Daniel Marvin Kinzer, Santosh Sharma, Ju Jason Zhang
  • Patent number: 10277048
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: April 30, 2019
    Assignee: Navitas Semiconductor, Inc.
    Inventors: Daniel Marvin Kinzer, Santosh Sharma, Ju Zhang