Patents by Inventor Sarabjeet Singh

Sarabjeet Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11526822
    Abstract: Systems, computer program products, and methods are described herein for dynamic resource allocation based on vehicle route selection. The present invention is configured to receive an origin and a destination for a user; determine travel routes for the user; determine resource distribution entities along the one or more travel routes; determine resources associated with the resource distribution entities; display the travel routes, the resource distribution entities along each of the travel routes, and the resources associated with each of the resource distribution entities; receive a user selection of at least one of the travel routes; and distribute the resources to the computing device of the user along the at least one of the one or more travel routes selected by the user.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: December 13, 2022
    Assignee: BANK OF AMERICA CORPORATION
    Inventors: Sarabjeet Singh Kochar, Sandeep Kumar Chauhan, Yash Sharma
  • Patent number: 11144426
    Abstract: An apparatus includes a memory and processing circuitry. The memory stores a log for a user account. The log includes a first action performed by a user and a first date on which the first action was performed, a second action performed by the user and a second date on which the second action was performed. The processing circuitry receives a confirmation that a login occurred for the user account, determines a time of the login and first and second scores for the first and second actions. The prediction tool predicts that the first action is more likely to be performed than the second action. The prediction tool presents, on a display, a first link that when activated, causes the first action to be performed.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: October 12, 2021
    Assignee: Bank of America Corporation
    Inventor: Sarabjeet Singh Kochar
  • Publication number: 20210248533
    Abstract: Systems, computer program products, and methods are described herein for dynamic resource allocation based on vehicle route selection. The present invention is configured to receive an origin and a destination for a user; determine travel routes for the user; determine resource distribution entities along the one or more travel routes; determine resources associated with the resource distribution entities; display the travel routes, the resource distribution entities along each of the travel routes, and the resources associated with each of the resource distribution entities; receive a user selection of at least one of the travel routes; and distribute the resources to the computing device of the user along the at least one of the one or more travel routes selected by the user.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 12, 2021
    Applicant: Bank of America Corporation
    Inventors: Sarabjeet Singh Kochar, Sandeep Kumar Chauhan, Yash Sharma
  • Publication number: 20200379866
    Abstract: An apparatus includes a memory and processing circuitry. The memory stores a log for a user account. The log includes a first action performed by a user and a first date on which the first action was performed, a second action performed by the user and a second date on which the second action was performed. The processing circuitry receives a confirmation that a login occurred for the user account, determines a time of the login and first and second scores for the first and second actions. The prediction tool predicts that the first action is more likely to be performed than the second action. The prediction tool presents, on a display, a first link that when activated, causes the first action to be performed.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 3, 2020
    Inventor: Sarabjeet Singh Kochar
  • Patent number: 10802995
    Abstract: A system may include a host processor coupled to a communication bus, a first hardware accelerator communicatively linked to the host processor through the communication bus, and a second hardware accelerator communicatively linked to the host processor through the communication bus. The first hardware accelerator and the second hardware accelerator are directly coupled through an accelerator link independent of the communication bus. The host processor is configured to initiate a data transfer between the first hardware accelerator and the second hardware accelerator directly through the accelerator link.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: October 13, 2020
    Assignee: Xilinx, Inc.
    Inventors: Sarabjeet Singh, Hem C. Neema, Sonal Santan, Khang K. Dao, Kyle Corbett, Yi Wang, Christopher J. Case
  • Publication number: 20200301806
    Abstract: An apparatus includes a memory and processing circuitry. The memory stores a log for a user account. The log includes a first action performed by a user and a first date on which the first action was performed, a second action performed by the user and a second date on which the second action was performed, and a third action performed by the user and a third date on which the third action was performed. The processing circuitry receives a confirmation that a login occurred for the user account, determines a time of the login and first, second, and third scores for the first, second, and third actions. The prediction tool predicts that the first action is more likely to be performed than the second and third actions. The prediction tool presents, on a display, a first link that when activated, causes the first action to be performed.
    Type: Application
    Filed: March 19, 2019
    Publication date: September 24, 2020
    Inventor: Sarabjeet Singh Kochar
  • Patent number: 10776243
    Abstract: An apparatus includes a memory and processing circuitry. The memory stores a log for a user account. The log includes a first action performed by a user and a first date on which the first action was performed, a second action performed by the user and a second date on which the second action was performed, and a third action performed by the user and a third date on which the third action was performed. The processing circuitry receives a confirmation that a login occurred for the user account, determines a time of the login and first, second, and third scores for the first, second, and third actions. The prediction tool predicts that the first action is more likely to be performed than the second and third actions. The prediction tool presents, on a display, a first link that when activated, causes the first action to be performed.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: September 15, 2020
    Assignee: Bank of America Corporation
    Inventor: Sarabjeet Singh Kochar
  • Publication number: 20200081850
    Abstract: A system may include a host processor coupled to a communication bus, a first hardware accelerator communicatively linked to the host processor through the communication bus, and a second hardware accelerator communicatively linked to the host processor through the communication bus. The first hardware accelerator and the second hardware accelerator are directly coupled through an accelerator link independent of the communication bus. The host processor is configured to initiate a data transfer between the first hardware accelerator and the second hardware accelerator directly through the accelerator link.
    Type: Application
    Filed: July 26, 2018
    Publication date: March 12, 2020
    Applicant: Xilinx, Inc.
    Inventors: Sarabjeet Singh, Hem C. Neema, Sonal Santan, Khang K. Dao, Kyle Corbett, Yi Wang, Christopher J. Case
  • Publication number: 20190122245
    Abstract: Systems and methods including one or more processing modules and one or more non-transitory storage modules storing computing instructions configured to run on the one or more processing modules and perform acts of coordinating displaying a set of items of an online retailer on a user interface of a customer electronic device of a customer; receiving, from the customer electronic device, a first selection by the customer of a first item of the set of items to place the first item in an electronic shopping cart of the customer for a customer order; determining a first shipping cost to the online retailer for a first delivery of the first item to the customer by a first date from a first shipping location; determining a second shipping cost to the online retailer for the first delivery of the first item to the customer by a second date from the first shipping location, the second date occurring after the first date and the second shipping cost being less than the first shipping cost; determining a first order d
    Type: Application
    Filed: October 19, 2018
    Publication date: April 25, 2019
    Applicant: Walmart Apollo, LLC
    Inventors: Kartikay Sahay, Sarabjeet Singh, Yang Tang, Stephen Samuel Menaquale, Vikrant Tare, Karan Jain, Kritarth Upadhyay, Sindiri Sai Kumar, Puneet Kala
  • Patent number: 10104586
    Abstract: Systems, methods, and software can be used to transmit data over a radio access technology (RAT). In some aspect, a data transmission using a first radio access technology (RAT) is initiated at a mobile device. A timer is started at a first value. When the timer expires, it is determined that data remains to be transmitted. In response to determining that data remains to be transmitted: the data transmission is suspended, and a search is initiated for a second RAT for transmitting the remaining data. The second RAT provides a higher data rate than the first RAT.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 16, 2018
    Assignee: BlackBerry Limited
    Inventors: Renato Sitton, Sarabjeet Singh Sidhu, Kwong Hang Kevin Chan, Muhammad Khaledul Islam, Gordon Peter Young, Thomas Leonard Trevor Plestid
  • Publication number: 20180211201
    Abstract: Systems and methods including one or more processing modules and one or more non-transitory storage modules storing computing instructions configured to run on the one or more processing modules and perform acts of receiving a high-priority first order, receiving a low-priority second order, adding an elastic shipping buffer to the low-priority second order to (1) prevent the low-priority second order from being shipped from the fulfillment center before the high-priority first order and also (2) prevent the low-priority second order from being delivered at a final destination after a service level agreement delivery date, and transmitting instructions to a shipping system to ship the high-priority first order from the fulfillment center before shipping the low-priority second order.
    Type: Application
    Filed: January 24, 2017
    Publication date: July 26, 2018
    Applicant: WAL-MART STORES, INC.
    Inventors: Amritayan Nayak, Hem Singh, Rajiv Kumar Jain, Sarabjeet Singh
  • Publication number: 20180197132
    Abstract: Systems and methods including one or more processing modules and one or more non-transitory storage modules storing computing instructions configured to run on the one or more processing modules and perform acts of determining a product shipping cost for a product and coordinating a display on the electronic device of the user of the product shipping cost of a carrier shipping cost that is less than the maximum shipping cost for the product. The maximum shipping cost for the product can be determined by determining carriers comprising a transit time for shipping the product that is less than or equal to a shipping time requirement of a service level agreement with the user, determining a baseline cost for shipping the product, retrieving a fixed threshold cost for the product, and combining the fixed threshold cost and the baseline cost to determine a maximum shipping cost for the product.
    Type: Application
    Filed: January 9, 2017
    Publication date: July 12, 2018
    Applicant: WAL-MART STORES, INC.
    Inventors: Amritayan Nayak, Rajiv Jain, Sarabjeet Singh
  • Publication number: 20180092006
    Abstract: Systems, methods, and software can be used to transmit data over a radio access technology (RAT). In some aspect, a data transmission using a first radio access technology (RAT) is initiated at a mobile device. A timer is started at a first value. When the timer expires, it is determined that data remains to be transmitted. In response to determining that data remains to be transmitted: the data transmission is suspended, and a search is initiated for a second RAT for transmitting the remaining data. The second RAT provides a higher data rate than the first RAT.
    Type: Application
    Filed: December 4, 2017
    Publication date: March 29, 2018
    Applicant: BlackBerry Limited
    Inventors: Renato Sitton, Sarabjeet Singh Sidhu, Kwong Hang Kevin CHAN, Muhammad Khaledul ISLAM, Gordon Peter YOUNG, Thomas Leonard Trevor PLESTID
  • Patent number: 9838923
    Abstract: Systems, methods, and software can be used to transmit data over a radio access technology (RAT). In some aspect, a data transmission using a first radio access technology (RAT) is initiated at a mobile device. A timer is started at a first value. When the timer expires, it is determined that data remains to be transmitted. In response to determining that data remains to be transmitted: the data transmission is suspended, and a search is initiated for a second RAT for transmitting the remaining data. The second RAT provides a higher data rate than the first RAT.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: December 5, 2017
    Assignee: BlackBerry Limited
    Inventors: Renato Sitton, Sarabjeet Singh Sidhu, Kwong Hang Kevin Chan, Muhammad Khaledul Islam, Gordon Peter Young, Thomas Leonard Trevor Plestid
  • Publication number: 20150356543
    Abstract: Financial transaction data is retrieved from a financial institution. The financial transaction data includes a transaction value. The transaction value is compared to multiple pre-defined transaction identifiers and associated with one of the transaction identifiers. The financial transaction data and the associated transaction identifier are then stored in a storage mechanism.
    Type: Application
    Filed: April 27, 2015
    Publication date: December 10, 2015
    Inventors: Jeremy N. Sokolic, Balraj Suneja, Gautam Sinha, Amitava Parial, Sarabjeet Singh, Sanjeev Dheer
  • Patent number: 8872587
    Abstract: Apparatuses for generating negative impedance compensation are provided. Embodiments include a differential amplifier having a first output and a second output; a capacitor coupled between the first output and the second output of the differential amplifier; a first negative impedance cross-coupled circuit having a first output and a second output; and a resistance control circuit coupled in series between the first output and the second output of the differential amplifier and the first output and the second output of the first negative impedance cross-coupled circuit.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: October 28, 2014
    Assignee: International Business Machines Corporation
    Inventors: Rajesh Cheeranthodi, John F. Ewen, Santhosh Madhavan, Giri N. K. Rangan, Umesh K. Shukla, Sarabjeet Singh
  • Publication number: 20140253236
    Abstract: Apparatuses for generating negative impedance compensation are provided. Embodiments include a differential amplifier having a first output and a second output; a capacitor coupled between the first output and the second output of the differential amplifier; a first negative impedance cross-coupled circuit having a first output and a second output; and a resistance control circuit coupled in series between the first output and the second output of the differential amplifier and the first output and the second output of the first negative impedance cross-coupled circuit.
    Type: Application
    Filed: March 6, 2013
    Publication date: September 11, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: RAJESH CHEERANTHODI, JOHN F. EWEN, SANTHOSH MADHAVAN, GIRI N.K. RANGAN, UMESH K. SHUKLA, SARABJEET SINGH
  • Patent number: 8383172
    Abstract: Methods for separation and recovery of individual cyclic peptides from plant materials, said method comprising the steps of: (a) extracting an oil from a plant material; (b) separating the extracted oil into a non-polar fraction and a polar fraction; (c) separation and recovery of cyclic peptides from the non-polar fraction, and (d) separation and recovery of cyclic peptides from the polar fraction. The methods are suitable for separation and recovery of individual cyclolinopeptides from flax seed oil. Individual cyclolinopeptides are useful for modulation physiological disorders associated with apoptosis. Modified flaxseed oils may be produced by commingling flaxseed oils absent cyclolinopeptides, with at least one cyclolinopeptide separated and recovered with the methods disclosed herein.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: February 26, 2013
    Assignee: University of Saskatchewan
    Inventors: Martin J. Reaney, Yunhua Jia, Jianheng Shen, Cynthia Schock, Nancy Tyler, Jim Elder, Sarabjeet Singh
  • Publication number: 20110111073
    Abstract: Methods for separation and recovery of individual cyclic peptides from plant materials, said method comprising the steps of: (a) extracting an oil from a plant material; (b) separating the extracted oil into a non-polar fraction and a polar fraction; (c) separation and recovery of cyclic peptides from the non-polar fraction, and (d) separation and recovery of cyclic peptides from the polar fraction. The methods are suitable for separation and recovery of individual cyclolinopeptides from flax seed oil. Individual cyclolinopeptides are useful for modulation physiological disorders associated with apoptosis. Modified flaxseed oils may be produced by comingling flaxseed oils absent cyclolinopeptides, with at least one cyclolinopeptide separated and recovered with the methods disclosed herein.
    Type: Application
    Filed: December 22, 2008
    Publication date: May 12, 2011
    Applicant: University of Saskatchewan
    Inventors: Martin J. Reaney, Yunhua Jia, Jianheng Shen, Cynthia Schock, Nancy Tyler, Jim Elder, Sarabjeet Singh
  • Publication number: 20090302893
    Abstract: “Negative And” (NAND) logic gate metal oxide semiconductor field effect transistor (MOSFET) switch(es) are incorporated in the first stage of a “pseudo” current mode logic (CML) latch to provide a low-resistance (or high-resistance) circuit path to the output depending on the input voltage. These switch(es) are also used to deactivate (or “switch-off”) the first stage of the circuit during the second half of a timing clock cycle, so as to permit the first stage to be activated (or “switched-on”) only during the first half of a clock cycle. “Cross-coupled” inverter(s) are also used in the second stage of the circuit to provide acceptable “rail-to-rail” output voltage differential “swing” using less current.
    Type: Application
    Filed: June 5, 2008
    Publication date: December 10, 2009
    Inventor: Sarabjeet Singh