Patents by Inventor Sarabjeet Singh

Sarabjeet Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090302915
    Abstract: The incorporation of MOS (metal oxide semiconductor) switches in the first stage of a CML latch, which act to bring about a significant savings in current usage, and thus lower power, as well as full rail-to-rail output swing. This/these switch(es) are also used to deactivate the first stage of the circuit during the second half of a timing clock cycle, so as to permit the first stage to be activated only during the first half of a clock cycle. “Cross-coupled” inverter(s) are also used in the second stage of the circuit to provide acceptable “rail-to-rail” output voltage differential “swing” using less current. In addition, the second stage also has MOSFET switch(es) which activate only during the second half of a timing clock cycle and are deactivated during the first half of a clock cycle, which requires use of less current and thus reduces power consumption.
    Type: Application
    Filed: June 5, 2008
    Publication date: December 10, 2009
    Inventor: Sarabjeet Singh
  • Publication number: 20090302916
    Abstract: “Negative And” (NAND) logic gate metal oxide semiconductor field effect transistor (MOSFET) switch(es) incorporated in the first stage of a “pseudo” current mode logic (CML) latch to provide a low-resistance (or high-resistance) circuit path to the output depending on the input voltage. This/these switch(es) are also used to deactivate the first stage of the circuit during the second half of a timing clock cycle, so as to permit the first stage to be activated only during the first half of a clock cycle. “Cross-coupled” inverter(s) are also used in the second stage of the circuit to provide acceptable “rail-to-rail” output voltage differential “swing” using less current. In addition, the second stage also has MOSFET switch(es) which activate only during the second half of a timing clock cycle and are deactivated during the first half of a clock cycle, which requires use of less current and thus reduces power consumption.
    Type: Application
    Filed: June 5, 2008
    Publication date: December 10, 2009
    Inventor: Sarabjeet Singh
  • Patent number: 7383490
    Abstract: Methods and apparatus perform fault isolation in multiple node computing systems using commutative error detection values for—example, checksums—to identify and to isolate faulty nodes. When information associated with a reproducible portion of a computer program is injected into a network by a node, a commutative error detection value is calculated. At intervals, node fault detection apparatus associated with the multiple node computer system retrieve commutative error detection values associated with the node and stores them in memory. When the computer program is executed again by the multiple node computer system, new commutative error detection values are created and stored in memory. The node fault detection apparatus identifies faulty nodes by comparing commutative error detection values associated with reproducible portions of the application program generated by a particular node from different runs of the application program. Differences in values indicate a possible faulty node.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: June 3, 2008
    Assignee: International Business Machines Corporation
    Inventors: Gheorghe Almasi, Matthias Augustin Blumrich, Dong Chen, Paul Coteus, Alan Gara, Mark E. Giampapa, Philip Heidelberger, Dirk I. Hoenicke, Sarabjeet Singh, Burkhard D. Steinmacher-Burow, Todd Takken, Pavlos Vranas
  • Publication number: 20060248370
    Abstract: The present invention concerns methods and apparatus for performing fault isolation in multiple node computing systems using commutative error detection values—for example, checksums—to identify and to isolate faulty nodes. In the present invention nodes forming the multiple node computing system are networked together and during program execution communicate with one another by transmitting information through the network. When information associated with a reproducible portion of a computer program is injected into the network by a node, a commutative error detection value is calculated and stored in commutative error detection apparatus associated with the node. At intervals, node fault detection apparatus associated with the multiple node computer system retrieve commutative error detection values saved in the commutative error detection apparatus associated with the node and stores them in memory.
    Type: Application
    Filed: April 14, 2005
    Publication date: November 2, 2006
    Inventors: Gheorghe Almasi, Matthias Blumrich, Dong Chen, Paul Coteus, Alan Gara, Mark Giampapa, Philip Heidelberger, Dirk Hoenicke, Sarabjeet Singh, Burkhard Steinmacher-Burow, Todd Takken, Pavlos Vranas
  • Publication number: 20050187867
    Abstract: Financial transaction data is retrieved from a financial institution. The financial transaction data includes a transaction value. The transaction value is compared to multiple pre-defined transaction identifiers and associated with one of the transaction identifiers. The financial transaction data and the associated transaction identifier are then stored in a storage mechanism.
    Type: Application
    Filed: January 31, 2005
    Publication date: August 25, 2005
    Inventors: Jeremy Sokolic, Balraj Suneja, Gautam Sinha, Amitava Parial, Sarabjeet Singh, Sanjeev Dheer
  • Publication number: 20040236653
    Abstract: Financial data having multiple financial data elements is retrieved from a data source. A procedure identifies multiple rules associated with the financial data elements. Those multiple rules are applied to the financial data elements such that each of the financial data elements is associated with an identifier. The procedure then identifies additional information regarding a particular financial data element using the identifier associated with the financial data element.
    Type: Application
    Filed: January 30, 2004
    Publication date: November 25, 2004
    Inventors: Jeremy N. Sokolic, Balraj Suneja, Amitava Parial, Sarabjeet Singh, Gautam Sinha, Sanjeev Dheer