Patents by Inventor Satoru Higashino

Satoru Higashino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8934325
    Abstract: An information recording medium is provided with an information track formed thereon in a shape of concentric circles or in a spiral shape, wherein a continuously-wobbling groove in which information is recorded is formed in advance, the information is delimited by a predetermined number of wobble sections, a sync mark is placed in a plurality of wobble sections in the vicinity of a delimiter of the predetermined number of wobble sections, and the sync mark is spaced apart from data other than the sync mark at a distance.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: January 13, 2015
    Assignee: Sony Corporation
    Inventors: Satoru Higashino, Toshihiro Horigome
  • Publication number: 20140272915
    Abstract: An acceleration sensation presentation apparatus includes: a frame to be worn on the head of a user; at least one or more weights provided to the frame; and a vibration driving unit configured to vibrate the weight to be moved.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 18, 2014
    Applicant: Sony Corporation
    Inventors: Satoru Higashino, Toshihiro Horigome, Akira Suzuki, Naofumi Goto
  • Publication number: 20140219073
    Abstract: An information recording medium is provided with an information track formed thereon in a shape of concentric circles or in a spiral shape, wherein a continuously-wobbling groove in which information is recorded is formed in advance, the information is delimited by a predetermined number of wobble sections, a sync mark is placed in a plurality of wobble sections in the vicinity of a delimiter of the predetermined number of wobble sections, and the sync mark is spaced apart from data other than the sync mark at a distance.
    Type: Application
    Filed: January 24, 2014
    Publication date: August 7, 2014
    Applicant: Sony Corporation
    Inventors: Satoru Higashino, Toshihiro Horigome
  • Patent number: 8730776
    Abstract: Provided is a recording device, including a light irradiation/receiving unit that irradiates an optical recording medium with first light and second light, and that receives backpropagating light of the second light from the optical recording medium, a recording unit that carries out recording on the optical recording medium, a playback signal generating unit that obtains a playback signal of a signal, and a stray light signal component canceling unit that generates, based on recording data, a stray light cancel signal for canceling a stray light signal component.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: May 20, 2014
    Assignee: Sony Corporation
    Inventors: Satoru Higashino, Junichi Horigome, Mitsugu Imai, Yuuichi Suzuki
  • Patent number: 8724441
    Abstract: An encoding device for converting m-bit data words into n-bit (both n and m are integers and 2n?2m×2) code words includes a first encoding table in which 2m code words selected from the 2n n-bit code words correspond to 2m m-bit data words, a second encoding table in which 2m code words, which do not overlap with the code words in the first encoding table, of the 2n n-bit code words correspond to 2m m-bit data words, and an encoding unit which selects and outputs a code word, in which an absolute value of a code string DSV is smaller, from code words corresponding to the input m-bit data words in the first encoding table and code words corresponding to the input m-bit data words in the second encoding table.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: May 13, 2014
    Assignee: Sony Corporation
    Inventor: Satoru Higashino
  • Publication number: 20130322222
    Abstract: An optical information recording medium on which recording address information is performed by a CAV or a zone CAV system, wherein a groove wobbling continuously is formed in advance to record the information to the groove and a land abutting the groove, the address information is recorded by a wobble where a plurality of modulated waves modulated by the address information are multiply formed, the modulated wave is a higher harmonic wave whose frequency is a fundamental wave of the fundamental frequency of the wobble, or an integer times the fundamental frequency of the wobble, one modulated wave is modulated by the address information of one land of the abutting lands which interpose the groove, and the other modulated wave is modulated by the address information of the other land of the abutting lands which interpose the groove.
    Type: Application
    Filed: May 22, 2013
    Publication date: December 5, 2013
    Applicant: Sony Corporation
    Inventors: Toshihiro Horigome, Satoru Higashino, Hideki Ando
  • Publication number: 20130250744
    Abstract: Provided is a recording device, including a light irradiation/receiving unit that irradiates an optical recording medium with first light and second light, and that receives backpropagating light of the second light from the optical recording medium, a recording unit that carries out recording on the optical recording medium, a playback signal generating unit that obtains a playback signal of a signal, and a stray light signal component canceling unit that generates, based on recording data, a stray light cancel signal for canceling a stray light signal component.
    Type: Application
    Filed: February 28, 2013
    Publication date: September 26, 2013
    Applicant: Sony Corporation
    Inventors: Satoru Higashino, Junichi Horigome, Mitsugu Imai, Yuuichi Suzuki
  • Patent number: 8390483
    Abstract: A coding apparatus includes a transform table in which with regard to data words of m bits and code words of n bits where n and m are both integers and also n>m is established, 2m pieces of code words selected to have a tendency that the number of symbols “1” is small among the 2n pieces of code words of n bits are associated with the 2m pieces of data words of m bits and a coding unit that encodes input data words of m bits on the basis of the transform table.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: March 5, 2013
    Assignee: Sony Corporation
    Inventor: Satoru Higashino
  • Patent number: 8384567
    Abstract: An encoding apparatus that converts m-bit data words into n-bit code words, where m and n are both integers and satisfy an expression 2n?2m×2, includes a first conversion table in which 2m m-bit data words are associated with 2m n-bit code words selected from 2n n-bit code words, a second conversion table in which the 2m m-bit data words are associated with 2m n-bit code words that have been selected from the 2n n-bit code words and that do not overlap with the 2m n-bit code words in the first conversion table, and an encoder configured to select and output an n-bit code word with which an m-bit data word that has been input is associated in the first conversion table or an n-bit code word with which the m-bit data word that has been input is associated in the second conversion table, the selected and output n-bit code word having a smaller number of symbols “1”.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventor: Satoru Higashino
  • Patent number: 8339120
    Abstract: A measurement apparatus includes a moving average calculation section and a convergence judgment section. The moving average calculation section calculates a moving average by inputting a phase error between a phase of an input signal and a target phase, that is detected by a phase-locked loop circuit. The convergence judgment section judges that the phase-locked loop circuit is not converged when an absolute value of the moving average is equal to or larger than a first threshold value and judges that the phase-locked loop circuit is converged when the absolute value of the moving average is smaller than the first threshold value.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventor: Satoru Higashino
  • Patent number: 8059017
    Abstract: A modulation apparatus includes: a modulation section that modulates, in accordance with a correlation table where a data sequence with a predetermined number of bits is associated with a code sequence with a predetermined number of bits, the data sequence into the code sequence to allow a predetermined demodulation section to demodulate the code sequence into the data sequence in accordance with the correlation table, wherein the code sequence is, on NRZI method, a MSN code sequence where a null point of a frequency spectrum on a recording channel or communication channel of the code sequence is matched with a null point of a frequency spectrum of a PR equalized signal including the code sequence and a minimum run length is limited to be greater or equal to one.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: November 15, 2011
    Assignee: Sony Corporation
    Inventor: Satoru Higashino
  • Publication number: 20110273976
    Abstract: An encoding apparatus that converts m-bit data words into n-bit code words, where m and n are both integers and satisfy an expression 2n?2m×2, includes a first conversion table in which 2m m-bit data words are associated with 2m n-bit code words selected from 2n n-bit code words, a second conversion table in which the 2m m-bit data words are associated with 2m n-bit code words that have been selected from the 2n n-bit code words and that do not overlap with the 2m n-bit code words in the first conversion table, and an encoder configured to select and output an n-bit code word with which an m-bit data word that has been input is associated in the first conversion table or an n-bit code word with which the m-bit data word that has been input is associated in the second conversion table, the selected and output n-bit code word having a smaller number of symbols “1”.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 10, 2011
    Applicant: Sony Corporation
    Inventor: Satoru Higashino
  • Publication number: 20110273972
    Abstract: A coding apparatus includes a transform table in which with regard to data words of m bits and code words of n bits where n and m are both integers and also n>m is established, 2m pieces of code words selected to have a tendency that the number of symbols “1” is small among the 2n pieces of code words of n bits are associated with the 2m pieces of data words of m bits and a coding unit that encodes input data words of m bits on the basis of the transform table.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 10, 2011
    Applicant: Sony Corporation
    Inventor: Satoru Higashino
  • Publication number: 20110276990
    Abstract: An encoding device for converting m-bit data words into n-bit (both n and m are integers and 2n?2m×2) code words includes a first encoding table in which 2m code words selected from the 2n n-bit code words correspond to 2m m-bit data words, a second encoding table in which 2m code words, which do not overlap with the code words in the first encoding table, of the 2n n-bit code words correspond to 2m m-bit data words, and an encoding unit which selects and outputs a code word, in which an absolute value of a code string DSV is smaller, from code words corresponding to the input m-bit data words in the first encoding table and code words corresponding to the input m-bit data words in the second encoding table.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 10, 2011
    Applicant: Sony Corporation
    Inventor: Satoru Higashino
  • Patent number: 8027423
    Abstract: A synchronizing apparatus, which controls, by a PLL circuit, a sampling clock to be used to sample input data and synchronizes a phase of the sampling clock with a target phase that is desirable for sampling the input data, includes: phase error detection means for detecting a phase error from sampling data and the sampling clock, the sampling data being sampled from the input data at timing of the sampling clock; frequency error detection means for detecting, based on a differential coefficient obtained as a result of detecting the phase error, a frequency error; and frequency correction means for correcting a frequency of the sampling clock such that the detected frequency error becomes close to zero by adding a frequency correction value to an integral term of a loop filter of the PLL circuit, the frequency correction value being calculated based on the frequency error.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: September 27, 2011
    Assignee: Sony Corporation
    Inventor: Satoru Higashino
  • Patent number: 7825739
    Abstract: A signal processing circuit includes a feedback control loop that includes a loop filter and that detects the difference between a target value and a control value to control the difference so that the difference has a predetermined value. A closed loop formed in the feedback control loop is expressed by the delay of the entire closed loop serving as the feedback control loop, the loop filter, and simple integration of a final stage. The signal processing circuit includes a moving average calculating unit configured to calculate a moving average of outputs from the loop filter; a multiplying unit configured to multiply a value calculated in the loop filter by a certain gain; and an integrating unit provided upstream of the loop filter so that calculation results by the moving average calculating unit and the multiplication unit are concurrently fed back to an input into the loop filter.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: November 2, 2010
    Assignee: Sony Corporation
    Inventor: Satoru Higashino
  • Publication number: 20100231195
    Abstract: A measurement apparatus includes a moving average calculation section and a convergence judgment section. The moving average calculation section calculates a moving average by inputting a phase error between a phase of an input signal and a target phase, that is detected by a phase-locked loop circuit. The convergence judgment section judges that the phase-locked loop circuit is not converged when an absolute value of the moving average is equal to or larger than a first threshold value and judges that the phase-locked loop circuit is converged when the absolute value of the moving average is smaller than the first threshold value.
    Type: Application
    Filed: February 25, 2010
    Publication date: September 16, 2010
    Applicant: Sony Corporation
    Inventor: Satoru Higashino
  • Publication number: 20090179707
    Abstract: A signal processing circuit includes a feedback control loop that includes a loop filter and that detects the difference between a target value and a control value to control the difference so that the difference has a predetermined value. A closed loop formed in the feedback control loop is expressed by the delay of the entire closed loop serving as the feedback control loop, the loop filter, and simple integration of a final stage. The signal processing circuit includes a moving average calculating unit configured to calculate a moving average of outputs from the loop filter; a multiplying unit configured to multiply a value calculated in the loop filter by a certain gain; and an integrating unit provided upstream of the loop filter so that calculation results by the moving average calculating unit and the multiplication unit are concurrently fed back to an input into the loop filter.
    Type: Application
    Filed: December 8, 2008
    Publication date: July 16, 2009
    Applicant: Sony Corporation
    Inventor: Satoru HIGASHINO
  • Patent number: 7551668
    Abstract: An adaptive equalizing apparatus that can positively remove the leading Inter Symbol Interference (ISI), make a maximum-likelihood decoding and an optimum equalization on the basis of the result of the maximum-likelihood decoding with consideration being given to the asymmetry of an input waveform. The adaptive equalizing apparatus includes a feedforward filter, a maximum-likelihood decoder, a feedback filter, a delay unit, and a subtracter. In the feedback filter, the tap factor is controlled on the basis of the binary signal generated by the maximum-likelihood decoding to generate a distortion of a partial response after the leading edge of the binary signal and an ISI response after the trailing edge. In the feedforward filter, the tap factor for the signal supplied from the subtracter is controlled to be a partial response.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: June 23, 2009
    Assignee: Sony Corporation
    Inventors: Satoru Higashino, Yoshiyuki Kajiwara
  • Patent number: 7545862
    Abstract: For a waveform containing a partial response and distortion in only the leading-edge portion of inter-symbol interference (ISI) of a waveform equalized by a prior-stage feedforward filter (FFF) so as to satisfy causality, equalization that does not consider postcursor ISI subsequent to the partial response is performed; a feedback filter (FBF) uses a determination result of a decoding device to generate a response for the distortion of the partial response portion and the postcursor ISI; and the result is subtracted from an FFF output delayed by the amount of determination delay to create a desired partial response waveform. As a method for equalization that satisfies causality, a least mean square algorithm is applied to the partial response waveform generated as described above.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: June 9, 2009
    Assignee: Sony Corporation
    Inventor: Satoru Higashino