Patents by Inventor Satoru Tanigawa
Satoru Tanigawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11258927Abstract: A noise removal device includes a noise remover, a data compressor, a data decompressor, a stillness detector, and an output selector. For a second frame succeeding a first frame, the noise remover performs noise removal on input image data of the second frame to generate noise removed data, based on the input image data of the second frame and decompressed data of the first frame. For the second frame, the output selector: selects the input image data as output image data, when the stillness detector detects that the input image data is data of a still image; and selects the noise removed data as the output image data, when the stillness detector detects that the input image data is not the data of the still image.Type: GrantFiled: August 25, 2020Date of Patent: February 22, 2022Assignee: SOCIONEXT INC.Inventor: Satoru Tanigawa
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Publication number: 20200389572Abstract: A noise removal device includes a noise remover, a data compressor, a data decompressor, a stillness detector, and an output selector. For a second frame succeeding a first frame, the noise remover performs noise removal on input image data of the second frame to generate noise removed data, based on the input image data of the second frame and decompressed data of the first frame. For the second frame, the output selector: selects the input image data as output image data, when the stillness detector detects that the input image data is data of a still image; and selects the noise removed data as the output image data, when the stillness detector detects that the input image data is not the data of the still image.Type: ApplicationFiled: August 25, 2020Publication date: December 10, 2020Inventor: Satoru TANIGAWA
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Patent number: 8774547Abstract: A contour correcting device which includes a plurality of delay elements which delay an input video signal, a pixel-selection-control-signal generation circuit, a pixel selection circuit which selects outputs of the plurality of delay elements in response to outputs of the pixel-selection-control-signal generation circuit, a high-pass filter operation circuit and an adder circuit which adds an operation result of the high-pass filter operation circuit to the input video signal. When the pixel selection circuit extracts a contour component in a boundary portion between a horizontal video effective period and a period other than the horizontal video effective period of the input video signal, the pixel selection circuit replaces pixel data in the period other than the horizontal video effective period among pixel data input to the high-pass filter operation circuit, with pixel data at an edge-point of the horizontal video effective period.Type: GrantFiled: September 11, 2008Date of Patent: July 8, 2014Assignee: Panasonic CorporationInventors: Nobuko Fujita, Satoru Tanigawa
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Publication number: 20140036148Abstract: In order to convert frame repetition information generated by pulldown processing for generating repeat frames from each frame of an input video signal generated at 24 fps into phase information for pulldown processing, and to perform frame rate conversion using the phase information, an apparatus for converting the frame rate of the video signal includes a repeat frame generation unit configured to generate, according to the predetermined number of repeat frames, a plurality of identical frames from each frame of the input video signal; and a frame rate conversion unit configured to perform frame rate conversion based on the frame phase information indicating the number of repeat frames generated by the repeat frame generation unit. Thus, even if a video picture generated at 24 fps is input, judder of a video picture displayed on a screen can be reduced upon frame rate conversion until pulldown processing is determined.Type: ApplicationFiled: September 24, 2013Publication date: February 6, 2014Applicant: PANASONIC CORPORATIONInventors: Satoru TANIGAWA, Yuji SEKIGUCHI
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Publication number: 20140028909Abstract: A method for converting the frame rate of a video signal includes a film footage detection step of detecting a M:N (M and N are integers) pulldown video signal from an input video signal; a frame rate conversion step of performing frame rate conversion for a series of frames of the input video signal; and a switching control step of, if the M:N pulldown video signal is detected based on a detection result obtained at the film footage detection step, switching, at the frame rate conversion step, the frame rate conversion for the series of frames to frame rate conversion for M:N pulldown, and controlling the switching at a frame in which there is no difference between time required for the frame rate conversion for the series of frames and time required for the frame rate conversion for M:N pulldown.Type: ApplicationFiled: September 30, 2013Publication date: January 30, 2014Applicant: PANASONIC CORPORATIONInventors: Satoru TANIGAWA, Yoshihiro KISHIMOTO
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Publication number: 20120033136Abstract: Film-originated video detection is performed on an input video signal in each of regions into which an entire screen is divided. Based on the detection result, a case where there is not film-originated video is separated from a case where film-originated video covers the entire screen. When both a film region and a non-film region are contained, film-originated video detection is performed in sub-regions into which a region which has been determined to be a film region is subdivided. Based on the detection result, it is determined whether or not all the sub-regions are film regions. The determination is repeatedly performed until it is determined that all sub-regions are film regions. If it is determined that all sub-regions are film regions, a film-originated video region is determined, and the process is ended. Thus, a film-originated video region can be accurately detected in a screen containing film-originated video and non-film-originated video.Type: ApplicationFiled: October 12, 2011Publication date: February 9, 2012Applicant: Panasonic CorporationInventor: Satoru TANIGAWA
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Publication number: 20100277647Abstract: An image processing method includes a difference extraction step (103) of outputting a frame difference signal from an input image signal and from an image signal that has been frame-delayed so that a base value of noise of the film image is acquired from a portion of the film image of a 2-3 pull-down scheme where a signal that is identical every five fields, an integration step (107) of accumulating output signals of the difference extraction step, a detection step (106) that a difference of the entire frames is small based on the output signal of the difference extraction step, and an acquisition step (108) of acquiring, as a noise amount, an integrated value of the frame in the integrated step at timing when it is detected in the detection step that a difference of the entire frames is small. With this, noise is detected by the image processing method. A noise reduction step (113) is carried out using a result of the detection of noise.Type: ApplicationFiled: January 29, 2009Publication date: November 4, 2010Inventor: Satoru Tanigawa
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Patent number: 7796783Abstract: The motion detection device includes an oblique correlation detection section, a motion detection section and a motion determination section. The oblique correlation detection section detects a correlation in an oblique direction (oblique correlation) of a composite video signal. The motion detection section detects a motion amount based on an inter-frame difference of the composite video signal. The motion determination section determines the presence/absence of a motion in the composite video signal based on the motion amount detected by the motion detection section. The motion determination section determines the presence/absence of the motion considering the detection results of the oblique correlation by the oblique correlation detection section.Type: GrantFiled: November 24, 2008Date of Patent: September 14, 2010Assignee: Panasonic CorporationInventor: Satoru Tanigawa
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Publication number: 20100104212Abstract: A contour correcting device of the present invention includes a plurality of delay elements which delay an input video signal, a pixel-selection-control-signal generation circuit, a pixel selection circuit which selects outputs of the plurality of delay elements in response to outputs of the pixel-selection-control-signal generation circuit, a high-pass filter operation circuit which weights and adds or subtracts pixel data selected by the pixel selection circuit, and an adder circuit which adds an operation result of the high-pass filter operation circuit to the input video signal.Type: ApplicationFiled: September 11, 2008Publication date: April 29, 2010Inventors: Nobuko Fujita, Satoru Tanigawa
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Patent number: 7683972Abstract: A video signal processing apparatus is provided with a first clock generation circuit for generating a first clock synchronized with an input signal; a second clock generation circuit for receiving a set value to be a reference of an output frequency, adding the set value for every reference clock, extracting data according to the cumulative value, converting the data into an analog signal, reducing quantization noise, and multiplying the analog signal, thereby to obtain a second clock; and a clock switch circuit for generating a sync signal that is switched to the second clock, by using a sync signal generated with the first clock; and video signal processing is carried out using the second clock that is generated according to the resolution of a pixel display.Type: GrantFiled: February 21, 2006Date of Patent: March 23, 2010Assignee: Panasonic CorporationInventor: Satoru Tanigawa
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Patent number: 7684649Abstract: To improve accuracy of determining the average brightness level and maximum and minimum levels of the brightness signals for the entire screen. There are included a differential operation circuit that detects and differentiates rise or breaking edges in horizontal and vertical synchronous signals of an input image signal, thereby outputting horizontal and vertical differential signals synchronized with the horizontal and vertical synchronous signals, respectively; a sample window circuit that detects the beginning and ending positions of horizontal and vertical intervals to produce sample window signals established in any desired vertical and horizontal positions on the screen in accordance with the horizontal and vertical differential signals; and a brightness signal output circuit that outputs sampled brightness signals when the sample window circuit is operative.Type: GrantFiled: April 20, 2005Date of Patent: March 23, 2010Assignee: Panasonic CorporationInventors: Hisao Kunitani, Satoru Tanigawa, Takashi Koizumi
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Patent number: 7649567Abstract: A format conversion apparatus for subjecting data having a predetermined resolution to conversion of the resolution according to a resolution of a display screen, comprises: a timing generation unit for generating a timing for thinning out inputted signal data, using a resolution conversion coefficient that is calculated on the basis of a conversion ratio of the resolution; and a selection unit for selecting, from two pieces of input signal data existing before and after the timing generated by the timing generation unit, the signal data that is timewise closer to the timing; wherein resolution conversions in the horizontal direction and the vertical direction are carried out while maintaining the combination of the inputted signals.Type: GrantFiled: November 30, 2005Date of Patent: January 19, 2010Assignee: Panasonic CorporationInventor: Satoru Tanigawa
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Publication number: 20090091659Abstract: The motion detection device includes an oblique correlation detection section, a motion detection section and a motion determination section. The oblique correlation detection section detects a correlation in an oblique direction (oblique correlation) of a composite video signal. The motion detection section detects a motion amount based on an inter-frame difference of the composite video signal. The motion determination section determines the presence/absence of a motion in the composite video signal based on the motion amount detected by the motion detection section. The motion determination section determines the presence/absence of the motion considering the detection results of the oblique correlation by the oblique correlation detection section.Type: ApplicationFiled: November 24, 2008Publication date: April 9, 2009Applicant: PANASONIC CORPORATIONInventor: Satoru TANIGAWA
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Publication number: 20070216815Abstract: [PROBLEMS]To improve accuracy of determining the average brightness level and maximum and minimum levels of the brightness signals for the entire screen. [MEANS FOR SOLVING THE PROBLEMS]There are included a differential operation circuit that detects and differentiates rise or breaking edges in horizontal and vertical synchronous signals of an input image signal, thereby outputting horizontal and vertical differential signals synchronized with the horizontal and vertical synchronous signals, respectively; a sample window circuit that detects the beginning and ending positions of horizontal and vertical intervals to produce sample window signals established in any desired vertical and horizontal positions on the screen in accordance with the horizontal and vertical differential signals; and a brightness signal output circuit that outputs sampled brightness signals when the sample window circuit is operative.Type: ApplicationFiled: April 20, 2005Publication date: September 20, 2007Inventors: Hisao Kunitani, Satoru Tanigawa, Takashi Koizumi
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Patent number: 7259599Abstract: In a semiconductor device of the present invention, a clock is not changed instantaneously but it is changed over maximum N+1/M clocks (N: integer not less than 2) by shifting delay cells in a step by step manner to make the phase state of a previous reference signal and the phase state of a present reference signal coincide with each other, whereby the clock is synchronized with the reference signal with accuracy, and the duty of the output clock is kept constant. With this semiconductor device, it is possible to prevent the duty of the clock from being discontinuous when a signal whose reference signal does not coincide with the clock is inputted and reset is made to a rising edge of this reference signal.Type: GrantFiled: November 19, 2004Date of Patent: August 21, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hisao Kunitani, Satoru Tanigawa, Hiroshi Sonobe, Atsuhisa Kageyama
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Patent number: 7250981Abstract: A video signal processor and a video signal processing method which can prevent the length of one period of a clock from being shortened and can output a video signal that is in phase with a reference signal. When a video data signal that has been processed using a first clock signal is processed using a second clock signal, this video signal processor does not utilize as the second clock signal, a clock signal that is in phase with a reference signal but a clock signal that is employed in a later stage signal processor, and interpolates the video data signal by an interpolation circuit so as to make the signal in phase with the reference signal.Type: GrantFiled: January 27, 2004Date of Patent: July 31, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Satoru Tanigawa
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Publication number: 20060269129Abstract: A gray scale conversion table memory stores data obtained by normalizing a luminance cumulative histogram, and when receiving an input luminance value as an address, outputs gray scale conversion luminance data obtained by gray scale conversion (flattening of a luminance distribution, etc.). A frequency component correction circuit increases a higher frequency component of a luminance portion having a small slope in the normalized cumulative histogram. Thereby, a reduction in sharpness or the like is suppressed in a luminance portion to which a less number of gray scales are assigned.Type: ApplicationFiled: May 24, 2006Publication date: November 30, 2006Inventor: Satoru Tanigawa
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Publication number: 20060187349Abstract: A video signal processing apparatus is provided with a first clock generation circuit for generating a first clock synchronized with an input signal; a second clock generation circuit for receiving a set value to be a reference of an output frequency, adding the set value for every reference clock, extracting data according to the cumulative value, converting the data into an analog signal, reducing quantization noise, and multiplying the analog signal, thereby to obtain a second clock; and a clock switch circuit for generating a sync signal that is switched to the second clock, by using a sync signal generated with the first clock; and video signal processing is carried out using the second clock that is generated according to the resolution of a pixel display.Type: ApplicationFiled: February 21, 2006Publication date: August 24, 2006Inventor: Satoru Tanigawa
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Patent number: 7084928Abstract: An oblique correlation detection section detects correlation in an oblique direction (oblique correlation) of a composite video signal. A line correlation chrominance separation section extracts a first chrominance signal from the composite video signal based on vertical correlation of the composite video signal. A first chrominance signal acquisition section acquires a second chrominance signal based on horizontal self-correlation of the first chrominance signal. The first chrominance signal acquisition section detects the self-correlation within a range corresponding to the degree of the oblique correlation detected by the oblique detection section.Type: GrantFiled: September 24, 2003Date of Patent: August 1, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Satoru Tanigawa
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Publication number: 20060146891Abstract: In a semiconductor device of the present invention, a clock is not changed instantaneously but it is changed over maximum N+1/M clocks (N: integer not less than 2) by shifting delay cells stepwisely to make the phase state of a previous reference signal and the phase state of a present reference signal coincide with each other, whereby the clock is synchronized with the reference signal with accuracy, and the duty of the output clock is kept constant. According to the semiconductor device of the present invention, it is possible to prevent the duty of the clock from being discontinuous when a signal whose reference signal does not coincide with the clock is inputted and reset is made to a rising edge of this reference signal.Type: ApplicationFiled: November 19, 2004Publication date: July 6, 2006Inventors: Hisao Kunitani, Satoru Tanigawa, Hiroshi Sonobe, Atsuhisa Kageyama