Patents by Inventor Satoshi Muramatsu

Satoshi Muramatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11573526
    Abstract: An imaging system includes a rotatable image carrier; a rotatable developer carrier, a storage container, and an air flow generator. The developer carrier transfers toner to the image carrier at a developing region located between the image carrier and the developer carrier. The storage container stores the developer carrier. The air flow generator is separated from the storage container by a gap, and rotates in a rotational direction that is opposite to a rotational direction of the developer carrier, to channel an air flow through the gap when the air flow generator rotates.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: February 7, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Satoshi Muramatsu, Shinichiro Suzukawa, Tadao Mori
  • Publication number: 20230018369
    Abstract: A multilayer ceramic electronic component includes a multilayer body including ceramic layers that are laminated, first and second internal electrode layers respectively on the ceramic layers and exposed to first and second end surfaces, first and second external electrodes respectively connected to the first and second internal electrode layers. The first and second external electrodes include a base electrode layer including at least one of Ni, Cr, Cu, or Ti and a plating layer including lower, middle, and upper layer plating layers. A particle diameter of a metal included in the lower layer plating layer is larger than a particle diameter of a metal included in the middle layer plating layer.
    Type: Application
    Filed: June 24, 2022
    Publication date: January 19, 2023
    Inventors: Ken TOMINAGA, Satoshi MURAMATSU
  • Patent number: 11557437
    Abstract: A multilayer ceramic capacitor includes an external electrode including an underlying electrode layer, a lower plating layer on the underlying electrode layer at a first end surface and a second end surface, and an upper plating layer on the lower plating layer. The underlying electrode layer is a thin film electrode including at least one selected from Ni, Cr, Cu, and Ti. The lower plating layer is a Cu plating layer including a lower layer region located closer to the multilayer body and an upper layer region located between the lower layer region and the upper plating layer, and the Cu plating layer in the lower layer region has a metal grain diameter smaller than that of the Cu plating layer located in the upper layer region.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: January 17, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Muramatsu, Ken Tominaga
  • Publication number: 20220413417
    Abstract: An imaging system includes a developing chamber, a first conveyance path, a second conveyance path, a first air passage and a second air passage. A developing roller located in the developing chamber carries a developer to a developing region where the developing roller is closest to an image carrier. A first stirring-conveying portion is located in the first conveyance path adjacent the developing roller to supply the developer to the developing roller. A second stirring-conveying portion is located in the second conveyance path adjacent the first conveyance path to circulate the developer between the second conveyance path and the first conveyance path. The first air passage has an inlet coupled to the developing chamber and an outlet coupled to the second conveyance path, and the second air passage has an inlet coupled to the second conveyance path and an outlet coupled to the developing chamber.
    Type: Application
    Filed: October 19, 2020
    Publication date: December 29, 2022
    Inventor: Satoshi MURAMATSU
  • Patent number: 11482378
    Abstract: A three-terminal multilayer ceramic capacitor includes a capacitor including a ceramic layer, first and second internal electrodes, first and second end surface electrodes, and first and second side surface electrodes, and has a lengthwise dimension of about 1300 ?m or more and about 1500 ?m or less, a widthwise dimension of about 1000 ?m or more and about 1200 ?m or less, a heightwise dimension of about 570 ?m or more and about 680 ?m or less, and a capacitance of about 12 ?F or more and about 32 ?F or less. The first and second end surface electrodes, and the first and second side surface electrodes include a Ni underlying electrode layer and at least one plating electrode layer. The first and second end surface electrodes have a thickness of about 0.73% or more and about 3.00% or less relative to the lengthwise dimension.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: October 25, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kosuke Onishi, Satoshi Muramatsu, Taisuke Kanzaki
  • Patent number: 11393626
    Abstract: A multilayer ceramic capacitor includes a capacitive element including a stack of ceramic layers and internal electrodes, and external electrodes on a surface of the capacitive element. Each of the external electrodes includes a base electrode layer on the surface of the capacitive element and a Cu-plated electrode layer on a surface of the base electrode layer and including an edge portion facing the surface of the capacitive element. Sn is provided between the edge portion of the Cu-plated electrode layer and the surface of the capacitive element. On a surface of the Cu-plated electrode layer, at least one second plated electrode layer including an edge portion facing the surface of the capacitive element is provided.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: July 19, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kosuke Onishi, Satoshi Muramatsu, Taisuke Kanzaki
  • Publication number: 20220208459
    Abstract: A multilayer ceramic capacitor includes a multilayer body including layered ceramic layers and internal electrode layers, and an external electrode on a side surface of the multilayer body and connected to the internal electrode layers. A recess is provided in a surface of the external electrode on one side of opposing main surfaces of the multilayer ceramic capacitor.
    Type: Application
    Filed: November 22, 2021
    Publication date: June 30, 2022
    Inventor: Satoshi MURAMATSU
  • Publication number: 20220165503
    Abstract: A multilayer ceramic capacitor includes a stacked body and external electrodes. The stacked body includes stacked dielectric layers and internal electrodes. The external electrodes are disposed on lateral surfaces of the stacked body and are connected to the internal electrodes. The dielectric layers include outer layer portions and an effective layer portion. Each outer layer portion is adjacent to a corresponding main surface of the stacked body. Each outer layer portion is a dielectric layer located between a corresponding main surface and an internal electrode closest to the main surface. A ratio of a dimension of the effective layer portion in a stacking direction to a dimension of the stacked body in the stacking direction is not less than about 53% and not more than about 83%.
    Type: Application
    Filed: February 7, 2022
    Publication date: May 26, 2022
    Inventor: Satoshi MURAMATSU
  • Publication number: 20220130610
    Abstract: A multilayer ceramic capacitor includes a stacked body and external electrodes. The stacked body includes stacked dielectric layers and internal electrodes. The external electrodes are disposed on lateral surfaces of the stacked body and are connected to the internal electrodes. A ratio of min to max is not less than about 36% and not more than about 90%, where A1, A2, A3, and A4 respectively denote the surface areas of first, second, third, and fourth external electrodes that are located on the first or second main surface of the stacked body.
    Type: Application
    Filed: January 5, 2022
    Publication date: April 28, 2022
    Inventor: Satoshi MURAMATSU
  • Patent number: 11315734
    Abstract: A multilayer ceramic capacitor includes a capacitive element including ceramic layers and internal electrodes, and external electrodes on the capacitive element. The external electrodes include a Ni underlying electrode layer mainly made of Ni, a Cu plating electrode layer, and at least one second plating electrode layer. The Cu plating electrode layer includes a Ni diffused Cu plating electrode layer on a side closer to the Ni underlying electrode layer and including Ni diffused therein and a non-Ni diffused Cu plating electrode layer on a side closer to the second plating electrode layer and not including Ni diffused therein. The Cu plating electrode layer has a thickness of about 3 ?m or more and about 12 ?m or less and the non-Ni diffused Cu plating electrode layer has a thickness of about 0.5 ?m or more.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: April 26, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Taisuke Kanzaki, Satoshi Muramatsu, Kosuke Onishi
  • Patent number: 11282647
    Abstract: A multilayer ceramic capacitor includes a stacked body and external electrodes. The stacked body includes stacked dielectric layers and internal electrodes. The external electrodes are disposed on lateral surfaces of the stacked body and are connected to the internal electrodes. The dielectric layers include outer layer portions and an effective layer portion. Each outer layer portion is adjacent to a corresponding main surface of the stacked body. Each outer layer portion is a dielectric layer located between a corresponding main surface and an internal electrode closest to the main surface. A ratio of a dimension of the effective layer portion in a stacking direction to a dimension of the stacked body in the stacking direction is not less than about 53% and not more than about 83%.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: March 22, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Satoshi Muramatsu
  • Patent number: 11274667
    Abstract: A pump device includes: a drive shaft; a pump element; a pump housing including; a pump element receiving space, first and second bearing receiving spaces, a suction passage, a discharge passage, a return passage, and a seal receiving space, a first bearing including a first lubrication groove, received within the first bearing receiving space, and supporting the drive shaft; a second bearing which includes a second lubrication groove having a sectional area that is perpendicular to the rotation axis, and that is greater than a sectional area of the first bearing that is perpendicular to the rotation axis, which is received within the second bearing receiving space, and which supports the drive shaft; and a seal member provided within the seal receiving space, and arranged to seal between the drive shaft and the pump housing.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: March 15, 2022
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Tomohiko Nakazono, Yukio Uchida, Satoshi Muramatsu
  • Patent number: 11250991
    Abstract: A multilayer ceramic capacitor includes a stacked body and external electrodes. The stacked body includes stacked dielectric layers and internal electrodes. The external electrodes are disposed on lateral surfaces of the stacked body and are connected to the internal electrodes. A ratio of min to max is not less than about 36% and not more than about 90%, where A1, A2, A3, and A4 respectively denote the surface areas of first, second, third, and fourth external electrodes that are located on the first or second main surface of the stacked body.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: February 15, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Satoshi Muramatsu
  • Publication number: 20220026848
    Abstract: An imaging system includes a rotatable image carrier; a rotatable developer carrier, a storage container, and an air flow generator. The developer carrier transfers toner to the image carrier at a developing region located between the image carrier and the developer carrier. The storage container stores the developer carrier. The air flow generator is separated from the storage container by a gap, and rotates in a rotational direction that is opposite to a rotational direction of the developer carrier, to channel an air flow through the gap when the air flow generator rotates.
    Type: Application
    Filed: November 15, 2019
    Publication date: January 27, 2022
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Satoshi MURAMATSU, Shinichiro SUZUKAWA, Tadao MORI
  • Publication number: 20210324854
    Abstract: In a variable displacement vane pump, a cam profile of a cam ring includes a deviation region deviating from a perfect-circle cam profile outwardly in a radial direction regarding a rotational axis of a driving shaft in an intake region.
    Type: Application
    Filed: July 29, 2019
    Publication date: October 21, 2021
    Applicant: Hitachi Astemo, Ltd.
    Inventors: Jun SOEDA, Satoshi MURAMATSU
  • Publication number: 20210327649
    Abstract: A multilayer ceramic capacitor includes an external electrode including an underlying electrode layer, a lower plating layer on the underlying electrode layer at a first end surface and a second end surface, and an upper plating layer on the lower plating layer. The underlying electrode layer is a thin film electrode including at least one selected from Ni, Cr, Cu, and Ti. The lower plating layer is a Cu plating layer including a lower layer region located closer to the multilayer body and an upper layer region located between the lower layer region and the upper plating layer, and the Cu plating layer in the lower layer region has a metal grain diameter smaller than that of the Cu plating layer located in the upper layer region.
    Type: Application
    Filed: March 18, 2021
    Publication date: October 21, 2021
    Inventors: Satoshi MURAMATSU, Ken TOMINAGA
  • Publication number: 20210241976
    Abstract: A multilayer ceramic capacitor has a relationship of about 10°??1?about 50° and a relationship of about 10°??2?about 50°, where ?1 denotes an angle between a first end surface and a perpendicular extending from a side of a first main surface at a point of intersection of the first main surface and the first end surface, and ?2 denotes an angle between a second end surface and a perpendicular extending from a side of the first main surface at a point of intersection of the first main surface and the second end surface.
    Type: Application
    Filed: December 18, 2020
    Publication date: August 5, 2021
    Inventors: Suguru NAKANO, Risa HOJO, Akira TANAKA, Toru NISHIKAWA, Satoshi MURAMATSU
  • Patent number: 11081277
    Abstract: An electronic component includes a multilayer body including inner electrodes and dielectric layers alternately stacked, and an outer electrode electrically connected to the inner electrodes. The multilayer body includes first and second main surfaces opposite to each other in a stacking direction, first and second side surfaces opposite to each other in a width direction, and first and second end surfaces opposite to each other in a length direction. The outer electrode includes first outer electrodes disposed on the first and second end surfaces, and at least one second outer electrode disposed on at least one of the first and second side surfaces. The at least one second outer electrode is directly connected to the inner electrodes at positions spaced away from the at least one of the first or second side surface toward the inside of the multilayer body.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: August 3, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Muramatsu, Masatoshi Yanagihara, Akitaka Doi
  • Publication number: 20210225590
    Abstract: An electronic component includes a multilayer body including inner electrodes and dielectric layers alternately stacked, and an outer electrode electrically connected to the inner electrodes. The multilayer body includes first and second main surfaces opposite to each other in a stacking direction, first and second side surfaces opposite to each other in a width direction, and first and second end surfaces opposite to each other in a length direction. The outer electrode includes first outer electrodes disposed on the first and second end surfaces, and at least one second outer electrode disposed on at least one of the first and second side surfaces. The at least one second outer electrode is directly connected to the inner electrodes at positions spaced away from the at least one of the first or second side surface toward the inside of the multilayer body.
    Type: Application
    Filed: April 5, 2021
    Publication date: July 22, 2021
    Inventors: Satoshi MURAMATSU, Masatoshi YANAGIHARA, Akitaka DOI
  • Publication number: 20210183570
    Abstract: A multilayer ceramic capacitor includes: a laminate including dielectric layers and internal electrode layers; and external electrodes on the main surfaces of the laminate. The laminate further includes a first via conductor, a second via conductor, a third via conductor, and a fourth via conductor that connect the internal electrode layers and the external electrodes. The external electrodes include first external electrodes, second external electrodes, third external electrodes, and fourth external electrodes, each connected to the respective end surfaces of the via conductor. Each of the external electrodes does not extend to the side surfaces of the laminate. A ratio W/L of a dimension W in the width direction of the multilayer ceramic capacitor to a dimension L in the length direction of the multilayer ceramic capacitor is about 0.85 or more and about 1 or less. The dimension L in the length direction of the multilayer ceramic capacitor is about 750 ?m or smaller.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 17, 2021
    Inventors: Suguru NAKANO, Satoshi MURAMATSU, Risa HOJO, Yoshiyuki NOMURA