Abstract: An electrically programmable and erasable nonvolatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.

Abstract: A normally open hydraulic control valve includes: a linear solenoid unit; a spool driven by an output force of the linear solenoid unit to move forward; a valve body in which the spool is fitted; and a return spring for biasing the spool in a retreating direction. The valve body includes: a reaction force oil chamber for introducing hydraulic pressure, which presses the spool in a direction against a biasing force of the return spring, from the output port; and a damper oil chamber which suppresses vibration of the spool. The damper oil chamber is adjacent to the reaction force oil chamber with the third land portion of the spool therebetween. A slide gap which leaks and supplies oil from the reaction force oil chamber to the damper oil chamber is provided between the third land portion and the valve body.

Abstract: A damper device for a hydraulic control valve includes: a valve body; a damper oil chamber to which one end surface of a spool is faced; an oil reservoir chamber which is adjacent to the damper oil chamber with a partition wall therebetween; and an orifice provided in the partition wall to allow an upper portion of the damper oil chamber to communicate with the oil reservoir chamber. The damper oil chamber and the oil reservoir chamber are disposed in the valve body. The oil reservoir chamber is constructed by closing an opening of a recessed portion formed on an undersurface of the valve body with a top surface of the support member for supporting the valve body. In order to work the orifice in the partition wall by drilling from the opening of the recessed portion, an axis of the orifice is disposed to pass through the opening of the recessed portion. Thus, it is possible to eliminate need for post-treatment after working the orifice, thereby reducing the cost.

Abstract: In order to manufacture a discharging roller which discharges a recording medium from a recording apparatus, there are a first die formed with a first recess extending in an axial direction of a shaft portion of the discharging roller, and a second die formed with a second recess extending in the axial direction. The first die and the second die are combined such that the first recess and the second recess face to form a continuous cavity. Synthetic resin is injected into the cavity to mold a bore portion of the shaft portion.

Abstract: In order to manufacture a discharging roller which discharges a recording medium from a recording apparatus, there are a first die formed with a first recess extending in an axial direction of a shaft portion of the discharging roller, and a second die formed with a second recess extending in the axial direction. The first die and the second die are combined such that the first recess and the second recess face to form a continuous cavity. Synthetic resin is injected into the cavity to mold a bore portion of the shaft portion.

Abstract: A liquid ejecting apparatus includes a plurality of first transfer rollers separately provided from each other in a substantially same line along a main scanning direction crossing a feeding direction of the recording material, for transferring the recording material in the feeding direction while bending the recording material inwards on a liquid ejection surface of the recording material in the liquid ejection area, a plurality of first ribs disposed in the liquid ejection area for supporting the recording material on a surface of the recording material opposite the liquid ejection surface, the first ribs being placed at substantially same positions in the main scanning direction as the first transfer rollers respectively, directions and distances of the first ribs from the first transfer rollers in the feeding direction being substantially equal to each other, and a first liquid absorption material disposed between the first transfer rollers and the first ribs for absorbing the liquid.

Abstract: In order to manufacture a discharging roller which discharges a recording medium from a recording apparatus, there are a first die formed with a first recess extending in an axial direction of a shaft portion of the discharging roller, and a second die formed with a second recess extending in the axial direction. The first die and the second die are combined such that the first recess and the second recess face to form a continuous cavity. Synthetic resin is injected into the cavity to mold a bore portion of the shaft portion.

Abstract: In order to manufacture a discharging roller which discharges a recording medium from a recording apparatus, there are a first die formed with a first recess extending in an axial direction of a shaft portion of the discharging roller, and a second die formed with a second recess extending in the axial direction. The first die and the second die are combined such that the first recess and the second recess face to form a continuous cavity. Synthetic resin is injected into the cavity to mold a bore portion of the shaft portion.

Abstract: An electrically programmable and erasable nonvolatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.

Abstract: In a liquid pressure control system including a spool-type control valve mounted between a liquid pressure source and an actuator in such a manner that an output liquid pressure from the liquid pressure source is controlled in accordance with a thrust exhibited by a linear solenoid, a manually operated valve is disposed in a valve housing of the control valve to have an operational axis parallel to an axis of the linear solenoid. The manually operated valve is capable of blocking the communication between the actuator and the control valve and bringing the liquid pressure source into communication with the actuator to bypass the control valve. Thus, the supply of a liquid pressure to the actuator can be secured in any abnormality of the control valve, while enabling a reduction in size of the system in an axial direction of the control valve.

Abstract: In order to manufacture a discharging roller which discharges a recording medium from a recording apparatus, there are a first die formed with a first recess extending in an axial direction of a shaft portion of the discharging roller, and a second die formed with a second recess extending in the axial direction. The first die and the second die are combined such that the first recess and the second recess face to form a continuous cavity. Synthetic resin is injected into the cavity to mold a bore portion of the shaft portion.

Abstract: The present invention provides a nonvolatile memory having a plurality of memory banks having a plurality of erasable and programmable nonvolatile memory cells and capable of memory operation independently respectively. The nonvolatile memory is capable of sequentially receiving write data and a write start command by the number of write processing regions after a write instruction command, a write start address and the number of the write processing regions with the write start address as a start point are inputted, latching write data for one write processing region in one memory bank and thereafter starting writing to each memory cell in response to the write start command, and making parallel a latch operation at one memory bank and writing to each memory cell at other memory banks.

Abstract: A semiconductor memory is designed to avoid a situation that the program cannot escape from a writing operation, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory has a voltage detecting circuit for detecting whether a boosted voltage has reached a predetermined potential and a timer capable of counting predetermined time. A control circuit applies the boosted voltage to a selected memory cell when the voltage detecting circuit detects that the boosted voltage has reached the predetermined potential or when it is detected that the predetermined time has elapsed since the start of the boosting operation.

Abstract: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

Abstract: A method of forming a solder film on a metallic surface such as a pad of a metallic circuit of a printed circuit board and a lead frame of electronic parts, which is capable of forming a precise and fine pattern and which comprises selectively imparting tackiness to only a predetermined part of the metallic surface by means of a tacky layer-forming solution containing at least one compound selected from benzotriazole derivatives, naphthotriazole derivatives, imidazole derivatives, benzoimidazole derivatives, mercaptobenzothiazole derivatives, benzothiazole thiofatty acid derivatives, and triazine derivatives, adhering a powdered solder to the resulting tacky part, and then melting the solder by heating to thereby form a solder film.

Abstract: For a semiconductor integrated circuit having an internal booster circuit such as a flash memory, voltage booster circuits capable of generating a boosted voltage 10 times or more as high as a relatively low source voltage is to be realized. Charge pumps for carrying out first stage voltage boosting on the basis of a source voltage are configured of parallel capacity type units, and charge pumps for carrying out second stage voltage boosting on the basis of the boosted voltage generated by the first charge pumps are configured of serial capacity type units.

Abstract: Disclosed is a semiconductor memory having an internal booster, such as a flash memory, in which a situation that the program cannot escape from a writing operation can be avoided, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory having an internal booster has a voltage detecting circuit (limiter LM) for detecting whether a boosted voltage has reached a predetermined potential or not and a timer capable of counting predetermined time.

Abstract: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

Abstract: Disclosed is a semiconductor memory having an internal booster, such as a flash memory, in which a situation that the program cannot escape from a writing operation can be avoided, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory having an internal booster has a voltage detecting circuit (limiter LM) for detecting whether a boosted voltage has reached a predetermined potential or not and a timer capable of counting predetermined time.

Abstract: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.