Patents by Inventor Satoshi Shibata

Satoshi Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6772709
    Abstract: In a varnish coating apparatus, a first varnish film forming cylinder has a first supply surface to which varnish is supplied. A second varnish film forming cylinder has a second supply surface to which varnish is supplied. A first blanket cylinder has a first transfer surface and first opposing surface. A second blanket cylinder has a second transfer surface and second opposing surface. When a sheet passes through a contact point between the first and second blanket cylinders, the first transfer surface of the first blanket cylinder opposes the second opposing surface of the second blanket cylinder to perform varnish coating on a first surface of the sheet, and the second transfer surface of the second blanket cylinder opposes the first opposing surface of the first blanket cylinder so as to perform varnish coating on a second surface of the sheet.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: August 10, 2004
    Assignee: Komori Corporation
    Inventor: Satoshi Shibata
  • Patent number: 6760178
    Abstract: At the time of the loading of head, the CPU flows a plurality of different currents to VCM, and by reading the back electromotive force monitor value of the back electromotive force monitor circuit each time, the calibration value of the circuit is obtained, and by using this calibration value, head-loading control is executed. The calibration value obtained previously is compensated on the basis of temperature changes, temperature compensation coefficient that shows the relation between the variation of the calibration value of the back electromotive force monitor circuit, and the difference between the above-mentioned two measured temperatures.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: July 6, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Satoshi Shibata
  • Publication number: 20040109489
    Abstract: A test wafer for use in wafer temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and light absorption film formed over the second semiconductor layer. Next, the test wafer is loaded into a lamp heating system and then irradiating the test wafer with a light emitted from the lamp, thereby heating the second semiconductor layer through the light absorption film. Thereafter, a recovery rate, at which a part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been irradiated with the light is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.
    Type: Application
    Filed: June 23, 2003
    Publication date: June 10, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Shibata, Yuko Nambu
  • Publication number: 20040047394
    Abstract: A test wafer for use in wafer temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and light absorption film formed over the second semiconductor layer. Next, the test wafer is loaded into a lamp heating system and then irradiating the test wafer with a light emitted from the lamp, thereby heating the second semiconductor layer through the light absorption film. Thereafter, a recovery rate, at which a part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been irradiated with the light is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.
    Type: Application
    Filed: August 11, 2003
    Publication date: March 11, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Satoshi Shibata, Yuko Nambu
  • Publication number: 20040023421
    Abstract: When the emissivity &egr; on the reverse face of a substrate 10 is measured during annealing processing for the substrate 10, films made from a material that varies the emissivity &egr;, such as a first DPS film 15 used for forming a plug 15A, a second DPS film 17 used for forming a capacitor lower electrode 17A and a third DPS film 20 used for forming a capacitor upper electrode 20A, are formed on the top face of the substrate 10. On the other hand, no film made from a material that varies the emissivity &egr;, such as a DPS film, is formed on the reverse face of the substrate 10.
    Type: Application
    Filed: February 4, 2003
    Publication date: February 5, 2004
    Inventors: Satoshi Shibata, Junji Hirase, Tatsuo Sugiyama, Emi Kanasaki, Fumitoshi Kawase, Yasushi Naito
  • Patent number: 6666577
    Abstract: A test wafer for use in wafer temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and light absorption film formed over the second semiconductor layer. Next, the test wafer is loaded into a lamp heating system and then irradiating the test wafer with a light emitted from the lamp, thereby heating the second semiconductor layer through the light absorption film. Thereafter, a recovery rate, at which a part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been irradiated with the light is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: December 23, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Shibata, Yuko Nambu
  • Publication number: 20030184642
    Abstract: A facsimile machine includes a detachable ribbon cassette accommodating an ink ribbon and having an EEPROM that stores the amount of the ink ribbon consumed. In the facsimile machine, printing is performed while the ink ribbon is taken up by a take-up motor and the memory contents in the EEPROM are renewed according to the progress of printing. The facsimile machine further includes a ribbon-empty detector that detects that the facsimile machine runs out of the ink ribbon, and a CPU that resets the memory contents in the EEPROM of the ribbon cassette.
    Type: Application
    Filed: March 25, 2003
    Publication date: October 2, 2003
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventors: Satoshi Shibata, Mutsuo Fukuoka
  • Patent number: 6619939
    Abstract: A rotary pump including: a casing having a circular inner circumferential surface, a rotor rotating about a center of the inner circumferential surface of the casing, a partition plate installed so as to be movable in and out of the casing so that a tip end of the partition plate comes into contact with an outer circumferential surface of the rotor, a spring which drives the partition plate so that the partition plate is in constant contact with the rotor, and an intake port and a discharge port formed in the casing so as to be positioned after and before the partition plate with respect to the direction of rotation of the rotor; and the partition plate is formed with a communicating portion that communicates between the intake port side and the discharge port side.
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: September 16, 2003
    Assignee: Takuma Co., Ltd.
    Inventors: Umeo Inoue, Satoshi Shibata, Hiroyuki Kishida
  • Patent number: 6616331
    Abstract: A test wafer for use in temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and passivation film formed over the second semiconductor layer. Next, the test wafer is loaded into a device fabrication system and then heated therein at a predetermined period of time. Thereafter, a recovery rate, at which part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been heated is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: September 9, 2003
    Assignee: Matsushita Electric Industrial Co., LTD
    Inventors: Satoshi Shibata, Yuko Nambu
  • Publication number: 20030111010
    Abstract: In a varnish coating apparatus, a first varnish film forming cylinder has a first supply surface to which varnish is supplied. A second varnish film forming cylinder has a second supply surface to which varnish is supplied. A first blanket cylinder has a first transfer surface and first opposing surface. A second blanket cylinder has a second transfer surface and second opposing surface. When a sheet passes through a contact point between the first and second blanket cylinders, the first transfer surface of the first blanket cylinder opposes the second opposing surface of the second blanket cylinder to perform varnish coating on a first surface of the sheet, and the second transfer surface of the second blanket cylinder opposes the first opposing surface of the first blanket cylinder so as to perform varnish coating on a second surface of the sheet.
    Type: Application
    Filed: December 13, 2002
    Publication date: June 19, 2003
    Inventor: Satoshi Shibata
  • Publication number: 20030072667
    Abstract: A rotary pump including: a casing having a circular inner circumferential surface, a rotor rotating about a center of the inner circumferential surface of the casing, a partition plate installed so as to be movable in and out of the casing so that a tip end of the partition plate comes into contact with an outer circumferential surface of the rotor, a spring which drives the partition plate so that the partition plate is in constant contact with the rotor, and an intake port and a discharge port formed in the casing so as to be positioned after and before the partition plate with respect to the direction of rotation of the rotor; and the partition plate is formed with a communicating portion that communicates between the intake port side and the discharge port side.
    Type: Application
    Filed: January 9, 2002
    Publication date: April 17, 2003
    Inventors: Umeo Inoue, Satoshi Shibata, Hiroyuki Kishida
  • Patent number: 6475815
    Abstract: An amorphous region is formed by implanting an impurity such as As into a semiconductor substrate having a natural oxide film. The amorphous region is divided into a heavily doped oxygen region in which the concentration of oxygen is equal to or higher than a critical value and a lightly doped oxygen region in which the oxygen concentration is lower than the critical value. Then, oxygen ions are implanted to expand the heavily doped oxygen region throughout the amorphous region. Annealing is performed such that the reordering rate of the amorphous region is determined and the annealing temperature is determined by using the relationship between the annealing temperature and the reordering rate. By adjusting the oxygen concentration in the amorphous region to the critical value or more, the reordering rate can be adjusted to a nearly constant low value and the accuracy and reliability of temperature measurement is increased.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: November 5, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuko Nambu, Satoshi Shibata
  • Publication number: 20020126412
    Abstract: A memory section stores values of the runout component, which are obtained in respective predetermined radial positions on the disk. A determining section selects, from the memory section, a value of the runout component corresponding to a target position. A runout detector uses, as an initial value for adaptive learning, the value of the runout component selected by the determining section, and calculates, by the adaptive learning, a value of the runout component contained in a position error between a head position and the target position. A feedforward controller calculates a feedforward value used to suppress the runout component calculated by the runout detector. A feedback controller calculates a feedback value from the position error. An adder generates, from the feedback value and the feedforward value, a control amount used to position the head in the target position.
    Type: Application
    Filed: January 31, 2002
    Publication date: September 12, 2002
    Inventor: Satoshi Shibata
  • Publication number: 20020075936
    Abstract: A test wafer for use in temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and passivation film formed over the second semiconductor layer. Next, the test wafer is loaded into a device fabrication system and then heated therein at a predetermined period of time. Thereafter, a recovery rate, at which part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been heated is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.
    Type: Application
    Filed: October 31, 2001
    Publication date: June 20, 2002
    Inventors: Satoshi Shibata, Yuko Nambu
  • Publication number: 20020051481
    Abstract: A test wafer for use in wafer temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and light absorption film formed over the second semiconductor layer. Next, the test wafer is loaded into a lamp heating system and then irradiating the test wafer with a light emitted from the lamp, thereby heating the second semiconductor layer through the light absorption film. Thereafter, a recovery rate, at which a part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been irradiated with the light is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.
    Type: Application
    Filed: October 31, 2001
    Publication date: May 2, 2002
    Inventors: Satoshi Shibata, Yuko Nambu
  • Publication number: 20010026414
    Abstract: At the time of the loading of head, the CPU flows a plurality of different currents to VCM, and by reading the back electromotive force monitor value of the back electromotive force monitor circuit each time, the calibration value of the circuit is obtained, and by using this calibration value, head-loading control is executed. The calibration value obtained previously is compensated on the basis of temperature changes, temperature compensation coefficient that shows the relation between the variation of the calibration value of the back electromotive force monitor circuit, and the difference between the above-mentioned two measured temperatures.
    Type: Application
    Filed: March 5, 2001
    Publication date: October 4, 2001
    Inventor: Satoshi Shibata
  • Patent number: 6254082
    Abstract: A rotary valve is interposed between an intake pump and an exhaust pump for supplying an air, and at least one suction head or one nozzle that performs a predetermined operation upon reception of the air supplied from the intake and exhaust pumps, to supply/stop supplying the air. This rotary valve includes a valve body, a main body, a notch, and a hollow portion. The valve body is rotatably driven in a cylinder. The main body rotatably supports the valve body. The notch is formed in a circumferential surface of the valve body and is connected to the intake pump. The hollow portion is formed in the valve body in an axial direction and is connected to the exhaust pump.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: July 3, 2001
    Assignee: Komori Corporation
    Inventors: Ikuo Sugimoto, Kazuhiko Kato, Satoshi Shibata
  • Patent number: 6128084
    Abstract: Measurement light, which has been emitted from a Xe light source (20) and then linearly polarized by a polarizer (21), is made to be incident at a tilt angle on a region in a silicon substrate (11) with crystallinity disordered by the implantation of dopant ions. And the spectra of cos.DELTA. and tan .psi. are measured with a variation of the measurement light, where .DELTA. is a phase difference between respective components in p and s directions as to the light reflected as an elliptically-polarized ray, and .psi. is a ratio between the amplitudes of these components. By correlating in advance the spectral patterns of cos.DELTA. and so on with the thickness of an amorphous region through a destructive test or the like, or by paying special attention to characteristic parts of the patterns of cos.DELTA. and so on, the thickness or the degree of disordered crystallinity of the amorphous region is estimated.
    Type: Grant
    Filed: January 13, 1999
    Date of Patent: October 3, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Yuko Nanbu, Satoshi Shibata
  • Patent number: 5974683
    Abstract: A sheet inspection apparatus for a sheet-fed offset printing press includes an endless conveying unit, a plurality of gripper units, and an inspection unit. The conveying unit has a conveying path and a return path and conveys a sheet delivered from a printing unit. The gripper units are supported by the conveying unit at a predetermined interval along a sheet conveying direction to grip one end of the sheet. The inspection unit is arranged on an opposite side of the conveying path with respect to the return path to optically inspect a printed state of the sheet conveyed on the conveying path. The inspection unit is arranged at a position where an optical inspection operation for the sheet at an inspection position on the conveying path is not impeded by the gripper units traveling on the return path.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: November 2, 1999
    Assignee: Komori Corporation
    Inventor: Satoshi Shibata
  • Patent number: 5825580
    Abstract: A data recording/reproducing device for performing positioning control of at least one head using a plurality pairs of burst data recorded on a disk, comprises burst position conversion coefficient initial setting section for initially setting a burst position conversion coefficient, position information calculating section for calculating position information representing a head position shifted from a track center on the basis of one pair of the plurality pairs of burst data and a burst position conversion coefficient obtained at this time, positioning control section for positioning the head to an arbitrary position, at which the pair of burst data used for calculation of the position information can be detected, on the basis of the position information calculated by the position information calculating section, comparing section for comparing first position information indicating a current head position at which the burst position is detectable, with second position information after the head is moved to
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: October 20, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Satoshi Shibata