Patents by Inventor Satoshi Shimamoto

Satoshi Shimamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9732426
    Abstract: According to the present disclosure, a film containing carbon added at a high concentration is formed with high controllability. A method of manufacturing a semiconductor device includes forming a film containing silicon, carbon and a predetermined element on a substrate by performing a cycle a predetermined number of times. The predetermined element is one of nitrogen and oxygen. The cycle includes supplying a precursor gas containing at least two silicon atoms per one molecule, carbon and a halogen element and having an Si—C bonding to the substrate, and supplying a modifying gas containing the predetermined element to the substrate.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: August 15, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi Shimamoto, Yoshiro Hirose, Atsushi Sano
  • Patent number: 9698007
    Abstract: A method of manufacturing a semiconductor device, includes forming a thin film containing silicon, oxygen and carbon or a thin film containing silicon, oxygen, carbon and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a precursor gas serving as a silicon source and a carbon source or a precursor gas serving as a silicon source but no carbon source, and a first catalyst gas to the substrate; supplying an oxidizing gas and a second catalyst gas to the substrate; and supplying a modifying gas containing at least one selected from the group consisting of carbon and nitrogen to the substrate.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: July 4, 2017
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takaaki Noda, Satoshi Shimamoto, Shingo Nohara, Yoshiro Hirose, Kiyohiko Maeda
  • Patent number: 9685455
    Abstract: The technique described herein can form a semiconductor device having a favorable characteristic over a flash memory with a 3D structure. Provided is a method of manufacturing a semiconductor device, including: (a) forming a stacked structure having an insulating film and a sacrificial film stacked therein by performing a combination a plurality of times, the combination including: (a-1) forming the insulating film on a substrate; (a-2) forming the sacrificial film on the insulating film; and (a-3) modifying at least one of the insulating film and the sacrificial film to reduce a difference between stresses of the insulating film and the sacrificial film.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: June 20, 2017
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Satoshi Shimamoto, Takashi Nakagawa
  • Publication number: 20170170004
    Abstract: There is provided a method of manufacturing a semiconductor device, including forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing supplying a precursor gas to the substrate; and supplying a first oxygen-containing gas to the substrate. Further, the act of supplying the precursor gas includes a time period in which the precursor gas and a second oxygen-containing gas are simultaneously supplied to the substrate.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 15, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Katsuyoshi HARADA, Takashi OZAKI, Masato TERASAKI, Risa YAMAKOSHI, Satoshi SHIMAMOTO, Jiro YUGAMI, Yoshiro HIROSE
  • Patent number: 9673043
    Abstract: There is provided a technique including: (a) forming a thin film containing a predetermined element, oxygen and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including: (a-1) supplying a source gas containing the predetermined element, carbon and a halogen element having a chemical bond between the predetermined element and carbon to the substrate; (a-2) supplying an oxidizing gas to the substrate; and (a-3) supplying a catalytic gas to the substrate; (b) removing a first impurity from the thin film by thermally processing the thin film at a first temperature higher than a temperature of the substrate in (a); and (c) removing a second impurity different from the first impurity from the thin film by thermally processing the thin film at a second temperature equal to or higher than the first temperature after performing (b).
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: June 6, 2017
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takaaki Noda, Shingo Nohara, Satoshi Shimamoto, Hiroshi Ashihara, Takeo Hanashima, Yoshiro Hirose, Tsukasa Kamakura
  • Patent number: 9640387
    Abstract: A technique includes loading a substrate into a process chamber, supporting the substrate by a mounting table having a heater therein in the process chamber, forming a film on the substrate by supplying a processing gas into the process chamber in a state where the mounting table having the substrate supported thereon is disposed in a first position and the heater is turned on, unloading the substrate on which the film is formed, and supplying a reactive gas into the process chamber in a state where the mounting table is disposed in a second position and the heater is turned on. The second position is closer to a ceiling portion in the process chamber than the first position.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: May 2, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Ryuji Yamamoto, Tsukasa Kamakura, Yoshiro Hirose, Satoshi Shimamoto
  • Publication number: 20170117133
    Abstract: A method of manufacturing a semiconductor device includes forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes non-simultaneously performing: forming a first layer by supplying a precursor gas including a chemical bond of a first element and carbon and a first catalyst gas to the substrate; exhausting the precursor gas and the first catalyst gas through an exhaust system; forming a second layer by supplying a reaction gas including a second element and a second catalyst gas to the substrate to modify the first layer; and exhausting the reaction gas and the second catalyst gas through the exhaust system. At least in a specific cycle, the respective gases are supplied and confined in the process chamber while closing the exhaust system in at least one of the act of forming the first layer and the act of forming the second layer.
    Type: Application
    Filed: November 9, 2016
    Publication date: April 27, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Ryuji YAMAMOTO, Yoshiro HIROSE, Satoshi SHIMAMOTO
  • Patent number: 9613798
    Abstract: A technique includes forming a film containing a first element, a second element and carbon on a substrate by performing a cycle a predetermined number of times. The cycle includes non-simultaneously performing: forming a first layer containing the first element and carbon by supplying a precursor gas having a chemical bond of the first element and carbon from a first supply part to the substrate in a process chamber, and forming a second layer by supplying a reaction gas containing the second element from a second supply part to the substrate in the process chamber and supplying a plasma-excited inert gas from a third supply part to the substrate in the process chamber to modify the first layer, the third supply part being different from the second supply part.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: April 4, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Ryuji Yamamoto, Yoshiro Hirose, Satoshi Shimamoto
  • Publication number: 20170092486
    Abstract: A method of manufacturing a semiconductor device includes: providing a substrate; and forming a film on the substrate by supplying a silicon hydride and a halogen element-free catalyst containing one of a group III element or a group V element to the substrate, under a condition that the silicon hydride is not thermally decomposed when the silicon hydride is present alone.
    Type: Application
    Filed: September 23, 2016
    Publication date: March 30, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takafumi NITTA, Satoshi SHIMAMOTO, Yoshiro HIROSE
  • Patent number: 9524867
    Abstract: A method of manufacturing a semiconductor device includes forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes non-simultaneously performing: forming a first layer by supplying a precursor gas including a chemical bond of a first element and carbon and a first catalyst gas to the substrate; exhausting the precursor gas and the first catalyst gas through an exhaust system; forming a second layer by supplying a reaction gas including a second element and a second catalyst gas to the substrate to modify the first layer; and exhausting the reaction gas and the second catalyst gas through the exhaust system. At least in a specific cycle, the respective gases are supplied and confined in the process chamber while closing the exhaust system in at least one of the act of forming the first layer and the act of forming the second layer.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: December 20, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Ryuji Yamamoto, Yoshiro Hirose, Satoshi Shimamoto
  • Publication number: 20160365243
    Abstract: A method of manufacturing a semiconductor device for forming a thin film having low permittivity, high etching resistance and high leak resistance is provided. The method includes: forming a film containing a predetermined element, oxygen, carbon and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes: (a) supplying a source gas containing the predetermined element and a halogen element to the substrate; (b) supplying a first reactive gas containing the three elements including carbon, nitrogen and hydrogen wherein a number of carbon atoms in each molecule of the first reactive gas is greater than that of nitrogen atoms in each molecule of the first reactive gas to the substrate; (c) supplying a nitriding gas as a second reactive gas to the substrate; and (d) supplying an oxidizing gas as a third reactive gas to the substrate, wherein (a) through (d) are non-simultaneously performed.
    Type: Application
    Filed: August 26, 2016
    Publication date: December 15, 2016
    Inventors: Yoshiro HIROSE, Atsushi SANO, Yugo Orihashi, Yoshitomo HASHIMOTO, Satoshi SHIMAMOTO
  • Publication number: 20160358767
    Abstract: There is provided a method of manufacturing a semiconductor device, comprising forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including non- simultaneously performing forming a first layer by supplying a precursor containing hydrogen and an halogen element to the substrate in a process chamber, under a condition in which the precursor is pyrolyzed if the precursor exists alone and under a condition in which a flow rate of the precursor supplied into the process chamber is larger than a flow rate of the precursor exhausted from an interior of the process chamber and forming a second layer by supplying a reactant to the substrate in the process chamber thereby modifying the first layer.
    Type: Application
    Filed: June 1, 2016
    Publication date: December 8, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takafumi NITTA, Satoshi SHIMAMOTO, Yoshiro HIROSE
  • Patent number: 9478413
    Abstract: A thin film that has a predetermined composition and containing predetermined elements is formed on a substrate by performing a cycle of steps a predetermined number of times, said cycle comprising: a step wherein a first layer containing the predetermined elements, nitrogen and carbon is formed on the substrate by alternately performing, a predetermined number of times, a process of supplying a first source gas containing a predetermined element and a halogen group to the substrate and a process of supplying a second source gas containing a predetermined element and an amino group to the substrate; a step wherein a second layer is formed by modifying the first layer by supplying an amine-based source gas to the substrate; and a step wherein a third layer is formed by modifying the second layer by supplying a reaction gas that is different from the source gases to the substrate.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: October 25, 2016
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Satoshi Shimamoto, Yoshiro Hirose, Atsushi Sano
  • Patent number: 9472391
    Abstract: A semiconductor device manufacturing method includes forming a thin film containing silicon, oxygen, carbon and a specified Group III or Group V element on a substrate by performing a cycle a predetermined number of times. The cycle includes: supplying a precursor gas containing silicon, carbon and a halogen element and having an Si—C bonding and a first catalytic gas to the substrate; supplying an oxidizing gas and a second catalytic gas to the substrate; and supplying a modifying gas containing the specified Group III or Group V element to the substrate.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: October 18, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi Shimamoto, Yoshiro Hirose, Atsushi Sano, Tsukasa Kamakura, Takaaki Noda
  • Patent number: 9460911
    Abstract: A method of manufacturing a semiconductor device for forming a thin film having characteristics of low permittivity, high etching resistance and high leak resistance is provided. The method includes: forming a film containing a predetermined element, oxygen, carbon and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes: (a) supplying a source gas containing the predetermined element and a halogen element to the substrate; (b) supplying a first reactive gas containing three elements including carbon, nitrogen and hydrogen wherein a number of carbon atoms in each molecule of the first reactive gas is greater than that of nitrogen atoms in each molecule of the first reactive gas to the substrate; (c) supplying a nitriding gas as a second reactive gas to the substrate; and (d) supplying an oxidizing gas as a third reactive gas to the substrate, wherein (a) through (d) are non-simultaneously performed.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: October 4, 2016
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro Hirose, Atsushi Sano, Yugo Orihashi, Yoshitomo Hashimoto, Satoshi Shimamoto
  • Patent number: 9460916
    Abstract: An object of the present invention is to form a good thin film while suppressing generation of foreign substances in a low temperature region. Provided is a method of manufacturing a semiconductor device, including: (a) forming a thin film containing at least a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including: (a-1) supplying a source gas containing the predetermined element and a halogen element to the substrate in a process container; and (a-2) supplying a reaction gas composed of carbon, nitrogen, and hydrogen to the substrate in the process container; and (b) modifying byproduct adhered to an inside of the process container by supplying a nitriding gas into the process container after (a).
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: October 4, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi Shimamoto, Yugo Orihashi, Yoshitomo Hashimoto, Yoshiro Hirose
  • Patent number: 9431240
    Abstract: A method of manufacturing a semiconductor is provided. The method includes forming a thin film including a predetermined element and a borazine ring skeleton is formed on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a source gas including the predetermined element and a halogen group to the substrate and supplying a reaction gas including a borazine compound to the substrate under a condition where the borazine ring skeleton in the borazine compound is maintained.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: August 30, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshiro Hirose, Atsushi Sano, Katsuyoshi Harada, Satoshi Shimamoto
  • Publication number: 20160225607
    Abstract: A method of manufacturing a semiconductor device includes forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes non-simultaneously performing: forming a first layer by supplying a precursor gas including a chemical bond of a first element and carbon and a first catalyst gas to the substrate; exhausting the precursor gas and the first catalyst gas through an exhaust system; forming a second layer by supplying a reaction gas including a second element and a second catalyst gas to the substrate to modify the first layer; and exhausting the reaction gas and the second catalyst gas through the exhaust system. At least in a specific cycle, the respective gases are supplied and confined in the process chamber while closing the exhaust system in at least one of the act of forming the first layer and the act of forming the second layer.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 4, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Ryuji YAMAMOTO, Yoshiro HIROSE, Satoshi SHIMAMOTO
  • Publication number: 20160218012
    Abstract: A fine pattern-forming method includes: a core pattern-forming step of forming a core pattern of a predetermined line width at a substrate surface side; a sidewall-forming step of forming a sidewall on the core pattern formed in the core pattern-forming step; and a core pattern removing step of removing the core pattern in a state where the sidewall is left, by using an etching gas after the sidewall-forming step, and is configured such that, in the core pattern removing step, a film deposited at a substrate back side in the core pattern-forming step is removed in parallel to the removal of the core pattern.
    Type: Application
    Filed: September 29, 2014
    Publication date: July 28, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi SHIMAMOTO, Toshiyuki KIKUCHI, Jiro YUGAMI, Yoshiro HIROSE, Yuichi WADA, Kenji KANAYAMA, Hiroshi ASHIHARA, Kenji KAMEDA
  • Publication number: 20160211135
    Abstract: There is provided a technique including: (a) forming a thin film containing a predetermined element, oxygen and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including: (a-1) supplying a source gas containing the predetermined element, carbon and a halogen element having a chemical bond between the predetermined element and carbon to the substrate; (a-2) supplying an oxidizing gas to the substrate; and (a-3) supplying a catalytic gas to the substrate; (b) removing a first impurity from the thin film by thermally processing the thin film at a first temperature higher than a temperature of the substrate in (a); and (c) removing a second impurity different from the first impurity from the thin film by thermally processing the thin film at a second temperature equal to or higher than the first temperature after performing (b).
    Type: Application
    Filed: March 30, 2016
    Publication date: July 21, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takaaki NODA, Shingo NOHARA, Satoshi SHIMAMOTO, Hiroshi ASHIHARA, Takeo HANASHIMA, Yoshiro HIROSE, Tsukasa KAMAKURA