Patents by Inventor Satoshi Shinohara

Satoshi Shinohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170173574
    Abstract: Provided is a honeycomb fired body in which the pressure loss in the initial state where PM has not accumulated is sufficiently low, the strength is sufficiently high, and the heat capacity is not small.
    Type: Application
    Filed: March 7, 2017
    Publication date: June 22, 2017
    Applicant: IBIDEN CO., LTD.
    Inventors: Shunpei ENOSHITA, Satoshi SHINOHARA
  • Publication number: 20170069765
    Abstract: Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
    Type: Application
    Filed: November 21, 2016
    Publication date: March 9, 2017
    Inventors: Shunpei YAMAZAKI, Satoshi SHINOHARA
  • Patent number: 9530897
    Abstract: Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: December 27, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Shinohara
  • Publication number: 20160326213
    Abstract: This invention is intended to produce a novel functional material through solubilization and molecular weight reduction of a water-insoluble polymeric compound, such as a water-insoluble protein or water-insoluble polysaccharide, in a simple and efficient manner.
    Type: Application
    Filed: December 17, 2014
    Publication date: November 10, 2016
    Applicants: JELLYFISH RESEARCH LABORATORIES, INC., MARUWA OIL & FAT CO., LTD.
    Inventors: Satoshi SHINOHARA, Takayuki BABA, Koji KIHIRA
  • Patent number: 9466726
    Abstract: Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 ?m or less, preferably 5 nm or more and 0.1 ?m or less. The taper angle ? of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: October 11, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Satoshi Shinohara
  • Publication number: 20160264436
    Abstract: A fluid treatment apparatus includes a reactor that decomposes an organic matter contained in a mixed fluid of a fluid to be treated and an oxidizing agent, an oxidizing agent injector that includes an injection port to inject the oxidizing agent into the reactor, a fluid discharger that is disposed to surround the oxidizing agent injector and includes an outlet to discharge the fluid in the reactor, and a pressurizer that pressurizes the oxidizing agent. The fluid discharger has a fluid passage a diameter of which is larger than a maximum particle diameter of a solid material contained in the fluid and a shape of which does not create a pressure difference in the fluid passage, the outlet of the fluid discharger being provided to discharge the fluid toward the oxidizing agent injector. The apparatus atomizes the fluid by pressure energy of the injected oxidizing agent.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 15, 2016
    Inventors: Kenichi HAYAKAWA, Satoshi SHINOHARA, Toshiyuki MUTOH, Shogo SUZUKI, Yuu ZAMA, Kimio AOKI
  • Publication number: 20160218221
    Abstract: Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 ?m or less, preferably 5 nm or more and 0.1 ?m or less. The taper angle ? of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.
    Type: Application
    Filed: April 4, 2016
    Publication date: July 28, 2016
    Inventors: Shunpei YAMAZAKI, Masahiko HAYAKAWA, Satoshi SHINOHARA
  • Publication number: 20160141422
    Abstract: A semiconductor device in which deterioration of electrical characteristics which becomes more noticeable as the transistor is miniaturized can be suppressed is provided. The semiconductor device includes an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked in this order from the substrate side over a substrate; a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor stack; a gate insulating film over the oxide semiconductor stack, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating film. The first oxide semiconductor layer includes a first region. The gate insulating film includes a second region. When the thickness of the first region is TS1 and the thickness of the second region is TG1, TS1?TG1.
    Type: Application
    Filed: January 20, 2016
    Publication date: May 19, 2016
    Inventors: Daisuke Matsubayashi, Satoshi Shinohara, Wataru Sekine
  • Patent number: 9345170
    Abstract: A heat exchange device that is coupled to an electronic device that includes an electronic component that generates heat, the heat exchange device includes: a first-channel through which a first-coolant that cools the electronic component flows; a heat-exchange-unit that performs heat exchange between the first-coolant and a second-coolant; a second-channel through which the second-coolant-flows; a first-coolant-detection-unit that detects leakage of the first-coolant from the first-channel; a collection-unit that collects the first-coolant that is leaked from the first-channel; a storage-unit that is provided in the first-channel and supplies the stored first-coolant to the first channel; a recovery-unit that is provided between the collection-unit and the storage-unit; and a control-unit that causes the recovery-unit to recover the first-coolant that is collected by the collection unit, into the storage-unit when the first-coolant-detection-unit detects leakage of the first-coolant.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: May 17, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Hiroshi Ishikawa, Tadao Amada, Satoshi Shinohara, Kyoichi Takada, Ken'ichi Ishizaka
  • Patent number: 9318577
    Abstract: A semiconductor device is provided, which includes a single crystal semiconductor layer formed over an insulating surface and having a source region, a drain region, and a channel formation region, a gate insulating film covering the single crystal semiconductor layer and a gate electrode overlapping with the channel formation region with the gate insulating film interposed therebetween. In the semiconductor device, at least the drain region of the source and drain regions includes a first impurity region adjacent to the channel formation region and a second impurity region adjacent to the first impurity region. A maximum of an impurity concentration distribution in the first impurity region in a depth direction is closer to the insulating surface than a maximum of an impurity concentration distribution in the second impurity region in a depth direction.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: April 19, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Satoshi Shinohara, Miki Suzuki, Hideto Ohnuma
  • Publication number: 20160071983
    Abstract: Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
    Type: Application
    Filed: November 5, 2015
    Publication date: March 10, 2016
    Inventors: Shunpei YAMAZAKI, Satoshi SHINOHARA
  • Patent number: 9252283
    Abstract: A semiconductor device in which deterioration of electrical characteristics which becomes more noticeable as the transistor is miniaturized can be suppressed is provided. The semiconductor device includes an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked in this order from the substrate side over a substrate; a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor stack; a gate insulating film over the oxide semiconductor stack, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating film. The first oxide semiconductor layer includes a first region. The gate insulating film includes a second region. When the thickness of the first region is TS1 and the thickness of the second region is TG1, TS1?TG1.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: February 2, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Matsubayashi, Satoshi Shinohara, Wataru Sekine
  • Patent number: 9196745
    Abstract: Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: November 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Shinohara
  • Patent number: 9167170
    Abstract: There is provided an imaging device including an imaging element that acquires a captured image of a subject, a light emission unit that emits light to the subject, and a control unit that is capable of controlling a timing of exposure performed by the imaging element and a timing of light emission performed by the light emission unit. In a mode in which imaging is performed with a plurality of times of consecutive light emission by the light emission unit, the control unit controls at least one of a timing of the exposure and a timing of the light emission so that light amounts effective for exposure in each imaging are substantially the same.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: October 20, 2015
    Assignee: Sony Corporation
    Inventors: Shunji Okada, Kazuaki Iguchi, Satoshi Shinohara, Yoshitsugu Nomiyama, Naoya Katoh, Yukio Isobe, Yuuji Watanabe
  • Publication number: 20150228800
    Abstract: Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 ?m or less, preferably 5 nm or more and 0.1 ?m or less. The taper angle ? of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.
    Type: Application
    Filed: April 23, 2015
    Publication date: August 13, 2015
    Inventors: Shunpei YAMAZAKI, Masahiko HAYAKAWA, Satoshi SHINOHARA
  • Patent number: 9053983
    Abstract: Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 ?m or less, preferably 5 nm or more and 0.1 ?m or less. The taper angle ? of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: June 9, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Satoshi Shinohara
  • Publication number: 20150131228
    Abstract: A heat exchange device that is coupled to an electronic device that includes an electronic component that generates heat, the heat exchange device includes: a first-channel through which a first-coolant that cools the electronic component flows; a heat-exchange-unit that performs heat exchange between the first-coolant and a second-coolant; a second-channel through which the second-coolant-flows; a first-coolant-detection-unit that detects leakage of the first-coolant from the first-channel; a collection-unit that collects the first-coolant that is leaked from the first-channel; a storage-unit that is provided in the first-channel and supplies the stored first-coolant to the first channel; a recovery-unit that is provided between the collection-unit and the storage-unit; and a control-unit that causes the recovery-unit to recover the first-coolant that is collected by the collection unit, into the storage-unit when the first-coolant-detection-unit detects leakage of the first-coolant.
    Type: Application
    Filed: October 21, 2014
    Publication date: May 14, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi ISHIKAWA, Tadao AMADA, Satoshi SHINOHARA, Kyoichi TAKADA, Ken'ichi ISHIZAKA
  • Publication number: 20150115263
    Abstract: Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
    Type: Application
    Filed: January 6, 2015
    Publication date: April 30, 2015
    Inventors: Shunpei YAMAZAKI, Satoshi SHINOHARA
  • Patent number: 8963148
    Abstract: Provided is a semiconductor device having a structure which can suppress a decrease in electrical characteristics, which becomes more significant with miniaturization. The semiconductor device includes a plurality of gate electrode layers separated from each other. One of the plurality of gate electrode layers includes a region which overlaps with a part of an oxide semiconductor layer, a part of a source electrode layer, and a part of a drain electrode layer. Another of the plurality of gate electrode layers overlaps with a part of an end portion of the oxide semiconductor layer. The length in the channel width direction of each of the source electrode layer and the drain electrode layer is shorter than that of the one of the plurality of gate electrode layers.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Matsubayashi, Satoshi Shinohara, Wataru Sekine, Naoto Kusumoto
  • Patent number: 8952377
    Abstract: Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Shinohara