Patents by Inventor Satoshi Takeda
Satoshi Takeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020148775Abstract: The present invention provides a gas-permeable hollow fiber membrane having an inner diameter of 50 to 500 &mgr;m and a membrane thickness of 10 to 150 &mgr;m, which is preferably a composite hollow fiber membrane having a three-layer structure consisting of a nonporous layer having porous layers disposed on both sides thereof. Dissolved gases present in an ink can be removed by passing the ink through the bores of hollow fibers comprising such a hollow fiber membrane, and evacuating the outer surface side of the hollow fibers. This method makes it possible not only to degas inks with a slight pressure loss, but also to degas inks stably even if pressure changes occur during degassing.Type: ApplicationFiled: June 24, 2002Publication date: October 17, 2002Applicant: Mitsubishi Rayon Co., Ltd.Inventors: Kenji Watari, Satoshi Takeda, Masumi Kobayashi, Makoto Uchida, Masamoto Uenishi, Noriaki Fukushima, Seiji Hayashi
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Patent number: 6451434Abstract: A glass laminate comprising a glass substrate, an oxide layer as a first layer formed on the glass substrate, and at least one multilayer (B) and at least one layer (C) which are laminated in this order or alternately on the first layer, wherein the first layer comprises a zinc oxide film (A) containing Al in a ratio of Al/(Al+Zn) of from 15 to 50 at %, the layer (B) comprises Ag as the main component, the layer (C) is composed of at least one member selected from the group consisting of oxides, nitrides, carbides and double compounds thereof, and the total number of the first layer, the layer(s) (B) and the layer(s) (C) is 2n+1 (wherein n is a positive integer).Type: GrantFiled: December 20, 1999Date of Patent: September 17, 2002Assignee: Asahi Glass Company, LimitedInventors: Junichi Ebisawa, Nobutaka Aomine, Satoshi Takeda, Kazuyoshi Noda, Daniel Decroupet
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Patent number: 6447679Abstract: The present invention provides a gas-permeable hollow fiber membrane having an inner diameter of 50 to 500 &mgr;m, which is preferably a composite hollow fiber membrane having a three-layer structure consisting of a nonporous layer having porous layers disposed on both sides thereof. This membrane can be used to remove dissolved gases present in an ink.Type: GrantFiled: February 1, 2000Date of Patent: September 10, 2002Assignee: Mitsubishi Rayon Company, LimitedInventors: Kenji Watari, Satoshi Takeda, Masumi Kobayashi, Makoto Uchida, Masamoto Uenishi, Noriaki Fukushima, Seiji Hayashi
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Patent number: 6438620Abstract: A software linking system in an information processor having an operating system in which plural sets of software are operable, includes an information obtaining means for obtaining information within the information processor, an anchor identifying means for judging whether or not there exists anchor information for specifying a linkage condition under which linking-source software recognizes linked software on the basis of the information obtained by the information obtaining means, and a linkage executing means for executing the linked software performing a linking operation corresponding to the anchor information identified by the anchor identifying means, whereby an anchor process is executed outside the linking software without changing the linking software and a file in a format thereof with the result that the software runs both on a linking source side and on a linked side.Type: GrantFiled: June 15, 1998Date of Patent: August 20, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Satoshi Takeda, Taiji Tsuchida, Kazutomo Naganuma, Junichi Yokosato, Yasuhiro Suzuki
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Publication number: 20020034641Abstract: A glazing panel carrying a coating stack comprises in sequence at least:Type: ApplicationFiled: June 18, 2001Publication date: March 21, 2002Applicant: Asahi Glass Company, Ltd.Inventors: Junichi Ebisawa, Nobutaka Aomine, Satoshi Takeda, Kazuyoshi Noda, Daniel Decroupet
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Patent number: 6352880Abstract: A semiconductor device production method of the invention includes a step of packaging a semiconductor chip with a transparent material (14) which penetrates a laser beam (13) within a predetermined range of wavelength having sufficient energy to cut part of an adjustable circuit (12), and a step of trimming part of the adjustable circuit (12) to obtain a target value of electric properties for the adjustable circuit by focusing, after the packaging step, the laser beam (13) onto the adjustable circuit from an upper surface of the semiconductor chip through the transparent material.Type: GrantFiled: September 29, 2000Date of Patent: March 5, 2002Assignee: Ricoh Company, Ltd.Inventors: Masami Takai, Akira Nakamura, Satoshi Takeda, Tatsuya Matsuki
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Publication number: 20020022134Abstract: An excellent heat-resistant electroconductive nitride film containing Ti and/or Zr, and at least one metal selected from the group consisting of Al, Mo, Cr, Nb, Hf, Ni, Co, Fe, Pd, Ag, Au and Pt, its production method and an antireflector using the electroconductive nitride film.Type: ApplicationFiled: August 10, 2001Publication date: February 21, 2002Applicant: ASAHI GLASS COMPANY, LIMITEDInventors: Masami Fujino, Kazuo Sato, Akira Mitsui, Satoshi Takeda, Noritoshi Horie
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Publication number: 20020022132Abstract: A glazing panel carrying a solar control coating stack comprising in sequence at least:Type: ApplicationFiled: June 18, 2001Publication date: February 21, 2002Applicant: Asahi Glass Company, Ltd.Inventors: Junichi Ebisawa, Nobutaka Aomine, Satoshi Takeda, Kazuyoshi Noda, Daniel Decroupet
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Patent number: 6340529Abstract: A glazing panel carrying a solar control coating stack comprising in sequence at least: a glass substrate; a base antireflective layer comprises at least one layer comprising a nitride of aluminum an infra-red reflecting layer; and a top antireflective layer. The nitride of aluminum confers, inter alia, good thermal stability on the coating, particularly during heat treatment.Type: GrantFiled: December 20, 1999Date of Patent: January 22, 2002Assignee: Asahi Glass Company Ltd.Inventors: Junichi Ebisawa, Nobutaka Aomine, Satoshi Takeda, Kazuyoshi Noda, Daniel Decroupet
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Publication number: 20020002637Abstract: A software linking system in an information processor having an operating system in which plural sets of software are operable, includes an information obtaining means for obtaining information within the information processor, an anchor identifying means for judging whether or not there exists anchor information for specifying a linkage condition under which linking-source software recognizes linked software on the basis of the information obtained by the information obtaining means, and a linkage executing means for executing the liked software performing an linking operation corresponding to the anchor information identified by the anchor identifying means, whereby an anchor process is executed outside the linking software without changing the linking software and a file in a format thereof with the result that the software runs both on a linking source side and on a linked side.Type: ApplicationFiled: June 15, 1998Publication date: January 3, 2002Inventors: SATOSHI TAKEDA, TAIJI TSUCHIDA, KAZUTOMO NAGANUMA, JUNICHI YOKOSATO, YASUHIRO SUZUKI
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Patent number: 6251524Abstract: A colored film comprising gold, bismuth oxide and an oxide other than bismuth oxide.Type: GrantFiled: September 29, 1999Date of Patent: June 26, 2001Assignee: Asahi Glass Company Ltd.Inventors: Kenji Ishizeki, Yasuhiro Sanada, Satoshi Takeda, Akira Hirano
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Patent number: 5871843Abstract: A laminate comprising a substrate and at least one layer formed on the substrate, in which the outermost layer as a surface layer has a plurality of micropores therein and, at its surface, a flat portion and fine craters, said flat portion having a surface roughness R.sub.a of at most 3 nm and an area ratio of at least 20%.Type: GrantFiled: March 26, 1997Date of Patent: February 16, 1999Assignee: Asahi Glass Company Ltd.Inventors: Takashige Yoneda, Makoto Fukawa, Takeshi Morimoto, Kazuo Sato, Fumiaki Gunji, Hiromichi Nishimura, Satoshi Takeda, Yasuo Hayashi, Hiroyuki Fujita
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Patent number: 5808030Abstract: An isolated hTFIIIA gene having a nucleotide sequence coding for the amino acid sequence of SEQ ID NO:1, as disclosed, and in particular the hTFIIIA gene having the nucleotide sequence of SEQ ID NO:2. The gene can be used to express a corresponding hTFIIIA protein. The gene and protein serve as transcription regulating factors, and are useful in the diagnosis or identification of hereditary disease, such as cancer or other diseases resulting from abnormal transcriptional control and, further, in analyzing the mechanisms of action thereof.Type: GrantFiled: September 5, 1995Date of Patent: September 15, 1998Assignee: Otsuka Pharmaceutical Co., Ltd.Inventors: Tsutomu Fujiwara, Satoshi Takeda, Yoshikazu Shimada, Kouichi Ozaki, Sadahito Shin, deceased
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Patent number: 5612136Abstract: The present invention provides a pressure-sensitive adhesive composition and tape prepared therefrom which has excellent ability to adhere to acidic surfaces such as acid-rain resistant automotive paints. The adhesive comprises a crosslinked copolymer comprising certain (meth)acrylate esters, certain nitrogen containing basic monomers copolymerizable therewith, optional copolymerizable acidic monomer, and crosslinker.Type: GrantFiled: October 6, 1994Date of Patent: March 18, 1997Assignee: Minnesota Mining and Manufacturing CompanyInventors: Albert I. Everaerts, Satoshi Takeda, Peter A. Stark
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Patent number: 5430723Abstract: A time switch control system having a cross-connect function is used for digital time-division. Multiplex communications permit desired channel settings and reduce power consumption. Identifying circuits identify which time-slot signals are to be retained by an input signal retaining memory, and output identification information to the retention memory, and to a retention memory controller. The retention memory controller stores therein the identification information from the identifying circuits, then reads out the identification information, and controls the input signal retaining memory in accordance with the contents of the identification information. Only the specified time-slot signals are stored and retained by the input signal retaining memory, thereby reducing power requirements. Exchange/output circuits exchange the time-slot signals stored in the input signal retaining memory in accordance with channel setting information, and output the exchanged signals.Type: GrantFiled: May 13, 1993Date of Patent: July 4, 1995Assignee: NEC CorporationInventors: Hiroshi Nakaide, Katsuhiko Nakamoto, Kensaburo Namba, Shinji Hiyama, Satoshi Takeda
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Patent number: 5426654Abstract: At a CRC transmission side of a cross connect equipment, a CRC operation is applied to received channel data of each channel independently and sequentially in every sub frame having the same number of channels, series of which sub frames set up a main frame. The resultant CRC code of each channel obtained in a preceding sub frame is coupled to the received channel data of the corresponding channel to apply the same CRC operation to the thus received channel data, thereby the accumulated result of each channel is added in the last sub frame. At a CRC reception side, a cyclic CRC operation similar to that achieved at the CRC transmission side is applied to an outgoing channel data provided with the resultant CRC codes for each channel to obtain CRC results. During the cyclic CRC operation, a CRC error that once occurs is held during the main frame.Type: GrantFiled: December 3, 1992Date of Patent: June 20, 1995Assignee: Fujitsu LimitedInventors: Toshiaki Hayashi, Hiroshi Nakaide, Shinzi Hiyama, Satoshi Takeda, Masashi Ohba
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Patent number: 5319637Abstract: A synchronous control method in a plurality of channel units for synchronously transmitting each transmission signal in response to a synchronous control signal by a plurality of channel units comprising the process steps of providing a synchronous control circuit for outputting a synchronous control signal to each channel unit; and supplying the synchronous control signal from the synchronous control circuit corresponding to a high order channel unit to the self-channel unit and the synchronous control circuit corresponding to a low order channel unit in response to the synchronous signal in the transmission signal. By using this method, a synchronous control circuit having a single circuit constitution can respond to many combinations of arbitrary channels.Type: GrantFiled: April 10, 1992Date of Patent: June 7, 1994Assignee: Fujitsu LimitedInventors: Atsuki Taniguchi, Satoshi Takeda, Norihisa Miura
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Patent number: 5058526Abstract: A CVD apparatus having a single loading-unloading chamber that serves as a loading chamber in the left and center parts and as an unloading chamber in the right and center parts. Alternately, wafers provisionally stored in cassettes are put into and taken from an auxiliary chamber connected at the center part. The loading-unloading chamber has a sliding bed for slidingly transferring two cassettes, each used for temporarily carrying a plurality of wafers for loading from a load cassette table through the loading cassette to a reaction chamber and for unloading from the reaction chamber through an unloading cassette to an unloading cassette table.Type: GrantFiled: March 3, 1989Date of Patent: October 22, 1991Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshinari Matsushita, Kenji Fukumoto, Satoshi Takeda
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Patent number: 4849995Abstract: A digital signal transmission system includes a synchronization pattern detection circuit for detecting a synchronization pattern in response to a received transmitted digital signal, a pseudo synchronization detection circuit for detecting a pseudo synchronization pattern in the form of cyclic redundancy code in response to a received transmitted digital signal, and a synchronization protection circuit for counting the synchronization pattern detection signals produced when synchronization patterns are detected in response to a synchronization pattern detection signal from the synchronization pattern detection circuit. The synchronization protection circuit includes a main synchronization counter circuit and an auxiliary synchronization counter circuit. The count of protection steps for the confirmation of synchronization recovery of the auxiliary synchronization counter circuit in accordance with synchronization or asynchronization of the main synchronization counter circuit is variable.Type: GrantFiled: July 25, 1986Date of Patent: July 18, 1989Assignees: Fujitsu Limited, Nippon Telegraph and Telephone CorporationInventors: Hiroshi Takeo, Masanori Kajiwara, Michinobu Ohhata, Takao Moriya, Satoshi Takeda, Hiroshi Nakaide, Hiroshi Yamasaki, Toshinari Kunieda, Ikuo Washiyama