Patents by Inventor Satoshi Takenaka

Satoshi Takenaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150180213
    Abstract: A vertical cavity surface emitting laser includes: a laminated body; an insulation layer which is provided over at least a portion of the laminated body; an electrode of which at least a portion is provided over the laminated body; a pad; and a wiring which connects the electrode and the pad, wherein the laminated body includes a first mirror layer, an active layer, and a second mirror layer, the laminated body includes a first distortion imparting portion, a second distortion imparting portion, and a resonance portion which is provided between the first distortion imparting portion and the second distortion imparting portion, in a plan view, the electrode is provided so as to cover at least a portion of the resonance portion, in the plan view, a width of the wiring is greater than a width of the first distortion imparting portion and is smaller than a width of the electrode.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 25, 2015
    Inventors: Satoshi TAKENAKA, Yuji KURACHI, Shoji ONO
  • Publication number: 20150180209
    Abstract: A vertical cavity surface emitting laser includes: a substrate; a first mirror layer which is provided over the substrate; an active layer which is provided over the first mirror layer; a second mirror layer which is provided over the active layer; a first electrode and a second electrode which are electrically connected to the first mirror layer and are separated from each other; and a third electrode which is electrically connected to the second mirror layer, wherein the first mirror layer, the active layer, and the second mirror layer configure a laminated body, the laminated body includes a resonance portion which resonates light generated in the active layer, in a plan view, an insulation layer surrounding the laminated body is provided, and in the plan view, the insulation layer is provided between the first electrode and the second electrode.
    Type: Application
    Filed: December 17, 2014
    Publication date: June 25, 2015
    Inventors: Satoshi TAKENAKA, Yuji KURACHI
  • Publication number: 20150014532
    Abstract: A photoconductive antenna includes a semiconductor layer, and first and second electrodes. The semiconductor layer includes a first conductive region and a second conductive region constituting portions of a surface of the semiconductor layer disposed on a side to which the pulsed light is irradiated, and a third conductive region disposed between the first and second conductive regions. The first conductive region contains a first conductive type impurity and the second conductive region contains a second conductive type impurity. The third conductive region has a carrier density lower than a carrier density of the first conductive region or a carrier density of the second conductive region. The first electrode and the second electrode are disposed on the side to which the pulsed light is irradiated. The third conductive region is configured and arranged to be irradiated by the pulsed light.
    Type: Application
    Filed: October 2, 2014
    Publication date: January 15, 2015
    Inventor: Satoshi TAKENAKA
  • Patent number: 8878134
    Abstract: A photoconductive antenna is adapted to generate terahertz waves when irradiated by pulsed light. The photoconductive antenna includes a first conductive region, a second conductive region, and a semiconductor region. The second conductive region is spaced apart from the first conductive region to form a gap therebetween in a top plan view of the photoconductive antenna. The semiconductor region is positioned in the gap between the first conductive region and the second conductive region in the top plan view. An interfacial surface of the semiconductor region positioned in the gap is flush with first interfacial surfaces of the first and second conductive regions. Second interfacial surfaces of the first and second conductive regions positioned on an opposite side from the first interfacial surfaces are positioned on the same side with respect to the interfacial surface of the semiconductor region positioned in the gap.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: November 4, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Takenaka
  • Publication number: 20140252231
    Abstract: A specimen inspection apparatus includes: a terahertz wave generation unit which generates a terahertz wave; a transportation unit which includes a transportation surface on which specimens as inspection objects are loaded and is configured so as to transport the specimens in an in-plane direction of the transportation surface; an irradiation direction changing unit which changes an irradiation direction of a terahertz wave which is emitted from the terahertz wave generation unit and is emitted to the specimens loaded on the transportation surface; and a terahertz wave detection unit which detects a terahertz wave which is emitted to the specimens loaded on the transportation surface to transmit therethrough or be reflected thereby, wherein the irradiation direction changing unit changes the irradiation direction by changing a position of the terahertz wave generation unit.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 11, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hiroto TOMIOKA, Satoshi TAKENAKA
  • Publication number: 20140240510
    Abstract: A photo conductive antenna irradiated with light pulse and generating terahertz wave includes a first layer formed by a semi-insulating substrate, a second layer located on the first layer and formed using a material having lower carrier mobility than carrier mobility of the semi-insulating substrate, a first electrode and a second electrode located on the second layer and applying a voltage to the first layer, a first region in which the second layer is formed on the first layer, and a second region in which the second layer is formed on the first layer, wherein the second region is located between the first electrode and the second electrode in a plan view, and the light pulse is applied to the second region.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 28, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Satoshi TAKENAKA
  • Patent number: 6910018
    Abstract: In a client-server environment in which a plurality of clients are connected on a network, a manager of a company displays an approval request list window (07-01-00) in which a list of purchase-requested articles is displayed, on a client by a predetermined operation, selects a desired article from the articles displayed in the window, and clicks a software button “approval select” or “rejection select” in accordance with approval or rejection of the selected article. At this time, the article for which approval is selected can be formally ordered.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: June 21, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsushi Okada, Masayuki Sofue, Naotsugu Hiroki, Masahiro Yamamoto, Masaya Watanuki, Satoshi Takenaka
  • Patent number: 6882016
    Abstract: A semiconductor device is provided including a transistor having excellent ON current characteristics and OFF leakage current characteristics, an electro-optical device holding an electro-optical material using the semiconductor device, an electronic apparatus using the electro-optical device, and a method for manufacturing the semiconductor device. For a transistor, a source region and a drain region are impurity regions heavily doped by a self-aligned method relative to a gate electrode. Parts of the gate insulating film overlapping with boundary regions of the channel formation region adjacent to the drain region and the source region, are thicker than a part of the gate insulating film overlapping with a center part of the channel formation region, relative to the longitudinal direction of the channel.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: April 19, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Takenaka
  • Patent number: 6822777
    Abstract: The invention provides a semi-transparent reflective electro-optic apparatus capable of increasing a quantity of display light in either of the reflection mode and the transparent mode, and electronic equipment including the same. In a TFT array substrate of a reflective electro-optic apparatus, the back surface of a light-reflecting film includes a light-guiding reflection surface that reflects and guides light incident from the back surface side of a light-transmitting substrate to the surface of the light-reflecting film opposing the light-guiding reflection surface with a light-transmitting window in between. Hence, of the light incident from the back surface side of the light-transmitting substrate, light that is shielded in the related art by the light-reflecting film and does not contribute to display in the transparent mode is partly reflected on the light-guiding reflection surface and thereby contributes to display.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: November 23, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Takenaka
  • Patent number: 6808965
    Abstract: A high-performance thin-film semiconductor device and a simple fabrication method is provided. After a silicon film is deposited at approximately 530° C. or less and at a deposition rate of at least approximately 6 Å/minute, thermal oxidation is performed. This ensures an easy-and simple fabrication of a high-performance thin-film semiconductor device. A thin-film semiconductor device capable of low-voltage and high-speed drive is provided. The short-channel type of a TFT circuit with an LDD structure reduces a threshold voltage, increases speed, restrains the power consumption and increases a breakdown voltage. The operational speed of the thin-film semiconductor device is further increased by optimizing the maximum impurity concentration of an LDD portion, a source portion a drain portion, as well as optimizing the LDD length and the channel length. A display system is provided using these TFTs having drive signals at or below approximately the TTL level.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: October 26, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Mitsutoshi Miyasaka, Yojiro Matsueda, Satoshi Takenaka
  • Patent number: 6767772
    Abstract: The invention provides an active matrix substrate which allows the film quality of a MIS transistor to be evaluated easily and accurately, an electrooptical device using such an active matrix substrate, and a method of producing such an active matrix substrate. On an active matrix substrate, a film quality evaluation region with a size of 1 mm square is formed at a location where neither an image display area, a scanning line driving circuit, a data line driving circuit, nor a signal line is formed. A semiconductor film (silicon film) for film quality evaluation is formed in the film quality evaluation region using the same layer as a heavily doped source/drain region of a TFT and doped with the same impurity at the same concentration as the source/drain region. The semiconductor film for film quality evaluation is exposed through an opening formed through interlayer insulating films, so that it is possible to immediately start evaluation of the film equality.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: July 27, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Takenaka
  • Patent number: 6765637
    Abstract: The present invention provides a translucent reflection type electro-optic device that can increase a display light amount in both a reflection mode and a transmission mode, an electronic instrument therewith, and a method of fabricating the translucent reflection type electro-optic device. In a TFT array substrate of a reflection type electro-optic device, on a bottom layer side of a light reflection film, a concavity and convexity formation layer that forms a concavity and convexity pattern can be formed with a first photosensitive resin having a refractive index, n1, on a top layer of the concavity and convexity formation layer a top layer insulating film made of a second photosensitive resin having a refractive index, n2 (n1>n2), is formed, and at a position that overlaps with convexities of the concavity and convexity pattern, a light transmission window is formed.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: July 20, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Takenaka
  • Patent number: 6763335
    Abstract: In an existing or new client/server system environment in which a plurality of clients are connected on a network, a function of specifying (selecting) a desired article by a requester, a function of requesting an approver to approve purchase of the specified article, and a function of determining approval or rejection for purchase of the approval-requested article by the approver are realized. A user logs in to this system as a requester or approver from a predetermined Web page displayed on the client in accordance with the user (employee) ID. A user who has logged in as an approver can also use the article specifying function and approval request function.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: July 13, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshihide Nanbu, Hideo Haga, Masanori Konno, Yoshinori Kato, Masayuki Sofue, Masahiro Yamamoto, Masaya Watanuki, Satoshi Takenaka
  • Publication number: 20040113214
    Abstract: A semiconductor device is provided including a transistor having excellent ON current characteristics and OFF leakage current characteristics, an electro-optical device holding an electro-optical material using the semiconductor device, an electronic apparatus using the electro-optical device, and a method for manufacturing the semiconductor device. For a transistor, a source region and a drain region are impurity regions heavily doped by a self-aligned method relative to a gate electrode. Parts of the gate insulating film overlapping with boundary regions of the channel formation region adjacent to the drain region and the source region, are thicker than a part of the gate insulating film overlapping with a center part of the channel formation region, relative to the longitudinal direction of the channel.
    Type: Application
    Filed: September 17, 2003
    Publication date: June 17, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Satoshi Takenaka
  • Publication number: 20040032678
    Abstract: The invention provides a semi-transparent reflective electro-optic apparatus capable of increasing a quantity of display light in either of the reflection mode and the transparent mode, and electronic equipment including the same. In a TFT array substrate of a reflective electro-optic apparatus, the back surface of a light-reflecting film includes a light-guiding reflection surface that reflects and guides light incident from the back surface side of a light-transmitting substrate to the surface of the light-reflecting film opposing the light-guiding reflection surface with a light-transmitting window in between. Hence, of the light incident from the back surface side of the light-transmitting substrate, light that is shielded in the related art by the light-reflecting film and does not contribute to display in the transparent mode is partly reflected on the light-guiding reflection surface and thereby contributes to display.
    Type: Application
    Filed: June 30, 2003
    Publication date: February 19, 2004
    Applicant: Seiko Epson Corporation
    Inventor: Satoshi Takenaka
  • Publication number: 20040005741
    Abstract: The invention provides an active matrix substrate which allows the film quality of a MIS transistor to be evaluated easily and accurately, an electrooptical device using such an active matrix substrate, and a method of producing such an active matrix substrate. On an active matrix substrate, a film quality evaluation region with a size of 1 mm square is formed at a location where neither an image display area, a scanning line driving circuit, a data line driving circuit, nor a signal line is formed. A semiconductor film (silicon film) for film quality evaluation is formed in the film quality evaluation region using the same layer as a heavily doped source/drain region of a TFT and doped with the same impurity at the same concentration as the source/drain region. The semiconductor film for film quality evaluation is exposed through an opening formed through interlayer insulating films, so that it is possible to immediately start evaluation of the film equality.
    Type: Application
    Filed: June 26, 2003
    Publication date: January 8, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Satoshi Takenaka
  • Patent number: 6614053
    Abstract: The invention provides an active matrix substrate which allows the film quality of a MIS transistor to be evaluated easily and accurately, an electrooptical device using such an active matrix substrate, and a method of producing such an active matrix substrate. On an active matrix substrate, a film quality evaluation region with a size of 1 mm square is formed at a location where neither an image display area, a scanning line driving circuit, a data line driving circuit, nor a signal line is formed. A semiconductor film (silicon film) for film quality evaluation is formed in the film quality evaluation region using the same layer as a heavily doped source/drain region of a TFT and doped with the same impurity at the same concentration as the source/drain region. The semiconductor film for film quality evaluation is exposed through an opening formed through interlayer insulating films, so that it is possible to immediately start evaluation of the film equality.
    Type: Grant
    Filed: March 13, 2000
    Date of Patent: September 2, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Satoshi Takenaka
  • Publication number: 20030142253
    Abstract: The present invention provides a translucent reflection type electro-optic device that can increase a display light amount in both a reflection mode and a transmission mode, an electronic instrument therewith, and a method of fabricating the translucent reflection type electro-optic device. In a TFT array substrate of a reflection type electro-optic device, on a bottom layer side of a light reflection film, a concavity and convexity formation layer that forms a concavity and convexity pattern can be formed with a first photosensitive resin having a refractive index, n1, on a top layer of the concavity and convexity formation layer a top layer insulating film made of a second photosensitive resin having a refractive index, n2 (n1>n2), is formed, and at a position that overlaps with convexities of the concavity and convexity pattern, a light transmission window is formed.
    Type: Application
    Filed: December 9, 2002
    Publication date: July 31, 2003
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Satoshi Takenaka
  • Publication number: 20020132452
    Abstract: An improved polycrystalline or polysilicon film having large grain size, such as 1 &mgr;m to 2 &mgr;m in diameter or greater, is obtained over the methods of the prior art by initially forming a silicon film, which may be comprised of amorphous silicon or micro-crystalline silicon or contains micro-crystal regions in the amorphous phase, at a low temperature via a chemical vapor deposition (CVD) method, such as by plasma chemical vapor deposition (PCVD) with silane gas diluted with, for example, hydrogen, argon or helium at a temperature, for example, in the range of room temperature to 600° C. This is followed by solid phase recrystallization of the film to form a polycrystalline film which is conducted at a relatively low temperature in the range of about 550° C. to 650° C. in an inert atmosphere, e.g., N or Ar, for a period of about several hours to 40 or more hours wherein the temperature is gradually increased, e.g., at a temperature rise rate below 20° C./min, preferably about 5° C.
    Type: Application
    Filed: May 9, 2002
    Publication date: September 19, 2002
    Inventors: Hideaki Oka, Satoshi Takenaka, Masafumi Kunii
  • Patent number: 6403497
    Abstract: A polycrystalline or polysilicon film having large grain size, such as 1 &mgr;m to 2 &mgr;m in diameter or greater, is obtained over the methods of the prior art by initially forming a silicon film, which may be comprised of amorphous silicon or micro-crystalline silicon or contains micro-crystal regions in the amorphous phase, at a low temperature via a chemical vapor deposition (CVD) method, such as by plasma chemical vapor deposition (PCVD) with silane gas diluted with, for example, hydrogen, argon or helium at a temperature, for example, in the range of room temperature to 600° C. This is followed by solid phase recrystallization of the film to form a polycrystalline film which is conducted at a relatively low temperature in the range of about 550° C. to 650° C. in an inert atmosphere, e.g., N or Ar, for a period of about several hours to 40 or more hours wherein the temperature is gradually increased, e.g., at a temperature rise rate below 20° C./min, preferably about 5° C.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: June 11, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Hideaki Oka, Satoshi Takenaka, Masafumi Kunii