Patents by Inventor Satoshi Takenaka

Satoshi Takenaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6235563
    Abstract: An improved polycrystalline or polysilicon film having large grain size, such as 1 &mgr;m to 2 &mgr;m in diameter or greater, is obtained over the methods of the prior art by initially forming a silicon film, which may be comprised of amorphous silicon or micro-crystalline silicon or contains micro-crystal regions in the amorphous phase, at a low temperature via a chemical vapor deposition (CVD) method, such as by plasma chemical vapor deposition (PCVD) with silane gas diluted with, for example, hydrogen, argon or helium at a temperature, for example, in the range of room temperature to 600° C. This is followed by solid phase recrystallization of the film to form a polycrystalline film which is conducted at a relatively low temperature in the range of about 550° C. to 650° C. in an inert atmosphere, e.g., N or Ar, for a period of about several hours to 40 or more hours wherein the temperature is gradually increased, e.g., at a temperature rise rate below 20° C./min, preferably about 5° C.
    Type: Grant
    Filed: November 7, 1991
    Date of Patent: May 22, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Hideaki Oka, Satoshi Takenaka, Masafumi Kunii
  • Patent number: 6180957
    Abstract: A high-performance thin-film semiconductor device and a simple fabrication method is provided. After a silicon film is deposited at approximately or less 580° C. and at a deposition rate of at least approximately 6 Å/minute, thermal oxidation is performed. This ensures an easy and simple fabrication of a high-performance thin-film semiconductor device. A thin-film semiconductor device capable of low-voltage and high-speed drive is provided. The short-channel type of a TFT circuit with an LDD structure reduces a threshold voltage, increases speed, restrains the power consumption and increases a breakdown voltage. The operational speeds of the thin-film semiconductor device is further increased by optimizing the maximum impurity concentration of an LDD portion, a source portion a drain portion, as well as optimizing the LDD length and the channel length. A display system is provided using these TFTs having drive signals at or below approximately the TTL level.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: January 30, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Mitsutoshi Miyasaka, Yojiro Matsueda, Satoshi Takenaka
  • Patent number: 5953582
    Abstract: In the formation of a thin-film transistor (620) capable of improving the OFF current characteristic, first, all ions (arrow Ion-1) generated from a mixed gas (doping gas) containing 5% PH.sub.3 with the remainder being H.sub.2 gas are implanted to a polycrystalline silicon film (604) at an approximately 80 keV energy level to achieve a P.sup.+ ion dose in the range from 3.times.10.sup.13 /cm.sup.2 to 1.times.10.sup.14 /cm.sup.2 in the process forming low concentration source-drain areas (602, 603). Next, all ions generated from a doping gas of pure hydrogen (arrow Ion-2) are implanted to the low concentration area (604a) at an approximately 20 keV energy level to achieve an H.sup.+ ion dose from 1.times.10.sup.14 /cm.sup.2 to 1.times.10.sup.15 /cm.sup.2. Then, the impurity is activated by heat treatment of the low concentration area (604a) implanted with impurity for approximately one hour at approximately 300.degree. C. in a nitrogen atmosphere.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: September 14, 1999
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Minoru Matsuo, Satoshi Takenaka
  • Patent number: 5834827
    Abstract: Electronic devices are provided with electrically conductive interconnections which are formed on the insulator material. Such electronic devices include, for example, thin film semiconductor devices (TFT), metal-insulator-metallic type non-wiring elements (MIM), solar cells, Large Scale Integration devices (LSI) or printed-wiring boards. At least a part of the electrically conductive interconnections are made of .alpha.-structure tantalum (Ta) which contains hydrogen. The .alpha.-structure tantalum does not have cubical crystals in its crystal system, but rather has body-centered cubes (bcc). The resistivity of the .alpha.-structure tantalum is from about 20 .mu..OMEGA. centimeters to about 60 .mu..OMEGA. centimeters. When hydrogen is included within this .alpha.-structure tantalum film, small amounts of nitrogen may be contained along with the hydrogen in the film.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: November 10, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Mitsutoshi Miyasaka, Kiyofumi Kitawada, Minoru Matsuo, Seiichiro Higashi, Tokuroh Ozawa, Satoshi Takenaka, Yojiro Matsueda, Takashi Nakazawa, Hiroyuki Ohshima, Satoshi Inoue
  • Patent number: 5563427
    Abstract: In the formation of a thin-film transistor (620) capable of improving the OFF current characteristic, first, all ions (arrow Ion-1) generated from a mixed gas (doping gas) containing 5% PH.sub.3 with the remainder being H.sub.2 gas are implanted to a polycrystalline silicon film (604) at an approximately 80 keV energy level to achieve a P.sup.+ ion dose in the range from 3.times.10.sup.13 /cm.sup.2 to 1.times.10.sup.14 /cm.sup.2 in the process forming low concentration source-drain areas (602, 603). Next, all ions generated from a doping gas of pure hydrogen (arrow Ion-2) are implanted to the low concentration area (604a) at an approximately 20 keV energy level to achieve an H.sup.+ ion dose from 1.times.10.sup.14 /cm.sup.2 to 1.times.10.sup.15 /cm.sup.2. Then, the impurity is activated by heat treatment of the low concentration area (604a) implanted with impurity for approximately one hour at approximately 300.degree. C. in a nitrogen atmosphere.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: October 8, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Minoru Matsuo, Satoshi Takenaka
  • Patent number: 5070049
    Abstract: In the production of silicon carbide, a starting composition comprising silicon dioxide powder and a carbonaceous substance and having a bulk density of 0.2 to 2.0 g/cm.sup.3 is used, wherein the silicon dioxide is covered with the carbonaceous substance and uniformly dispersed therein. The starting composition is produced by forming a kneaded mixture of silicon dioxide and high molecular weight organic compound, heating the kneaded mixture to conduct carbonization and thereby form a composite body and then granulating the composite body into 3 to 25 mm sized granules.
    Type: Grant
    Filed: December 19, 1988
    Date of Patent: December 3, 1991
    Assignee: Ibiden, Co. Ltd.
    Inventors: Toshikazu Amino, Satoshi Takenaka
  • Patent number: 4246342
    Abstract: Pyruvate oxidase can be produced by culturing Pediococcus sp. B-0667, Streptococcus sp. B-0668, Aerococcus viridans IFO-12219 or Aerococcus viridans IFO-12317. It is useful for analysis for pyruvic acid, because it catalyzes the reaction of pyruvic acid, phosphate and oxygen to form acetylphosphate, carbon dioxide and hydrogen peroxide. A kit containing the various reagents for such analysis is also provided by this invention.
    Type: Grant
    Filed: March 21, 1979
    Date of Patent: January 20, 1981
    Assignee: Toyo Jozo Kabushiki Kaisha
    Inventors: Hideo Misaki, Kazuo Matsuura, Saburo Harada, Satoshi Takenaka, Yoshifumi Horiuchi