Patents by Inventor Satoshi Tanigawa

Satoshi Tanigawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6001483
    Abstract: A composition useful as an encapsulating material for photosemiconductor elements such as a photodetector or light emmitor comprises an epoxy resin, a hardener and at least one compound represented by the following general formula (1) or (2):CH.sub.3 CH.sub.2 --(--CH.sub.2 --CH.sub.2 --).sub.x --CH.sub.2 --CH.sub.2 --O--(--CH.sub.2 --CH.sub.2 --O--).sub.n --Y.sub.1 (1)[CH.sub.3 CH.sub.2 --(--CH.sub.2 --CH.sub.2 --).sub.x --CH.sub.2 --CH.sub.2 --O--(--CH.sub.2 --CH.sub.2 --O--).sub.n --RCOO--].sub.m --Y.sub.2(2)wherein Y.sub.1 represents --H, --RCOOH, --COR' or --R'; R' is an alkyl group with not more than 30 carbon atoms; R is a divalent organic group; Y.sub.2 represents a metal atom having a valence of at least one; the mean value for x is from 8-200; and n is set such that the weight ratio of the repeating unit --CH.sub.2 --CH.sub.2 --O-- accounts for from 25-95% by weight based on the whole compound; and m is a positive integer corresponding to the valence of Y.sub.2.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: December 14, 1999
    Assignee: Nitto Denko Corporation
    Inventors: Tadaaki Harada, Shinjirou Uenishi, Hirokatsu Kouyama, Takahiko Maruhashi, Katsumi Shimada, Satoshi Tanigawa
  • Patent number: 5990546
    Abstract: A semiconductor device in which the space between a semiconductor chip and an auxiliary wiring plate is sealed with resin. The auxiliary wiring plate has insulating layers and on both sides of the routing conductor, the insulating layer on the side of the semiconductor chip has a hole being led from the routing conductor to the electrode of the semiconductor chip, the metal filled in the hole and the metal bump formed so as to protrude from the hole serves as an inner electrode. The semiconductor device can be manufactured by the TAB technique.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: November 23, 1999
    Assignee: Nitto Denko Corporation
    Inventors: Kazumasa Igarashi, Megumu Nagasawa, Satoshi Tanigawa, Hideyuki Usui, Nobuhiko Yoshio, Hisataka Ito
  • Patent number: 5814894
    Abstract: A semiconductor device capable of preventing the occurrence of defect of electroconductivity, wherein a semiconductor chip 1 equipped with electrodes 11 is mounted on an auxiliary wiring plate 2 in the state of facing the surface of the electrode 11 side, leading conductors 23 are disposed in the inside of the auxiliary wiring plate 2, one end of each leading conductor 23 forms an internal electrode 21 projecting from the surface of the auxiliary wiring plate 2 at the side of mounting the semiconductor chip 1, the other end of the leading conductor 23 forms an external electrode 22 projecting from the surface of the auxiliary wiring plate opposite to the side of mounting the semiconductor chip 1, and each of the internal electrodes 21 is connected to each of the electrodes 11 of the semiconductor chip 1, at least a gap between the semiconductor chip 1 and the auxiliary wiring plate 2 is encapsulated with a heat-welding polyimide resin layer.
    Type: Grant
    Filed: April 4, 1996
    Date of Patent: September 29, 1998
    Assignee: Nitto Denko Corporation
    Inventors: Kazumasa Igarashi, Megumu Nagasawa, Satoshi Tanigawa, Hideyuki Usui, Nobuhiko Yoshio, Hisataka Ito, Tadao Okawa
  • Patent number: D415754
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: October 26, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Tanigawa, Mitsuru Takami