Patents by Inventor Satya N. Yedidi

Satya N. Yedidi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230097092
    Abstract: Techniques related to video encoding include inline downscaling hardware in multi-pass encoding.
    Type: Application
    Filed: November 1, 2022
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Shriram S. Deshpande, Satya N. Yedidi, James M. Holland, Dmitry E. Ryzhov, Jian Hu, Sai Agnihotri, Indira Munagani
  • Patent number: 11423507
    Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Stanley J. Baran, Sang-Hee Lee, Atthar H. Mohammed, Jong Dae Oh, Hiu-Fai R. Chan, Jill M. Boyce, Fangwen Fu, Satya N. Yedidi, Sumit Mohan, James M. Holland, Keith W. Rowe, Altug Koker
  • Patent number: 11323700
    Abstract: Example apparatus to encode video disclosed herein include an encoder to perform an intra search first stage based on source pixels of a source video frame to determine first intra candidates to predict a block of the source video frame. In disclosed examples, the encoder is also to perform an intra search second stage based on reconstructed pixels of neighboring blocks associated with the first intra candidates to determine a second intra candidate. In disclosed examples, the encoder is further to encode the block of the source video frame based on the second intra candidate.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 3, 2022
    Assignee: Intel Corporation
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Zhijun Lei, Dmitry E. Ryzhov, Lidong Xu, Satya N. Yedidi
  • Publication number: 20210374896
    Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
    Type: Application
    Filed: January 27, 2021
    Publication date: December 2, 2021
    Inventors: Abhishek R. Appu, Stanley J. Baran, Sang-Hee Lee, Atthar H. Mohammed, Jong Dae Oh, Hiu-Fai R. Chan, Jill M. Boyce, Fangwen Fu, Satya N. Yedidi, Sumit Mohan, James M. Holland, Keith W. Rowe, Altug Koker
  • Patent number: 11051038
    Abstract: An embodiment of an electronic processing system may include a 2D frame which corresponds to a projection of a 360 video space, and a component predictor to predict an encode component for a first block of a 2D frame based on encode information from a neighboring block which is neighboring to the first block of the 2D frame only in the 360 video space, a prioritizer to prioritize transmission for a second block of the 2D frame based on an identified region of interest, and/or a format detector to detect a 360 video format of the 2D frame based on image content. A 360 video capture device may include a contextual tagger to tag 360 video content with contextual information which is contemporaneous with the captured 360 video content. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: June 29, 2021
    Assignee: Intel Corporation
    Inventors: Jill M. Boyce, Sumit Mohan, James M. Holland, Sang-Hee Lee, Abhishek R. Appu, Wen-Fu Kao, Joydeep Ray, Ya-Ti Peng, Keith W. Rowe, Fangwen Fu, Satya N. Yedidi
  • Patent number: 11025913
    Abstract: A system for video encoding is described herein. The system includes a processor to execute a multi-pass palette search and mapping on a video frame to generate palette candidates. The processor is to execute an intra block copy prediction on the video frame to generate intra-block-copy candidates. The processor is to also calculate a rate distortion optimization (RDO) cost for a set of generated residuals, the palette candidates, and the intra-block-copy candidates. The processor is to further also execute a final mode decision based on a comparison of the rate distortion optimization (RDO) costs.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: June 1, 2021
    Assignee: Intel Corporation
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Dmitry E. Ryzhov, Lidong Xu, Satya N. Yedidi, Wenhao Zhang
  • Publication number: 20210084294
    Abstract: Example apparatus to encode video disclosed herein include an encoder to perform an intra search first stage based on source pixels of a source video frame to determine first intra candidates to predict a block of the source video frame. In disclosed examples, the encoder is also to perform an intra search second stage based on reconstructed pixels of neighboring blocks associated with the first intra candidates to determine a second intra candidate. In disclosed examples, the encoder is further to encode the block of the source video frame based on the second intra candidate.
    Type: Application
    Filed: November 30, 2020
    Publication date: March 18, 2021
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Zhijun Lei, Dmitry E. Ryzhov, Lidong Xu, Satya N. Yedidi
  • Patent number: 10951900
    Abstract: Speeding up small block intra-prediction in video coding is described herein. The system includes an encoder. The encoder is to execute intra-prediction by deriving a plurality of prediction angles, wherein the prediction angles are based on a video coding standard. The encoder is also to disable a prediction angle for a current block to eliminate a dependency on an immediate predecessor block.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: March 16, 2021
    Assignee: Intel Corporation
    Inventors: Zhijun Lei, Jason Tanner, Satya N. Yedidi
  • Patent number: 10924744
    Abstract: The present techniques include deriving a threshold to maintain an encoding bitrate and determining a percentage of change of a current frame N based on an impact to a bitrate budget. The present techniques also include marking a reference frame N?1 as non-referenceable in response to the percentage of change being smaller than the threshold and encoding a static portion of frame N as a skip and encoding a non-static portion of frame N by referencing the reference frame N?1. Finally, the present techniques include overwriting a surface of the reference frame N with portions of the reference frame N?1 that have changed as compared to frame N.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: February 16, 2021
    Assignee: INTEL CORPORATION
    Inventors: Fangwen Fu, Jason Tanner, Satya N. Yedidi
  • Patent number: 10909653
    Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: February 2, 2021
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Stanley J. Baran, Sang-Hee Lee, Atthar H. Mohammed, Jong Dae Oh, Hiu-Fai R. Chan, Jill M. Boyce, Fangwen Fu, Satya N. Yedidi, Sumit Mohan, James M. Holland, Keith W. Rowe, Altug Koker
  • Patent number: 10872441
    Abstract: A system includes a camera to capture real world content and a semiconductor package apparatus. The semiconductor package apparatus includes a substrate and logic. The logic includes a graphics pipeline to generate rendered content, a base layer encoder to encode real world content into a base layer and a first layer encoder to encode rendered content into a first non-base layer, a multiplexer to interleave the base layer with the first non-base layer to obtain a single output signal having mixed reality content, and a transmitter to transmit the single output signal. The system further includes a second layer encoder to encode map data into a second non-base layer. The multiplexer to interleave the second non-base layer with the first non-base layer and the base layer. The first and second layer encoders encode the rendered content and the map data into overlay auxiliary pictures.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: December 22, 2020
    Assignee: Intel Corporation
    Inventors: Jill M. Boyce, Keith W. Rowe, James M. Holland, Fangwen Fu, Satya N. Yedidi, Sumit Mohan
  • Patent number: 10855983
    Abstract: An example system includes a processor to execute an intra search first stage on a video frame to generate intra candidates. The processor is to execute an intra search second stage on the intra candidates to generate a final intra candidate and residuals. The processor is to also execute a final mode decision and generate reconstructed pixels based on the final intra candidate and the residuals.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: December 1, 2020
    Assignee: Intel Corporation
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Zhijun Lei, Dmitry E. Ryzhov, Lidong Xu, Satya N. Yedidi
  • Publication number: 20200359034
    Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder comprises at least a fixed function dual hierarchical motion estimation search units, dual integer motion estimation search units, and a fractional motion estimation search unit. Moreover, the hardware bit packing unit is to pack bits as coded according to the final macroblock coding decision into a data format.
    Type: Application
    Filed: July 14, 2020
    Publication date: November 12, 2020
    Applicant: INTEL CORPORATION
    Inventors: James M. Holland, Fangwen Fu, Satya N. Yedidi, Srinivasan Embar Raghukrishnan
  • Patent number: 10715818
    Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder comprises at least a fixed function dual hierarchical motion estimation search units, dual integer motion estimation search units, and a fractional motion estimation search unit. Moreover, the hardware bit packing unit is to pack bits as coded according to the final macroblock coding decision into a data format.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: July 14, 2020
    Assignee: Intel Corporation
    Inventors: James M. Holland, Fangwen Fu, Satya N. Yedidi, Srinivasan Embar Raghukrishnan
  • Publication number: 20200186831
    Abstract: An embodiment of an electronic processing system may include a 2D frame which corresponds to a projection of a 360 video space, and a component predictor to predict an encode component for a first block of a 2D frame based on encode information from a neighboring block which is neighboring to the first block of the 2D frame only in the 360 video space, a prioritizer to prioritize transmission for a second block of the 2D frame based on an identified region of interest, and/or a format detector to detect a 360 video format of the 2D frame based on image content. A 360 video capture device may include a contextual tagger to tag 360 video content with contextual information which is contemporaneous with the captured 360 video content. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: December 9, 2019
    Publication date: June 11, 2020
    Applicant: Intel Corporation
    Inventors: Jill M. Boyce, Sumit Mohan, James M. Holland, Sang-Hee Lee, Abhishek R. Appu, Wen-Fu Kao, Joydeep Ray, Ya-Ti Peng, Keith W. Rowe, Fangwen Fu, Satya N. Yedidi
  • Patent number: 10613814
    Abstract: In one aspect, an apparatus comprises an encoder configured to encode groups of pixels of a video frame into encoded groups. The video frame comprises a plurality of tiles and each of the plurality of tiles comprises one or more of the groups. For each tile in the plurality of tiles: the encoder is configured to generate a notification based on completion of encoding an encoded tile corresponding to the tile. The apparatus comprises a packetizer configured to generate packets corresponding to the video frame simultaneous with the encoding of the video frame by the encoder. For each tile in the plurality of tiles: the packetizer is configured to generate packets from the encoded tile corresponding to the tile based on the notification.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Jason Tanner, Arthur Jeremy Runyan, Satya N. Yedidi, Changliang Wang, Ankur Shah, Paul S. Diefenbaugh
  • Publication number: 20200005424
    Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
    Type: Application
    Filed: July 18, 2019
    Publication date: January 2, 2020
    Inventors: Abhishek R. Appu, Stanley J. Baran, Sang-Hee Lee, Atthar H. Mohammed, Jong Dae Oh, Hiu-Fai R. Chan, Jill M. Boyce, Fangwen Fu, Satya N. Yedidi, Sumit Mohan, James M. Holland, Keith W. Rowe, Altug Koker
  • Patent number: 10506255
    Abstract: An embodiment of an electronic processing system may include a 2D frame which corresponds to a projection of a 360 video space, and a component predictor to predict an encode component for a first block of a 2D frame based on encode information from a neighboring block which is neighboring to the first block of the 2D frame only in the 360 video space, a prioritizer to prioritize transmission for a second block of the 2D frame based on an identified region of interest, and/or a format detector to detect a 360 video format of the 2D frame based on image content. A 360 video capture device may include a contextual tagger to tag 360 video content with contextual information which is contemporaneous with the captured 360 video content. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: December 10, 2019
    Assignee: Intel Corporation
    Inventors: Jill M. Boyce, Sang-Hee Lee, Abhishek R. Appu, Wen-Fu Kao, Joydeep Ray, Ya-Ti Peng, Keith W. Rowe, Fangwen Fu, Satya N. Yedidi, Sumit Mohan, James M. Holland
  • Publication number: 20190297344
    Abstract: An example system includes a processor to execute an intra search first stage on a video frame to generate intra candidates. The processor is to execute an intra search second stage on the intra candidates to generate a final intra candidate and residuals. The processor is to also execute a final mode decision and generate reconstructed pixels based on the final intra candidate and the residuals.
    Type: Application
    Filed: June 13, 2019
    Publication date: September 26, 2019
    Applicant: INTEL CORPORATION
    Inventors: James M. Holland, Srinivasan Embar Raghukrishnan, Zhijun Lei, Dmitry E. Ryzhov, Lidong Xu, Satya N. Yedidi
  • Patent number: 10424082
    Abstract: A system includes a camera to capture real world content and a semiconductor package apparatus. The semiconductor package apparatus includes a substrate and logic. The logic includes a graphics pipeline to generate rendered content, a base layer encoder to encode real world content into a base layer and a first layer encoder to encode rendered content into a first non-base layer, a multiplexer to interleave the base layer with the first non-base layer to obtain a single output signal having mixed reality content, and a transmitter to transmit the single output signal. The system further includes a second layer encoder to encode map data into a second non-base layer. The multiplexer to interleave the second non-base layer with the first non-base layer and the base layer. The first and second layer encoders encode the rendered content and the map data into overlay auxiliary pictures.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: September 24, 2019
    Assignee: Intel Corporation
    Inventors: Jill M. Boyce, Keith W. Rowe, James M. Holland, Fangwen Fu, Satya N. Yedidi, Sumit Mohan