Patents by Inventor Satyendra Singh
Satyendra Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11930038Abstract: Example implementations relate to the processing of refresh token requests at an API gateway. The API gateway determines a first time associated with receipt of the refresh token request and a second time associated with the generation of a current access token. The current access token and a refresh token in the refresh token request are provided by the API gateway to the client device for accessing a backend service. The API gateway determines whether a difference between the first time and the second time is within a pre-defined threshold duration. When the difference between the first time and the second time is within the pre-defined threshold, the API gateway denies the refresh token request for generating the new access token and transmits the current access token back to the client device.Type: GrantFiled: July 15, 2021Date of Patent: March 12, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Satyendra Singh, Ganesh Valluru Ramakrishnappa, Tathagata Roy, Ravinder Reddy Bommineni, Sharan Chaitanya Potturu
-
Patent number: 11930590Abstract: In a described example, an apparatus includes: a package substrate having a planar die mount surface; recesses extending into the planar die mount surface; and a semiconductor device die flip chip mounted to the package substrate on the planar die mount surface, the semiconductor device die having post connects having proximate ends on bond pads on an active surface of the semiconductor device die, and extending to distal ends away from the semiconductor device die having solder bumps, wherein the solder bumps form solder joints to the package substrate within the recesses.Type: GrantFiled: March 31, 2021Date of Patent: March 12, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Tianyi Luo, Osvaldo Jorge Lopez, Jonathan Almeria Noquil, Satyendra Singh Chauhan, Bernardo Gallegos
-
Patent number: 11908780Abstract: A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.Type: GrantFiled: November 3, 2021Date of Patent: February 20, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jonathan Almeria Noquil, Satyendra Singh Chauhan, Lance Cole Wright, Osvaldo Jorge Lopez
-
Publication number: 20230384958Abstract: An illustrative embodiment disclosed herein is an apparatus including a processor and a memory. In some embodiments, the memory includes programmed instructions that, when executed by the processor, cause the apparatus to upload an object to a source bucket in an object store and create a lambda bucket in the object store that is symlinked to the source bucket. In some embodiments, the lambda bucket is associated with a predefined transformation. In some embodiments, the memory includes the programmed instructions that, when executed by the processor, cause the apparatus to receive a request to download the object from the lambda bucket, detect that the object is in the source bucket, fetch the object from the source bucket, transform the object, by compute resources of the object store, using the predefined transformation, and download the transformed object.Type: ApplicationFiled: July 25, 2022Publication date: November 30, 2023Applicant: Nutanix, Inc.Inventors: Johnu George, Manik Taneja, Naveen Reddy Gundlagutta, Nikhil Mundra, Satyendra Singh Naruka, Sirvisetti Venkat Sri Sai Ram
-
Publication number: 20230230690Abstract: Techniques for managing encoded communications for medical devices in a clinical environment are provided. Different versions of signal coding libraries are generated for different devices in a communication path. A first signal coding library may be generated using a first signal definition that includes a set of fields. A second signal coding library may be generated using a second signal definition that includes a subset of the fields of the first signal definition, and excludes one or more of the fields of the first signal definition. A message encoded using the first signal coding library may not be completely decodable using the second signal coding library. By selectively deploying the signal coding libraries to different systems, devices, and components in a clinical environment, access to information in message fields can be effectively managed.Type: ApplicationFiled: March 21, 2023Publication date: July 20, 2023Inventors: Rahul K R, Mark C. Rohlwing, Anandaraja S., Bindu Malathi Prathapaneni, III, Satyendra Singh Jadaun, Rosaiah Allam, Hrishikesh Anil Dandekar
-
Publication number: 20230224293Abstract: Techniques for managing secure communication certificates for medical devices in a clinical environment are provided. A short-lived, limited-use token may be uniquely assigned to a medical device. The medical device can self-provision a secret key and corresponding public key based on a unique identifier in the token. The medical device generates a certificate signing request (“CSR”) that includes the public key, and sends the CSR and the token to a verification system that serves as an intermediary between medical devices and a certificate authority. The intermediary may only send the CSR to the certificate authority (“CA”) for a certificate if the intermediary is able to validate the token.Type: ApplicationFiled: March 21, 2023Publication date: July 13, 2023Inventors: Mark C. Rohlwing, S. Sree Vivek, Hrishikesh Anil Dandekar, Dharani Kumar Srinivasan, Rahul K R, Vasile Bora, Satyendra Singh Jadaun
-
Patent number: 11658130Abstract: A packaged electronic device includes a semiconductor die, a conductive plate coupled to a lead, a solder structure and a package structure. The semiconductor die has opposite first and second sides and a terminal exposed along the second side. The conductive plate has opposite first and second sides and an indent that extends into the first side, the conductive plate, and the solder structure extends between the second side of the semiconductor die and the first side of the conductive plate to electrically couple the conductive plate to the terminal, and the solder structure extends into the indent. The package structure encloses the semiconductor die, the conductive plate and a portion of the lead.Type: GrantFiled: December 31, 2020Date of Patent: May 23, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Tianyi Luo, Jonathan Almeria Noquil, Satyendra Singh Chauhan, Osvaldo Jorge Lopez, Lance Cole Wright
-
Patent number: 11646987Abstract: The problem of ensuring coverage for an inbound communication from a customer while also preventing concurrent responses from members of the agent group tasked with said coverage is solved by a system where a customer's thread is owned for routing purposes not by a single user but by a group of users, only one of whom is allowed to communicate with the customer until a timer expires or the thread is explicitly unlocked. Communication channels may include text messaging, voice telephony and email. In various embodiments, an adaptive rules engine is utilized to route incoming customer communications as well as outbound responses. A combination of communication/message locks and communication/messaging cache levels are used in some embodiments to provide communication/messaging coverage and to resolve competition between responding agents to address concurrency. Customer/agent communications which use multiple communication channels are threaded in an agent user interface.Type: GrantFiled: April 8, 2022Date of Patent: May 9, 2023Assignee: KAARYA LLCInventors: Animesh Pathak, Ujjual Nath, Akshay Tyagi, Satyendra Singh
-
Publication number: 20230018767Abstract: Example implementations relate to the processing of refresh token requests at an API gateway. The API gateway determines a first time associated with receipt of the refresh token request and a second time associated with the generation of a current access token. The current access token and a refresh token in the refresh token request are provided by the API gateway to the client device for accessing a backend service. The API gateway determines whether a difference between the first time and the second time is within a pre-defined threshold duration. When the difference between the first time and the second time is within the pre-defined threshold, the API gateway denies the refresh token request for generating the new access token and transmits the current access token back to the client device.Type: ApplicationFiled: July 15, 2021Publication date: January 19, 2023Inventors: Satyendra Singh, Ganesh Valluru Ramakrishnappa, Tathagata Roy, Ravinder Reddy Bommineni, Sharan Chaitanya Potturu
-
Patent number: 11557722Abstract: A Hall-effect sensor package includes and an IC die including a Hall-Effect element and a leadframe including leads on a first side providing a first field generating current (FGC) path including?1 first FGC input pin coupled by a reduced width first curved head over or under the Hall-effect sensor element to ?1 first FGC output pin, and second leads on a second side of the package. Some leads on the second side are attached to bond pads on the IC die including the output of the Hall-effect element. A clip is attached at one end to the first FGC input pin and at another end to a location on the first FGC output pin, having a reduced width second curved head in between that is over or under the Hall-effect sensor element opposite the first head.Type: GrantFiled: January 6, 2021Date of Patent: January 17, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ming Li, Yiqi Tang, Jie Chen, Enis Tuncer, Usman Mahmood Chaudhry, Tony Ray Larson, Rajen Manicon Murugan, John Paul Tellkamp, Satyendra Singh Chauhan
-
Patent number: 11495580Abstract: A Multi-Chip Module (MCM) package includes a substrate having a plurality of metal terminals and at least a first die attach area. An encapsulant is around the substrate including on at least a portion of the topside and at least a portion of the bottomside of the package. At least a first device including at least two device terminals is attached face up on the first die attach area. At least a second device including at least two device terminals is flip-chip attached and stacked on the first device. At least one of the first device and second device include a transistor. At least one metal clip is between the first device and second device including a plurality of clip portions isolated from one another connecting at least one device terminal of each of the first device and second device to respective metal terminals of the plurality of metal terminals.Type: GrantFiled: November 8, 2018Date of Patent: November 8, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Marie Denison, Richard Saye, Takahiko Kudoh, Satyendra Singh Chauhan
-
Publication number: 20220235014Abstract: The present invention provides to an improved process for the preparation of highly pure Erlotinib hydrochloride of formula (I) The substantially pure Erlotinib hydrochloride (I) obtained by improved process of the present invention is having purity of greater than 99.8% (% w/w by HPLC). Erlotinib hydrochloride is useful in the treatment of cancer more particularly in the treatment of lung cancer and pancreatic cancer.Type: ApplicationFiled: January 23, 2021Publication date: July 28, 2022Applicant: SHIVALIK RASAYAN LIMITEDInventors: AKSHAY KANT CHATURVEDI, SATYENDRA SINGH, BIJAN PANDA
-
Publication number: 20220208692Abstract: A packaged electronic device includes a semiconductor die, a conductive plate coupled to a lead, a solder structure and a package structure. The semiconductor die has opposite first and second sides and a terminal exposed along the second side. The conductive plate has opposite first and second sides and an indent that extends into the first side, the conductive plate, and the solder structure extends between the second side of the semiconductor die and the first side of the conductive plate to electrically couple the conductive plate to the terminal, and the solder structure extends into the indent. The package structure encloses the semiconductor die, the conductive plate and a portion of the lead.Type: ApplicationFiled: December 31, 2020Publication date: June 30, 2022Applicant: Texas Instruments IncorporatedInventors: Tianyi Luo, Jonathan Almeria Noquil, Satyendra Singh Chauhan, Osvaldo Jorge Lopez, Lance Cole Wright
-
Publication number: 20220210911Abstract: In a described example, an apparatus includes: a package substrate having a planar die mount surface; recesses extending into the planar die mount surface; and a semiconductor device die flip chip mounted to the package substrate on the planar die mount surface, the semiconductor device die having post connects having proximate ends on bond pads on an active surface of the semiconductor device die, and extending to distal ends away from the semiconductor device die having solder bumps, wherein the solder bumps form solder joints to the package substrate within the recesses.Type: ApplicationFiled: March 31, 2021Publication date: June 30, 2022Inventors: Tianyi Luo, Osvaldo Jorge Lopez, Jonathan Almeria Noquil, Satyendra Singh Chauhan, Bernardo Gallegos
-
Publication number: 20220153684Abstract: The present invention relates to a process for the preparation of the active pharmaceutical ingredient Fingolimod Hydrochloride (I) and its highly pure intermediate [2-acetamido-2-(acetyloxy methyl)-4-phenylbutyl] acetate(II)Type: ApplicationFiled: October 29, 2021Publication date: May 19, 2022Applicant: SHIVALIK RASAYAN LIMITEDInventors: AKSHAY KANT CHATURVEDI, SATYENDRA SINGH, SATBIR SINGH, GAJENDRA KUMAWAT
-
Publication number: 20220115308Abstract: A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.Type: ApplicationFiled: November 3, 2021Publication date: April 14, 2022Inventors: Jonathan Almeria Noquil, Satyendra Singh Chauhan, Lance Cole Wright, Osvaldo Jorge Lopez
-
Patent number: 11177197Abstract: A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.Type: GrantFiled: September 25, 2019Date of Patent: November 16, 2021Assignee: Texas Instruments IncorporatedInventors: Jonathan Almeria Noquil, Satyendra Singh Chauhan, Lance Cole Wright, Osvaldo Jorge Lopez
-
Publication number: 20210159403Abstract: A Hall-effect sensor package includes and an IC die including a Hall-Effect element and a leadframe including leads on a first side providing a first field generating current (FGC) path including ?1 first FGC input pin coupled by a reduced width first curved head over or under the Hall-effect sensor element to ?1 first FGC output pin, and second leads on a second side of the package. Some leads on the second side are attached to bond pads on the IC die including the output of the Hall-effect element. A clip is attached at one end to the first FGC input pin and at another end to a location on the first FGC output pin, having a reduced width second curved head in between that is over or under the Hall-effect sensor element opposite the first head.Type: ApplicationFiled: January 6, 2021Publication date: May 27, 2021Inventors: Ming Li, Yiqi Tang, Jie Chen, Enis Tuncer, Usman Mahmood Chaudhry, Tony Ray Larson, Rajen Manicon Murugan, John Paul Tellkamp, Satyendra Singh Chauhan
-
Publication number: 20210090980Abstract: A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.Type: ApplicationFiled: September 25, 2019Publication date: March 25, 2021Inventors: Jonathan Almeria Noquil, Satyendra Singh Chauhan, Lance Cole Wright, Osvaldo Jorge Lopez
-
Patent number: 10892405Abstract: A Hall-effect sensor package includes and an IC die including a Hall-Effect element and a leadframe including leads on a first side providing a first field generating current (FGC) path including ?1 first FGC input pin coupled by a reduced width first curved head over or under the Hall-effect sensor element to ?1 first FGC output pin, and second leads on a second side of the package. Some leads on the second side are attached to bond pads on the IC die including the output of the Hall-effect element. A clip is attached at one end to the first FGC input pin and at another end to a location on the first FGC output pin, having a reduced width second curved head in between that is over or under the Hall-effect sensor element opposite the first head.Type: GrantFiled: May 7, 2019Date of Patent: January 12, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ming Li, Yiqi Tang, Jie Chen, Enis Tuncer, Usman Mahmood Chaudhry, Tony Ray Larson, Rajen Manicon Murugan, John Paul Tellkamp, Satyendra Singh Chauhan