Abstract: Techniques for request throttling in a provider network environment are described. A throttle handler controls whether requests will be processed through maintaining a token-based record, per type of request, having a token value indicative of a number of requests that can be processed over a time period. For a request, the token value of the token-based record corresponding to the request type is updated based on calculating an elapsed time between a last update time of the token-based record and the current time, calculating an intermediate token value as the existing token value plus a value of the elapsed time multiplied by a rate, and updating the token value to be the minimum between the intermediate token value and a burst value. The request is serviced when the updated token value is determined to be greater than or equal to a number of tokens needed to perform the request.

Abstract: Technologies are disclosed for enforcing access control to resources of an indexing system using resource paths. Before performing a search for resources, access control is performed. By determining the resource paths that the user is authorized and/or unauthorized to access before performing the search, the search engine returns resources that the user is authorized to access instead of returning resources that the user may not be authorized to access. Before submitting a search query to a search engine an augmented search query is generated. The augmented search query includes one or more filter rules (which may be referred to herein as “filters”) that specify the resource paths to include or exclude from the search. The augmented search query limits the search to resources that the user is authorized to access.

Abstract: Techniques for searching documents are described. An exemplary method includes receiving a document search query; querying at least one index based upon the document search query to identify matching data; fetching the identified matched data; determining one or more of a top ranked passage and top ranked documents from the set of documents based upon one or more invocations of one or more machine learning models based at least on the fetched identified matched data and the document search query; and returning one or more of the top ranked passage and the proper subset of documents.

Abstract: Systems and methods for batching operations in a virtualization environment. A method embodiment operates over a plurality of virtual machines in the virtualization environment. A user interface is used to select two or more virtual machines that are to be subjected to the same batch actions. A method step then generates at least one batch request to be performed over the two or more selected virtual machines. In forming the batch request, the states of the individual virtual machines are analyzed to determine one or more entity-specific operations that apply to the virtual machines and/or to constituent entities of the virtual machines. Once the state-specific and entity-specific operations have been determined, an entity management protocol initiates execution of the one or more entity-specific operations over the individual ones of the two or more selected virtual machines.

Abstract: A service provider system may provision virtualized computing resources to implement a virtual desktop instance. An interactivity agent installed on the virtual desktop instance may collect data representing interactions between a user and various input devices (e.g. a keyboard or mouse) that are associated with the execution of various desktop applications, and may provide the interactivity data to a desktop application preferences service implemented in the service provider system. The desktop application preferences service may, based on the interactivity data, characterize the usage of the desktop applications and their targets (e.g., documents) to determine which applications and targets are likely to be used during subsequent virtual desktop sessions (e.g., those used most or most recently).

Abstract: Contextual spelling methods and systems are provided that utilize natural language processing and n-gram frequencies to group documents into logical groups and to provide spelling correction suggestions. For example, a contextual spelling correction system may receive a set of documents, group the documents into separate logical groups, generate dictionaries associated with the logical groups, receive a user input, determine scores for potential spelling correction suggestions regarding the user input, and provide spelling correction suggestions based at least partly on the dictionaries associated with the logical groups.

Abstract: Techniques for searching documents are described. An exemplary method includes receiving a document search query; querying at least one index based upon the document search query to identify matching data; fetching the identified matched data; determining one or more of a top ranked passage and top ranked documents from the set of documents based upon one or more invocations of one or more machine learning models based at least on the fetched identified matched data and the document search query; and returning one or more of the top ranked passage and the proper subset of documents.

Abstract: A device obtains data, for a current media plan, that includes a cost adjustment factor, a duration of an unexecuted portion of the current media plan that is divisible into periods of time, and an unutilized budget, for the duration, that is divisible into budget portions based on the periods of time. The device generates a predictive baseline cost parameter by adjusting, by the cost adjustment factor, a baseline cost parameter of a previously implemented baseline media plan. The device predicts cost metrics for the current media plan using the predictive baseline cost parameter, and predicts performance metrics for the current media plan based on the cost metrics and predictive baseline cost parameter. The device determines target cost per point (CPP) values for the current media plan based on the cost metrics and performance metrics, and causes an action to be performed based on the target CPP values.

Abstract: Systems and methods for batching operations in a virtualization environment. A method embodiment operates over a plurality of virtual machines in the virtualization environment. A user interface is used to select two or more virtual machines that are to be subjected to the same batch actions. A method step then generates at least one batch request to be performed over the two or more selected virtual machines. In forming the batch request, the states of the individual virtual machines are analyzed to determine one or more entity-specific operations that apply to the virtual machines and/or to constituent entities of the virtual machines. Once the state-specific and entity-specific operations have been determined, an entity management protocol initiates execution of the one or more entity-specific operations over the individual ones of the two or more selected virtual machines.

Abstract: A device obtains data, for a current media plan, that includes a cost adjustment factor, a duration of an unexecuted portion of the current media plan that is divisible into periods of time, and an unutilized budget, for the duration, that is divisible into budget portions based on the periods of time. The device generates a predictive baseline cost parameter by adjusting, by the cost adjustment factor, a baseline cost parameter of a previously implemented baseline media plan. The device predicts cost metrics for the current media plan using the predictive baseline cost parameter, and predicts performance metrics for the current media plan based on the cost metrics and predictive baseline cost parameter. The device determines target cost per point (CPP) values for the current media plan based on the cost metrics and performance metrics, and causes an action to be performed based on the target CPP values.

Abstract: An oscillator circuit includes a voltage controlled oscillator (VCO) configured to generate a clock signal having a clock period that is adjustable based on a control signal. The oscillator circuit includes a time to voltage converter configured to receive the clock signal and generate a compensation voltage potential that is proportional to the clock period and a zero temperature coefficient (ZTC) current. The oscillator circuit includes an amplifier configured to generate the control signal responsive to the compensation voltage potential and a temperature independent reference voltage potential. A method includes applying a control signal to a VCO, generating a clock signal having a clock period responsive to the control signal, generating a compensation voltage potential, and adjusting the clock period using the compensation voltage potential. A memory device includes the oscillator circuit.

Abstract: A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a rising edge and a falling edge mode. A second multiplexer causes the second group of logic cells to be included or excluded from the oscillation path. By measuring the oscillation period in the various modes, the rising edge and falling edge delays can be individually calculated.

Abstract: An oscillator circuit includes a voltage controlled oscillator (VCO) configured to generate a clock signal having a clock period that is adjustable based on a control signal. The oscillator circuit includes a time to voltage converter configured to receive the clock signal and generate a compensation voltage potential that is proportional to the clock period and a zero temperature coefficient (ZTC) current. The oscillator circuit includes an amplifier configured to generate the control signal responsive to the compensation voltage potential and a temperature independent reference voltage potential. A method includes applying a control signal to a VCO, generating a clock signal having a clock period responsive to the control signal, generating a compensation voltage potential, and adjusting the clock period using the compensation voltage potential. A memory device includes the oscillator circuit.

Abstract: The peak voltage at which a voltage-setting transistor is driven is reduced while the body effect of the transistor is also compensated. The voltage-setting transistor is driven at an initial level and then coupled higher by a capacitor which is connected to the control gate of the voltage-setting transistor. The amount of coupling can vary as a function of an assigned data state of a memory cell connected to the transistor by a source line and/or bit line. The capacitor may have a body which is common to a set of memory cells. The voltage can be set prior to applying a program voltage to the control gate of a memory cell to control a programming speed of the memory cell based on its assigned data state. The voltage can also be set in connection with a sensing operation.

Abstract: A temperature sensor is disclosed. In one aspect, the temperature sensor provides a digital output having a precise degree/code step. For example, each step in the digital output code may correspond to one degree Celsius. In one aspect, a temperature sensor comprises a precision band-gap circuit and a sigma delta modulator (SDM) analog-to-digital convertor (ADC). A bandgap voltage and a PTAT voltage may be provided from the band-gap circuit as an input to the SDM ADC. The SDM ADC may produce an output based on the difference between the PTAT voltage and the bandgap voltage. The temperature sensor may also have logic that outputs a temperature code based on the output of the SDM ADC.

Abstract: A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a rising edge and a falling edge mode. A second multiplexer causes the second group of logic cells to be included or excluded from the oscillation path. By measuring the oscillation period in the various modes, the rising edge and falling edge delays can be individually calculated.

Abstract: A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a rising edge and a falling edge mode. A second multiplexer causes the second group of logic cells to be included or excluded from the oscillation path. By measuring the oscillation period in the various modes, the rising edge and falling edge delays can be individually calculated.

Abstract: A voltage regulator circuit is provided in which voltage overshoots are quickly dissipated using a discharge path which is connected to an output of the voltage regulator. Circuitry for controlling the discharge path is provided using internal currents of an error amplifier to provide a space-efficient and power-efficient design with a fast response. Moreover, hysteresis can be provided to avoid toggling between discharge and no discharge, and to avoid undershoot when discharging the output. A digital or analog signal is set which turns the discharge transistor on or off. A current pulldown may be arranged in the discharge path.

Abstract: A temperature sensor is disclosed. In one aspect, the temperature sensor provides a digital output having a precise degree/code step. For example, each step in the digital output code may correspond to one degree Celsius. In one aspect, a temperature sensor comprises a precision band-gap circuit and a sigma delta modulator (SDM) analog-to-digital convertor (ADC). A bandgap voltage and a PTAT voltage may be provided from the band-gap circuit as an input to the SDM ADC. The SDM ADC may produce an output based on the difference between the PTAT voltage and the bandgap voltage. The temperature sensor may also have logic that outputs a temperature code based on the output of the SDM ADC.

Abstract: A voltage regulator circuit is provided in which voltage overshoots are quickly dissipated using a discharge path which is connected to an output of the voltage regulator. Circuitry for controlling the discharge path is provided using internal currents of an error amplifier to provide a space-efficient and power-efficient design with a fast response. Moreover, hysteresis can be provided to avoid toggling between discharge and no discharge, and to avoid undershoot when discharging the output. A digital or analog signal is set which turns the discharge transistor on or off. A current pulldown may be arranged in the discharge path.