Patents by Inventor Scot H. Rider

Scot H. Rider has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140281290
    Abstract: Embodiments relate to collecting extended error data from units within a programmable device. A pointer is accessed that points to a region of memory that contains a list of entries that references the extended error data. The list of entries is walked by adjusting a read pointer to obtain the extended error data. The referenced extended error data is moved to an event log.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael C. Cadigan, JR., Howard M. Haynie, Scot H. Rider, Mushfiq U. Saleheen
  • Publication number: 20140149751
    Abstract: A system with scalable data collection for system management comprises a plurality of local data collectors and a system collector. Each of the local data collectors is coupled with a corresponding subsystem of the system. Each of the local data collectors is configured to periodically collect power management related data from the corresponding subsystem, and to format the collected power management related data for conveyance along any one of a plurality of channels between the local data collector and the system collector. The system collector is coupled with the plurality of local data collectors via the plurality of channels. The system collector selects from the channels between the system collector and each of the local data collectors based, at least in part, on channel states, and retrieves the power management related data collected by each of the local data collectors along a selected channel for the local data collector.
    Type: Application
    Filed: November 27, 2012
    Publication date: May 29, 2014
    Applicant: International Business Machines Corporation
    Inventors: Irving Baysah, John S. Dodson, Karthick Rajamani, Eric E. Retter, Gregory S. Still, Malcolm S. Allen-Ware, Scot H. Rider, Todd J. Rosedahl, Gary Van Huben
  • Patent number: 8289058
    Abstract: Controlling a PLL includes providing a voltage controlled oscillator (VCO) and coupling an output of the VCO to a shifter circuit. The shifter circuit has a shifter circuit output, the shifter circuit also including an activation input for receiving an activation signal, the shifter circuit causing at least one pulse of the output signal to be suppressed at the shifter output upon receipt of the activation signal. Controlling also includes coupling the shifter circuit output to a first frequency divider.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: James Eckhardt, Shiu Chung Ho, Paul D. Muench, Scot H. Rider
  • Publication number: 20120161838
    Abstract: Controlling a PLL includes providing a voltage controlled oscillator (VCO) and coupling an output of the VCO to a shifter circuit. The shifter circuit has a shifter circuit output, the shifter circuit also including an activation input for receiving an activation signal, the shifter circuit causing at least one pulse of the output signal to be suppressed at the shifter output upon receipt of the activation signal. Controlling also includes coupling the shifter circuit output to a first frequency divider.
    Type: Application
    Filed: March 7, 2012
    Publication date: June 28, 2012
    Applicant: International Business Machines Corporation
    Inventors: James Eckhardt, Shiu Chung Ho, Paul D. Muench, Scot H. Rider
  • Patent number: 8149035
    Abstract: Controlling a PLL includes providing a voltage controlled oscillator (VCO) and coupling an output of the VCO to a shifter circuit. The shifter circuit has a shifter circuit output, the shifter circuit also including an activation input for receiving an activation signal, the shifter circuit causing at least one pulse of the output signal to be suppressed at the shifter output upon receipt of the activation signal. Controlling also includes coupling the shifter circuit output to a first frequency divider.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: April 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: James Eckhardt, Shiu Chung Ho, Paul D. Muench, Scot H. Rider
  • Patent number: 8078657
    Abstract: Disclosed is a circuit for simultaneously searching two ends of a vector. The circuit comprises at least one input for receiving a vector of head pointers. A first input of a memory latch receives the vector of head pointers. An input of a first priority decoder receives the vector of head pointers from the memory latch. The first priority decoder traverses the vector of head pointers from a first end of the vector for identifying one active bit in the vector. An input of a first reverse module also receives the vector of head pointers from the memory latch. An input of second priority decoder receives the vector of head pointers (in reverse order) from the first reverse module. The second priority decoder traverses the vector received from the first reverse module from a first end of the reversed vector for identifying one active bit in the vector.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: December 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Todd A. Strader, Scot H. Rider
  • Publication number: 20110187423
    Abstract: Controlling a PLL includes providing a voltage controlled oscillator (VCO) and coupling an output of the VCO to a shifter circuit. The shifter circuit has a shifter circuit output, the shifter circuit also including an activation input for receiving an activation signal, the shifter circuit causing at least one pulse of the output signal to be suppressed at the shifter output upon receipt of the activation signal. Controlling also includes coupling the shifter circuit output to a first frequency divider.
    Type: Application
    Filed: February 2, 2010
    Publication date: August 4, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James Eckhardt, Shiu Chung Ho, Paul D. Muench, Scot H. Rider
  • Patent number: 7830901
    Abstract: Disclosed is a method and apparatus for managing network data packet transmission. A retry buffer is maintained that includes a single first in, first out retransmission retry buffer. A first data packet is inserted into the retry buffer in response to transmitting the first data packet to a remote node. A determination that a second data packet is not able to be transmitted to the remote node causes the second data packet to be inserted into the retry buffer. A third data packet is retrieved from the retry buffer and a determination that it is not to be transmitted to the remote node causes the third data packet to be reinserted into the retry buffer.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: November 9, 2010
    Assignee: International Business Machines Corporation
    Inventors: Scot H. Rider, Todd A. Strader
  • Patent number: 7796625
    Abstract: A system and method for purging data packets in a network is provided. The method in one aspect includes monitoring an outbound queue for one or more selected packets to be pulled from the outbound queue. The method may further include waiting for a predetermined amount of time for the selected packets to enter a retry queue and monitoring the retry queue for the selected packets to be pulled from the retry queue. The method may also include determining if the selected packets pulled from the retry queue meet one or more specified criteria and purging the selected packets if the specified criteria is met. The method may further include returning to the step of monitoring an outbound queue if another purge signal is received.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Todd Alan Strader, Scot H. Rider
  • Patent number: 7792098
    Abstract: A method is provided for packet flow control for a switching node of a data transfer network. The method includes actively managing space allocations in a central queue of a switching node allotted to the ports of the switching node based on the amount of unused space currently available in the central queue. In a further aspect, the method includes separately tracking unallocated space and vacated allocated space, which had been used to buffer packets received by the ports but were vacated since a previous management update due to a packet being removed from the central queue. Each port is offered vacated space that is currently allocated to that port and a quantity of the currently unallocated space in the central queue to distribute to one or more virtual lanes of the port.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Derrick L. Garmire, Jay R. Herring, Ronald A. Linton, Scot H. Rider
  • Patent number: 7774496
    Abstract: Method, system and program product are provided for reducing size of memory required for a switching node's forwarding table by employing forwarding tables of different types to map received data packets addressed to downstream nodes and upstream nodes to appropriate output ports of the switching node. The method includes receiving a data packet at a data transfer node of a network and selecting a forwarding table from multiple types of forwarding tables accessible by the node based on an attribute associated with the received data packet, and mapping the data packet to an output port of the node utilizing the forwarding table selected from the multiple types of forwarding tables based on the attribute associated with the packet.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: August 10, 2010
    Assignee: International Business Machines Corporation
    Inventors: Jay R. Herring, Scot H. Rider
  • Patent number: 7760630
    Abstract: The filtering operations normally performed at the output port side of an Infiniband (or similar protocol) routing switch are performed in parallel at the input side to prevent data packets from being placed on a queue from which they would ordinarily ultimately be discarded, thus removing “bad” packets that would normally have a negative impact on the bandwidth of the switch. Bad data packets thus do not consume space in a central queue nor bandwidth in a crossbar switch.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: July 20, 2010
    Assignee: International Business Machines Corporaiton
    Inventor: Scot H. Rider
  • Patent number: 7743231
    Abstract: Provided are a method, information processing system, and computer readable medium for identifying active bits in a vector. The method comprises receiving a pointer associated with a vector of bits. The pointer is associated with a current bit within the vector of bits. The vector of bits if grouped into groups of a mathematical power of two, which is any non-negative integer powers of two. One or more current groups are determined which are the groups of the mathematical power of two comprising the current bit. The one or more current groups of the power of two are analyzed. A largest group of the power of two is identified in the one or more current groups comprising all empty bits. The pointer is set to point to a bit following a last bit in the identified largest group of the power of two comprising all empty bits.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: June 22, 2010
    Assignee: International Business Machines Corporation
    Inventors: Scot H. Rider, Todd A. Strader
  • Patent number: 7693070
    Abstract: A method, apparatus and computer readable medium for transmitting at least one packet across a network destined for reception by at least one network endpoint. A plurality of packets is processed sequentially from a queue to be sent to at least one network endpoint. At least a first packet from the plurality of packets is transmitted to the network endpoint. The at least first packet transmitted to the network endpoint is determined to not have been acknowledged. A first retry packet associated with the at least first packet is transmitted to the at least one network endpoint. Transmission of packets other than the first retry packet is suspended to the network endpoint. The first retry packet is determined to have been acknowledged by the at least one network endpoint. Transmission of remaining packets in the plurality of packets to the at least one network endpoint is resumed.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: April 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Scot H. Rider, Todd A. Strader, Tracy C. Phillips
  • Publication number: 20090213735
    Abstract: A system to improve data packet routing in a data processing device may include a plurality of functional modules, and communication buses connecting the functional modules. The system may also include a flow control mechanism in which command packets that traverse the communication buses are each assigned their own channel with their own pool of credits. The system may further include a switch to route data packets on the communication buses from one of the functional modules to any other of the functional modules based upon the credits. In addition, any of the functional modules without credits to send the data packets on a particular channel may send a message to have the switch perform a route test.
    Type: Application
    Filed: February 25, 2008
    Publication date: August 27, 2009
    Inventors: Mark A. Check, Michael Grassi, Scot H. Rider, Gabriel M. Tarr
  • Patent number: 7545747
    Abstract: Method, system and program product are provided for packet flow control for a switching node of a data transfer network. The method includes actively managing space allocations in a central queue of a switching node allotted to the ports of the switching node based on the amount of unused space currently available in the central queue and an amount of currently-vacant storage space in a storage device of a port. In a further aspect, the method includes separately tracking unallocated space and vacated allocated space, which had been used to buffer packets received by the ports but were vacated since a previous management update due to a packet being removed from the central queue. Each port is offered vacated space that is currently allocated to that port and a quantity of the currently unallocated space in the central queue to distribute to one or more virtual lanes of the port.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: June 9, 2009
    Assignee: International Business Machines Corporation
    Inventor: Scot H. Rider
  • Patent number: 7539772
    Abstract: A method is provided for reducing size of memory required for a switching node's forwarding table by employing forwarding tables of different types to map received data packets addressed to downstream nodes and upstream nodes to appropriate output ports of the switching node. The method includes receiving a data packet at a data transfer node of a network and selecting a forwarding table from multiple types of forwarding tables accessible by the node based on an attribute associated with the received data packet, and mapping the data packet to an output port of the node utilizing the forwarding table selected from the multiple types of forwarding tables based on the attribute associated with the packet.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: May 26, 2009
    Assignee: lnternational Business Machines Corporation
    Inventors: Jay R. Herring, Scot H. Rider
  • Publication number: 20080225873
    Abstract: Disclosed is a method and apparatus for managing network data packet transmission. A retry buffer is maintained that includes a single first in, first out retransmission retry buffer. A first data packet is inserted into the retry buffer in response to transmitting the first data packet to a remote node. A determination that a second data packet is not able to be transmitted to the remote node causes the second data packet to be inserted into the retry buffer. A third data packet is retrieved from the retry buffer and a determination that it is not to be transmitted to the remote node causes the third data packet to be reinserted into the retry buffer.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scot H. Rider, Todd A. Strader
  • Publication number: 20080225703
    Abstract: A method, apparatus and computer readable medium for transmitting at least one packet across a network destined for reception by at least one network endpoint. A plurality of packets is processed sequentially from a queue to be sent to at least one network endpoint. At least a first packet from the plurality of packets is transmitted to the network endpoint. The at least first packet transmitted to the network endpoint is determined to not have been acknowledged. A first retry packet associated with the at least first packet is transmitted to the at least one network endpoint. Transmission of packets other than the first retry packet is suspended to the network endpoint. The first retry packet is determined to have been acknowledged by the at least one network endpoint. Transmission of remaining packets in the plurality of packets to the at least one network endpoint is resumed.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scot H. Rider, Todd A. Strader, Tracy C. Phillips
  • Publication number: 20080209183
    Abstract: Provided are a method, information processing system, and computer readable medium for identifying active bits in a vector. The method comprises receiving a pointer associated with a vector of bits. The pointer is associated with a current bit within the vector of bits. The vector of bits if grouped into groups of a mathematical power of two, which is any non-negative integer powers of two. One or more current groups are determined which are the groups of the mathematical power of two comprising the current bit. The one or more current groups of the power of two are analyzed. A largest group of the power of two is identified in the one or more current groups comprising all empty bits. The pointer is set to point to a bit following a last bit in the identified largest group of the power of two comprising all empty bits.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 28, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scot H. Rider, Todd A. Strader