Patents by Inventor Scott A. Linn

Scott A. Linn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210354462
    Abstract: A die for a printhead is described herein. The die includes a number of fluid feed holes disposed in a line parallel to a longitudinal axis of the die, wherein the fluid feed holes are formed through a substrate of the die. The die includes a number of fluidic actuators, proximate to the fluid feed holes, to eject fluid received from the fluid feed holes. Circuitry on the die operates the fluidic actuators, wherein traces are provided in layers between adjacent fluid feed holes, connecting circuitry on each side of the fluid feed holes.
    Type: Application
    Filed: February 6, 2019
    Publication date: November 18, 2021
    Inventors: Michael W. Cumbie, Scott A. Linn, Anthony M. Fuller, James Michael Gardner
  • Publication number: 20210354456
    Abstract: An integrated circuit to drive a number of fluid actuation devices, comprising a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state. The integrated circuit to include a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information comprising a data state bit. The integrated circuit to include a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.
    Type: Application
    Filed: February 6, 2019
    Publication date: November 18, 2021
    Inventors: Scott A. Linn, James Michael Gardner, Michael W. Cumbie
  • Publication number: 20210354450
    Abstract: A communicating print component a print head comprising a number of memory bits and a single lane analog bus conductively coupling the number of memory bits to a pad located on the exterior of the print head. The pad is to transmit an electrical signal from the number of memory bits, wherein the electrical signal indicates a combination of all selected bits of the number of memory bits.
    Type: Application
    Filed: February 6, 2019
    Publication date: November 18, 2021
    Inventors: James Michael Gardner, Scott A. Linn, John Rossi, Erik D. Ness
  • Publication number: 20210354472
    Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
    Type: Application
    Filed: May 5, 2019
    Publication date: November 18, 2021
    Inventors: James Michael GARDNER, Scott A. LINN, Stephen D. PANSHIN, Jefferson P. WARD, David Owen ROETHIG, David N. OLSEN, Anthony D. STUDER, Michael W. CUMBIE, Sirena Chi LU
  • Publication number: 20210354453
    Abstract: A die for a printhead is provided in examples. The die includes a number of fluidic actuator arrays, proximate to a number of fluid feed holes. A number of address lines are disposed proximate to a number of logic circuits on a low-voltage side of the fluid feed holes. An address decoder circuit is coupled to at least a portion of the address lines to select a fluidic actuator in a fluidic actuator array for firing. The address decoder circuit is customized to select a different address for each fluidic actuator in the fluidic actuator array. A logic circuit triggers a driver circuit located in a high-voltage side of the plurality of fluid feed holes opposite the low-voltage side, based, at least in part, on a bit value for the fluidic actuator array, the fluidic actuator selected by the address decoder circuit, and a firing signal.
    Type: Application
    Filed: February 6, 2019
    Publication date: November 18, 2021
    Inventors: Eric Martin, Scott A. Linn, James Michael Gardner
  • Publication number: 20210334392
    Abstract: In an example, a logic circuitry package is configured to communicate with a print apparatus logic circuit. The logic circuitry package may be configured to respond to communications sent to a first address and to at least one second address. The logic circuitry package may comprise a first logic circuit, wherein the first address is an address for the first logic circuit. The package may be configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the package is accessible via at least one second address for a duration of the time period.
    Type: Application
    Filed: December 3, 2018
    Publication date: October 28, 2021
    Inventors: Stephen D. PANSHIN, Jefferson P. WARD, Scott A. LINN, James Michael GARDNER
  • Publication number: 20210334391
    Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.
    Type: Application
    Filed: December 3, 2018
    Publication date: October 28, 2021
    Inventors: James Michael GARDNER, Scott A. LINN, Stephen D. PANSHIN, Jefferson P. WARD, David Owen ROETHIG
  • Publication number: 20210331465
    Abstract: A fluidic die includes a number of actuators to eject fluid from the fluidic die. The number of actuators form a number of primitives. The fluidic die includes a plurality of delays within a column of the primitives, and a processing device to control the delays through which a number of activation pulses pass. The activation pulses activate each of the actuators associated with the primitives. The activation pulses are delayed between the primitives via at least one of the delays to reduce peak power demands of the fluidic die.
    Type: Application
    Filed: July 12, 2017
    Publication date: October 28, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Scott A Linn, Eric Martin, Vincent C Korthuis, James Michael Gardner
  • Publication number: 20210326297
    Abstract: Replaceable print material supply cartridges for printers are disclosed herein. An example replaceable print material supply cartridge includes logic circuitry that is to determine a position of the replaceable print material supply cartridge by initiating a first voltage on a data contact during a time period, monitoring a timer without reference to a clock signal at a clock contact from a serial data bus, and maintaining a first voltage on the data contact for a duration of time. After expiration of the duration, the logic circuitry is to cause the data contact to assume a second voltage, different than the first voltage, and the logic circuitry is to read data from the memory and cause transmission of a data signal via the serial data bus interface.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Inventors: Stephen D. PANSHIN, Scott A. LINN
  • Publication number: 20210326296
    Abstract: An example replaceable print material supply cartridge that is removably couplable to a host printer is disclosed. The example replaceable print material supply cartridge includes an ink reservoir and a logic circuitry package. The logic circuitry package includes logic circuitry and a serial data bus interface, wherein the serial data bus interface is to interface with a serial data bus of the host printer. In response to a first command sent to the logic circuitry package via the serial data bus connected to the serial data bus interface, the first command including a time period, the logic circuitry is to cause generation of a low voltage condition on the serial data bus for a duration based on the time period, and, after the duration, cause a return to a default voltage condition on the serial data bus.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Inventors: Stephen D. PANSHIN, Scott A. LINN
  • Patent number: 11141973
    Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of memory cells, a select circuit, configuration logic, and control logic. Each memory cell corresponds to a fluid actuation device. The select circuit selects fluid actuation devices and memory cells corresponding to the selected fluid actuation devices. The configuration logic enables or disables access to the plurality of memory cells. The control logic either activates the selected fluid actuation devices or accesses the memory cells corresponding to the selected fluid actuation devices based on a state of the configuration logic.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: October 12, 2021
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Scott A. Linn, James Michael Gardner, Michael W. Cumbie
  • Publication number: 20210300024
    Abstract: Examples include a fluid ejection die. Examples comprise a set of nozzles, where each respective nozzle includes a respective fluid ejector. Examples further include respective identification logic for each nozzle, where the respective identification logic is connected to the respective nozzle and fluid ejector thereof. Furthermore, the identification logic for each nozzle of the set has a component characteristic that is different from other identification logic for nozzles of the set. Accordingly, each identification logic is to output a different actuation signal responsive to actuation of the fluid ejector.
    Type: Application
    Filed: January 31, 2017
    Publication date: September 30, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventor: Scott A Linn
  • Publication number: 20210260871
    Abstract: A method for use with a series of analog delay circuits to drive a plurality of actuators with a fire signal is disclosed. A bias signal to affect a selected delay in the analog delay circuits is disabled. The fire signal is provided through the series of analog delay circuits with the bias signal disabled.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 26, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: John ROSSI, Scott A. LINN, James M. GARDNER
  • Publication number: 20210252871
    Abstract: This disclosure discusses a fluid property sensor, comprising an electrical circuit assembly (ECA) including an external interface coupled to a common interface bus; a fluid level sensor coupled to the common interface bus to indicate a fluid level and/or a pressure sensor coupled to the common interface bus to indicate a pressure event; and/or a driver circuit coupled to the common interface bus, configured to communicate characteristics of the fluid level sensor and the pressure sensor.
    Type: Application
    Filed: April 5, 2019
    Publication date: August 19, 2021
    Inventors: Anthony D. STUDER, David N. OLSEN, Michael W. CUMBIE, Chien-Hua CHEN, James Michael GARDNER, Scott A. LINN
  • Publication number: 20210237434
    Abstract: A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. The memory circuit includes a controllable selector connected in line with one of the signal paths via the I/O pads, the selector controllable to disconnect the corresponding signal path to the print component, and a memory component to store memory values associated with the print component. A control circuit, in response to a sequence of operating signals received by the I/O pads representing a memory read, to operate the controllable selector to disconnect the signal path to the print component to block the memory read of the print component, and provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.
    Type: Application
    Filed: July 31, 2019
    Publication date: August 5, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Boon Bing NG, James Michael GARDNER, Scott A. LINN
  • Publication number: 20210240400
    Abstract: A replaceable print apparatus component includes a print material reservoir, a print material within the reservoir and a sensing system including an integrated circuit configured to connect to and communicate over a digital bus. The sensing system includes at least one sensor, a digital controller, an analog to digital converter electrically coupled to the digital controller, and a memory array electrically coupled to the digital controller. The digital controller is configured to generate a clock signal for timing operations of the integrated circuit. The operations include initiating the at least one sensor based on values stored in the memory array and generating outputs of the at least one sensor via the analog to digital converter.
    Type: Application
    Filed: December 3, 2019
    Publication date: August 5, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Michael W. CUMBIE, Scott A. LINN, James Michael GARDNER
  • Publication number: 20210229430
    Abstract: A fluid ejection controller interface includes input logic to receive control data packets and a first clock signal, each control data packet including a set of primitive data bits and a set of random bits, wherein the input logic identifies the random bits in the received control data packets to facilitate the creation of modified control data packets. The fluid ejection controller interface includes a clock signal generator to generate a second clock signal that is different than the first clock signal, and output logic to receive the modified control data packets, and output the modified control data packets to a fluid ejection controller of a fluid ejection device based on the second clock signal.
    Type: Application
    Filed: February 6, 2019
    Publication date: July 29, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: John ROSSI, Scott A. LINN, James Michael GARDNER, Erik D. NESS
  • Publication number: 20210229425
    Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a configuration register, a plurality of interfaces, and control logic. The plurality of interfaces include a mode interface and a data interface. The control logic enables writing to the configuration register in response to a signal on the mode interface transitioning to logic high with a logic high signal on the data interface.
    Type: Application
    Filed: February 6, 2019
    Publication date: July 29, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Scott A. LINN, James Michael GARDNER, Michael W. CUMBIE
  • Publication number: 20210229432
    Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes an interface, a digital circuit, an analog circuit, and control logic. The digital circuit outputs a digital signal to the interface. The analog circuit outputs an analog signal to the interface. The control logic activates the digital circuit or the analog circuit.
    Type: Application
    Filed: February 6, 2019
    Publication date: July 29, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Scott A. LINN, James Michael GARDNER
  • Publication number: 20210229426
    Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of first memory cells, a plurality of first storage elements, and control logic. Each first memory cell stores a customization bit. Each first storage element is coupled to a corresponding first memory cell. The control logic, in response to a reset signal, reads the customization bit stored in each first memory cell and latches each customization bit in a corresponding first storage element.
    Type: Application
    Filed: February 6, 2019
    Publication date: July 29, 2021
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Scott A. LINN, James Michael GARDNER, Michael W. CUMBIE