Abstract: The present disclosure relates to compounds of Formula (Ia) and (Ib): or a pharmaceutically acceptable salt thereof, which are useful in the treatment of an HIV infection in heavily treatment-experienced patients with multidrug resistant HIV infection.

Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.

Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.

Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.

Abstract: Embodiments of the present disclosure describe methods, apparatuses, and systems for hybrid low dropout regulator (LDO) architecture and realization to provide high power supply rejection ratio (PSRR) and high conversion efficiency (CE), and other benefits. The hybrid LDO may be coupled with dual rails for its analog LDO branch and digital LDO respectively to achieve high PSRR and high CE by utilizing the hybrid architecture with several feedback loops. Other embodiments may be described and claimed.

Abstract: A memory module can include a data buffer having a data bus interface and a dynamic random access memory (DRAM) coupled to the data buffer. The memory module may also include a switch connected in parallel with the data buffer, wherein the switch can selectively bypass the data buffer. In one example, the memory module also includes a registered buffer having an address bus interface, where the switch may selectively bypass the data buffer based on a program signal obtained from an address bus via the address bus interface.

Abstract: A memory module can include a data buffer having a data bus interface and a dynamic random access memory (DRAM) coupled to the data buffer. The memory module may also include a switch connected in parallel with the data buffer, wherein the switch can selectively bypass the data buffer. In one example, the memory module also includes a registered buffer having an address bus interface, where the switch may selectively bypass the data buffer based on a program signal obtained from an address bus via the address bus interface.

Abstract: Embodiments include systems and methods for integration of RF components onto a single die with functional processing circuitry. For example, one integrated circuit may comprise multiple processors that can communicate there between by way of Radio Frequency (RF) transmission. The processors may also communicate with slave devices by way of radio frequency. Transmission and reception may be at frequencies in a band hitherto unused in computing devices and their peripherals.

Abstract: A memory module can include a data buffer having a data bus interface and a dynamic random access memory (DRAM) coupled to the data buffer. The memory module may also include a switch connected in parallel with the data buffer, wherein the switch can selectively bypass the data buffer. In one example, the memory module also includes a registered buffer having an address bus interface, where the switch may selectively bypass the data buffer based on a program signal obtained from an address bus via the address bus interface.

Abstract: A device and method for canceling one or more self-jammer signals in a radio-frequency identification system.

Abstract: Briefly, in accordance with one or more embodiments, a method and device capable of canceling self-jammer and one or more other interfering signals in an radio frequency identification system or the like is disclosed.

Abstract: A memory module can include a data buffer having a data bus interface and a dynamic random access memory (DRAM) coupled to the data buffer. The memory module may also include a switch connected in parallel with the data buffer, wherein the switch can selectively bypass the data buffer. In one example, the memory module also includes a registered buffer having an address bus interface, where the switch may selectively bypass the data buffer based on a program signal obtained from an address bus via the address bus interface.

Abstract: Provided are a method, system, and device directed to a receive path for a node in a communication system such as a Radio Frequency Identification (RFID) system. In one aspect, the receive path includes a filter operable in multiple modes and configurable to have different bandwidths in the various modes of operation. For example, in one mode, the filter samples a DC component while configured to have a relatively wide bandwidth. As another example, the filter may be operated in another mode to hold the sampled DC component while the filter is configured to have a zero or close to zero bandwidth. As yet another example, the filter may be operated in still another mode to filter received signals and cancel the sampled DC offset from the received signals while configured to have a relatively narrow bandwidth. Additional embodiments are described and claimed.

Abstract: Mechanisms for reducing amplitude-modulated noise in a wireless transceiver are generally described. In one example, an apparatus includes a radio-frequency identification (RFID) transceiver, a digital-analog converter (DAC) coupled with the transceiver, a reconstruction filter coupled with the digital-analog converter, and hold logic associated with the reconstruction filter to enable the reconstruction filter to hold its output voltage.

Abstract: A radio frequency device capable of differentiating self-jammer signals.

Abstract: Briefly, in accordance with one or more embodiments, a method and device capable of canceling self-jammer and one or more other interfering signals in an radio frequency identification system or the like is disclosed.

Abstract: Mechanisms for reducing amplitude-modulated noise in a wireless transceiver are generally described. In one example, an apparatus includes a radio-frequency identification (RFID) transceiver, a digital-analog converter (DAC) coupled with the transceiver, a reconstruction filter coupled with the digital-analog converter, and hold logic associated with the reconstruction filter to enable the reconstruction filter to hold its output voltage.

Abstract: A device and method for canceling one or more self-jammer signals in a radio-frequency identification system.

Abstract: A radio frequency device capable of differentiating self-jammer signals.

Abstract: Provided are a method, system, and device directed to a receive path for a node in a communication system such as a Radio Frequency Identification (RFID) system. In one aspect, the receive path includes a filter operable in multiple modes and configurable to have different bandwidths in the various modes of operation. For example, in one mode, the filter samples a DC component while configured to have a relatively wide bandwidth. As another example, the filter may be operated in another mode to hold the sampled DC component while the filter is configured to have a zero or close to zero bandwidth. As yet another example, the filter may be operated in still another mode to filter received signals and cancel the sampled DC offset from the received signals while configured to have a relatively narrow bandwidth. Additional embodiments are described and claimed.