Abstract: An apparatus and method are provided for identifying functionally sensitized data paths in a logic circuit and storing the identified data paths in a representation of the logic circuit. The representation of the logic circuit includes a single occurrence of each identified data path along with a variable for each single name or path segment identified. The variable represents a number of times that path segment or signal name was functionally sensitized.

Abstract: The present invention provides overvoltage circuit protection. Specifically, the present invention provides a voltage variable material (“VVM”) that includes an insulative binder that is formulated to intrinsically adhere to conductive and nonconductive surfaces. The binder and thus the VVM is self-curable and may be applied to an application in the form of an ink, which dries in a final form for use. The binder eliminates the need to place the VVM in a separate device or for separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid (FR-4) laminate, a polyimide or a polymer. The VVM can also be directly applied to different types of substrates that are placed inside a device.

Abstract: A method for controlling a transmitter for a serial data port is provided. The method includes receiving a set of data at the serial data port. The data in the set of data is compared with a selected pattern of bits. When data in the set of data matches the selected pattern of bits, a bit in a register is set. When the bit in the register is set, transmissions stop. The method further includes processing the set of data to determine a flow control state. When processing the set of data determines that the flow control state is a first state, transmissions re-start.

Abstract: An integrated overvoltage and overcurrent circuit protection device for use in telecommunication circuits. The integrated circuit protection device combines a overcurrent device such as a fuse and a overvoltage protection device such as a thyristor to respectively protect against overcurrent conditions and transient overvoltages. Integration of multiple devices in a common package ensures proper coordination and matching of the components, reduces the final product cost and reduces the physical space required on a telecommunications circuit for overvoltage and overcurrent circuit protection.

Abstract: An electrical circuit protection device has an overcurrent protection portion and an overvoltage protection portion. The overcurrent protection portion has a surface. The overvoltage protection portion is disposed on the surface. In one preferred embodiment, the overcurrent portion includes a PTC device and the overvoltage portion includes a voltage variable material. A number of terminations are configured to connect the overcurrent protection portion and the overvoltage protection portion to a printed circuit board.

Abstract: A method is described for controlling commands and data in a serial data stream received by a serial controller in a serial interface. A character count register is programed with a maximum number of characters that a serial controller will send to a direct memory access controller (DMAC) before sending an end of frame (EOF) indication. Characters in an incoming data stream are counted using the character count register. An EOF signal is passed to the DMAC after the maximum number of characters programmed in the character count register have been written to a direct memory access (DMA) buffer. The character count register is reset any time the serial controller passes an EOF to the DMAC. In one embodiment, a character is programmed into a match register. Data in an incoming data stream is compared with the character in the match register. When a character in the incoming data stream matches the character programmed in the match register, a match bit is set corresponding to the match register.

Abstract: A system and method for programming a programmable circuit. A graphical interface is provided to allow a user to graphically define at least one type of input data unit that is expected to be received at the programmable circuit. A visual representation of the input data format corresponding to the defined type of input data unit is presented to the user. The user graphically manipulates the visual representation of the input data format to graphically transform the input data format to a visual representation of a desired output data format of output data units to be output from the programmable circuit. Program code is automatically generated for directing the programmable circuit at run-time deployment to transform actual input data units of the defined type of input data units to actual output data units having the desired output data format in a manner corresponding to the graphical transformation of the input data format to the desired output data format.

Abstract: The present invention provides communications between networked computing devices using a high-level Extensible Markup Language (XML) structure. A plurality of desired transactions to be communicated between the networked computing devices are defined and an XML schema is established for each transaction. Communication session state information is maintained on each computing device during a session. Text-based transaction messages are sent between the networked computing devices using Hypertext Transport Protocol (HTTP) and can include both data and instructions. In one preferred embodiment, the networked computing devices are an Internet web server and a wireless patient monitor and said text-based transaction messages are used to provide bi-directional transmission of data and instructions.

Abstract: A system and method for scheduling data utilizes a number of queues for receiving data. A programmable criteria table comprises a number of entries each associated with one of the queues. The entries of the criteria table comprise programmable traffic parameters selected to associate the queues with particular traffic characteristics governing a flow of data through the queues. A programmable mapping table maps each of the queues to one of the criteria table entries. The criteria table is programmable independently from the mapping table. A scheduling period timer produces epoch time signals that define scheduling time periods. The scheduling of queues changes between scheduling time periods in accordance with the traffic parameters associated with the queues. The scheduling time period is dynamically programmable. The traffic parameters are dynamically programmable to alter a scheduling prioritization of the queues.

Abstract: The present invention provides a multi-service queuing method and apparatus that provides exhaustive arbitration, load balancing, and support for rapid port failover. Routers and switches according to the present invention can instantaneously direct the flow of traffic to another port should there be a failure on a link, efficiently handle multicast traffic and provide multiple service classes. The fabric interface interfaces the switch fabric with the ingress and egress functions provided at a network node and provides virtual input and output queuing with backpressure feedback, redundancy for high availability applications, and packet segmentation and reassembly into variable length cells. The user configures fixed and variable-length cells. Virtual input and output queues are coupled to a switch fabric.

Abstract: A pivotable arm assembly functions to demount a door on an electronics assembly and position a display. Preferably, an electronics assembly has a removable door. The removable door has an integral display device for communicating with equipment within the electronics assembly. The door is attached to the electronics assembly by a pivotable arm. In one embodiment, the door, including the display device, may be positioned in a variety of locations with respect to the equipment within the electronics assembly. Thus, in accordance with one specific aspect of the present invention, a display device and the equipment that it communicates with may be simultaneously viewed and accessed.

Abstract: A cable management apparatus guides and supports cables when mounted as part of an electronics assembly. Preferably, cables enter the electronics assembly through the rear of the electronics assembly and through each side of the electronics assembly. Cables entering the electronics assembly are guided to the electronic components within the electronics assembly. Cables are organized such that individual cables or groups of cable may be associated with specific electronic components within the electronics assembly. Cables or groups of cables associated with specific electronic components within the electronics assembly may be accessed individually while handling a large bundle of cables. In one embodiment of the present invention fiber optic cables are supported such that a minimum bend radius is maintained. Thus, in accordance with one specific aspect of the present invention, fiber optic cables may be supported and organized as part of an electronics assembly.

Abstract: An electrical circuit protection device has an overcurrent protection portion and an overvoltage protection portion. The overcurrent protection portion has a surface. The overvoltage protection portion is disposed on the surface. In one preferred embodiment, the overcurrent portion includes a PTC device and the overvoltage portion includes a voltage variable material. A number of terminations are configured to connect the overcurrent protection portion and the overvoltage protection portion to a printed circuit board.

Abstract: A building structure which simulates the appearance of a traditional log structure while incorporating modern wood framing construction techniques is disclosed. A number of interlocking log heads form the corner of the structure. Each log head abuts against a stud or post displaced a distance from the corner. Wall boards are affixed to extend horizontally over sheathing attached to studs and abut each log head. Small spaces between the wall boards are filled with a chinking element, which may be a wood strip covered with a suitable surface material to simulate actual chinking.

Abstract: A display system (10) displays alphanumeric data in a three dimensional grid (58). The grid (58) may include data entries (72), planes (72, 74, 76), labels (90, 92, 94), and various graphics (102, 106, 110) that visually represent the data entries (70). A user of display system (10) can modify, orient, or otherwise manipulate the grid (58) to visualize alphanumeric data in three dimensions.

Abstract: A test (i.e., a set of test vectors) for differentiating between two different integrated circuit versions (12,14) is established by first modeling the circuits in a simulated system such that: (a) the corresponding inputs of the circuits are coupled in parallel, (b) the corresponding outputs of the circuits are exclusively OR'd by a separate one of a plurality of exclusive OR gates (18.sub.1,18.sub.2,18.sub.3 . . . 18.sub.m), and (c) the outputs of the exclusive OR gates are OR'd by an OR gate (20). Thereafter, a set of test vectors is generated, using conventional techniques, such that the vectors, when input to the different-version integrated circuits, cause a predetermined logic level signal to the OR gate (20).

Abstract: The present disclosure is directed to a technique for assigning each of a plurality of test points (34) on a first surface of a translator board (24) to an appropriate one of a set of grid points (36) on an opposed surface of the board. Such an assignment is accomplished by first mapping the grid points (36) and a successive one of the test points (34) into an array (49a) of uniformly spaced cells (49b). An initial group of cells (49b), surrounding the mapped test point (34), is then searched to locate the four grid points (36) closest to the test point. Among the four closest grid points (36), the one which satisfies a particular constraint is designated. A check is then made to determine whether the designated grid point (36) is appropriate for the test point (34). If so, the grid point (36) is assigned to the test point (34) and the grid point is removed from the array before mapping the next test point.