Abstract: A thermionic sensor package and methods of using the same are disclosed. The sensor package includes a substrate, a package housing disposed on the substrate and at least partially defining a package chamber in which vacuum conditions are maintained, a thermionic sensor disposed in the package chamber, and a wireless transmission device disposed on the substrate. The thermionic sensor includes a sensor housing at least partially defining an emission chamber, a cathode disposed in the emission chamber, an anode disposed in the emission chamber and spaced apart from the cathode, and an electrically conductive layer disposed in the emission chamber facing the anode and cathode. The method includes generating a detection signal when the anode and the cathode of the sensor are at substantially the same temperature.

Abstract: A transient electronic device includes electronic elements (e.g., an SOI- or chip-based IC) and a trigger mechanism disposed on a frangible glass substrate. The trigger mechanism includes a switch that initiates a large trigger current through a self-limiting resistive element in response to a received trigger signal. The self-limiting resistive element includes a resistor portion that generates heat in response to the trigger current, thereby rapidly increasing the temperature of a localized (small) region of the frangible glass substrate, and a current limiting portion (e.g., a fuse) that self-limits (terminates) the trigger current after a predetermined amount of time, causing the localized region to rapidly cool down.

Abstract: A self-destructing device includes a stressed substrate with a heater thermally coupled to the stressed substrate. The device includes a power source and trigger circuitry comprising a sensor and a switch. The sensor generates a trigger signal when exposed to a trigger stimulus. The switch couples the power source to the heater in response to the trigger signal When energized by the power source, the heater generates heat sufficient to initiate self-destruction of the stressed substrate.

Abstract: An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a bonding surface and the heterostructure epitaxial layers have a surface with the epitaxial growth direction of the heterostructure epitaxial layers towards the surface. The surface of the heterostructure epitaxial layers is bonded at the bonding surface of the support substrate by ion exchange between the surface of the heterostructure epitaxial layers and the bonding surface of the support substrate.

Abstract: An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a bonding surface and the heterostructure epitaxial layers have a surface with the epitaxial growth direction of the heterostructure epitaxial layers towards the surface. The surface of the heterostructure epitaxial layers is bonded at the bonding surface of the support substrate by ion exchange between the surface of the heterostructure epitaxial layers and the bonding surface of the support substrate.

Abstract: A thermionic sensor package and methods of using the same are disclosed. The sensor package includes a substrate, a package housing disposed on the substrate and at least partially defining a package chamber in which vacuum conditions are maintained, a thermionic sensor disposed in the package chamber, and a wireless transmission device disposed on the substrate. The thermionic sensor includes a sensor housing at least partially defining an emission chamber, a cathode disposed in the emission chamber, an anode disposed in the emission chamber and spaced apart from the cathode, and an electrically conductive layer disposed in the emission chamber facing the anode and cathode. The method includes generating a detection signal when the anode and the cathode of the sensor are at substantially the same temperature.

Abstract: A circuit interconnect generally comprises an electrical connection pad, a shape memory material, and a flowable conductor. The electrical connection pad has an upper surface, a portion of which is covered by the shape memory material. The flowable conductor extends through the shape memory material and is electrically coupled to the electrical connection pad. The shape memory material has a first configuration at a first temperature and a second configuration at a second temperature. In the instance of the second temperature being greater than the first, the shape memory material has a first configuration that is substantially planar and a second configuration that is cupped.

Abstract: A system for fabricating an inkjet printhead that includes an apparatus for depositing a protective coating on an aperture plate unit, the aperture plate unit including a plurality of outlet apertures in the aperture plate unit, the apparatus including a protective coating source and a protective coating dispensing device, and a processor that is programmed to control an automated process for coating an inner surface of each of the plurality of outlet apertures with the protective coating. The protective coating dispensing device coats the inner surface of each of the plurality of outlet apertures by dispensing a measured amount of the protective coating to completely clog each of the plurality of outlet apertures by at least one of spraying the aperture plate unit with the protective coating and rolling the protective coating onto the aperture plate unit.

Abstract: An inkjet printhead includes an oleophobic membrane arranged at a location that allows the oleophobic membrane to simultaneously vent air from an ink flow channel of the printhead and to retain ink within the ink flow channel. The oleophobic membrane includes a metal structure having a nanostructured surface and low-surface energy coating disposed on the metal structure.

Abstract: A system and method are provided method for processing an aperture plate/brace plate unit in a jetstack fabrication process to add, and subsequently remove, a protective coating in the outlet apertures/orifices of the aperture plate to avoid baking on of waste or debris particles in the apertures/orifices. In a jetstack manufacturing process, the outlet apertures/orifices are purposely clogged with a protective coating of known composition, which can be subsequently relatively easily removed, to avoid an opportunity for particles of organic waste or debris material from migrating into the outlet apertures/orifices in a manner that would allow those particles to potentially become baked on inner surfaces of the outlet apertures/orifices in, for example, a polyimide high temperature adhesive bonding process.

Abstract: Bubble mitigation approaches for phase change ink involve creating a thermal gradient along an ink flow path of an ink jet printer during a time that the ink is undergoing a phase change. The thermal gradient causes one portion of the ink in the ink flow path to be in liquid phase while another portion of the ink is in solid phase. The thermal gradient allows the liquid ink to move along the ink flow path to fill in voids and/or to push out air pockets in the portion of the ink that is still solid. The bubble mitigation process may be implemented during a start-up operation when the ink is transitioning from a solid phase to a liquid phase and/or during a power down operation when the ink is transitioning from a liquid phase to a solid phase.

Abstract: A phase change ink printer may be operated so that multiple pressure pulses are applied to the ink in an ink flow path of the printer during a time that the ink is changing phase. During the phase change, a portion of the ink in the ink flow path is in liquid phase and another portion of the ink is in solid phase. The pressure pulses are applied at least to the liquid phase ink in the ink flow path. The phase change may involve a transition from solid to liquid phase, such as during a start-up operation, or may involve a transition from a liquid phase to a solid phase, such as during a power down operation. Application of pressure during either of these operations serves to reduce bubbles and voids in the phase change ink.

Abstract: A print head assembly for an ink jet printer includes an ink flow path configured to allow passage of a phase-change ink. A pressure unit is fluidically coupled to the ink flow path to apply a pressure to the ink. The applied pressure is controlled by a control unit during a time that the ink in the ink flow path is undergoing a phase change. During the phase change, a portion of the ink in a first region of the ink flow path is in liquid phase and another portion of the ink in another region of the ink flow path is in solid phase. A constant or variable pressure can be applied at least to the liquid phase portion of the ink during a phase transition from a liquid phase to a solid phase or from a solid phase to a liquid phase.

Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.

Abstract: The edge profile (and optionally the physical and electrical characteristics) of a wafer is determined. Useful regions of the wafer in an edge exclusion zone may then be identified. A customized grid array layout is created specific to that wafer from an analysis of the edge profile, for example having a grid array with interconnection lines located within the useful portions of the edge exclusion zone. This working file is then used by a system, such as a digital lithography system, to form the grid array on the surface of the wafer. The grid array is specific to that wafer. Various aspects of the grid array may also be controlled in the process. For example, the line width, inter-line spacing, and position of the lines comprising the grid array are configurable on a wafer-by-wafer basis.

Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.

Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.

Abstract: Various traveling wave grid configurations are disclosed. The grids and systems are well suited for transporting, separating, and classifying small particles dispersed in liquid or gaseous media. Also disclosed are various separation strategies and purification cells utilizing such traveling wave arrays and strategies.

Abstract: The edge profile (and optionally the physical and electrical characteristics) of a wafer is determined. Useful regions of the wafer in an edge exclusion zone may then be identified. A customized grid array layout is created specific to that wafer from an analysis of the edge profile, for example having a grid array with interconnection lines located within the useful portions of the edge exclusion zone. This working file is then used by a system, such as a digital lithography system, to form the grid array on the surface of the wafer. The grid array is specific to that wafer. Various aspects of the grid array may also be controlled in the process. For example, the line width, inter-line spacing, and position of the lines comprising the grid array are configurable on a wafer-by-wafer basis.

Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.