Patents by Inventor Se Chun Park

Se Chun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11031084
    Abstract: A memory device, in accordance with a method of operation, may include: a plurality of pages coupled to a common word line and configured to be sequentially selected by different select lines; a program operation controller configured to perform a program operation on a first page that is to be programmed first, among the plurality of pages; and a start loop manager configured to generate start loop information about a program loop in which program verification corresponding to each of a plurality of program states to be formed by threshold voltages of memory cells included in the first page starts, during the program operation on the first page. The program operation controller is further configured to perform a program operation on a second page to be programmed subsequent to the first page, among the plurality of pages, based on the start loop information.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: June 8, 2021
    Assignee: SK hynix Inc.
    Inventors: Jong Hoon Lee, Se Chun Park
  • Publication number: 20210158873
    Abstract: A memory device, in accordance with a method of operation, may include: a plurality of pages coupled to a common word line and configured to be sequentially selected by different select lines; a program operation controller configured to perform a program operation on a first page that is to be programmed first, among the plurality of pages; and a start loop manager configured to generate start loop information about a program loop in which program verification corresponding to each of a plurality of program states to be formed by threshold voltages of memory cells included in the first page starts, during the program operation on the first page. The program operation controller is further configured to perform a program operation on a second page to be programmed subsequent to the first page, among the plurality of pages, based on the start loop information.
    Type: Application
    Filed: May 4, 2020
    Publication date: May 27, 2021
    Applicant: SK hynix Inc.
    Inventors: Jong Hoon LEE, Se Chun PARK
  • Patent number: 10163512
    Abstract: A semiconductor device and or method of operating the same may be provided. The semiconductor device may include a pass circuit unit configured to connect global signal lines to signal lines to set voltage levels of the signal lines.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: December 25, 2018
    Assignee: SK hynix Inc.
    Inventors: Jung Hwan Lee, Se Chun Park
  • Patent number: 10133627
    Abstract: A controller includes a command generation unit suitable for generating a first read command for at least one page selected from said plurality of pages, an error correction block suitable for performing a first error correction operation to one or more code words stored in said at least one selected page in response to the first read command, and a command mirroring unit suitable for generating a mirrored command by mirroring the first read command.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: November 20, 2018
    Assignee: SK Hynix Inc.
    Inventors: Young Dong Roh, Se Chun Park
  • Patent number: 10108506
    Abstract: There are provided an electronic device, and more particularly, to a controller of a semiconductor memory device with an increased operation speed and a method of operating the same. The method of operating the controller configured to control the semiconductor memory device includes obtaining a recovery address in which recovered data stored in a page buffer of the semiconductor memory device in which the program fail is generated is to be stored, transmitting a recovery command requesting the semiconductor memory device to transmit the recovered data to the semiconductor memory device, and storing the recovered data in the recovery address. The obtaining of the recovery address, the transmitting of the recovery command, and the storing of the recovered data in the recovery address are simultaneously performed while a post-processing operation is performed on the program fail.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: October 23, 2018
    Assignee: SK Hynix Inc.
    Inventors: Se Chun Park, Ie Ryung Park, Dong Kun An, Na Ra Cho
  • Patent number: 10019199
    Abstract: There are provided a controller coupled to a semiconductor memory device and an operating method thereof. A controller having improved operation speed includes a command generation unit for generating commands to be performed by a semiconductor memory device, a command queue for storing the commands and providing at least one command among the stored commands to the semiconductor memory device, and a command removal unit for, if the semiconductor memory device fails in the performance of the at least one command output from the main command queue, removing the at least one command and related commands of the at least one command from the command queue.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: July 10, 2018
    Assignee: SK Hynix Inc.
    Inventors: Se Chun Park, Young Dong Roh, Kang Wook Lee
  • Publication number: 20180182461
    Abstract: A semiconductor device and or method of operating the same may be provided. The semiconductor device may include a pass circuit unit configured to connect global signal lines to signal lines to set voltage levels of the signal lines.
    Type: Application
    Filed: August 7, 2017
    Publication date: June 28, 2018
    Applicant: SK hynix Inc.
    Inventors: Jung Hwan LEE, Se Chun PARK
  • Publication number: 20170242768
    Abstract: There are provided an electronic device, and more particularly, to a controller of a semiconductor memory device with an increased operation speed and a method of operating the same. The method of operating the controller configured to control the semiconductor memory device includes obtaining a recovery address in which recovered data stored in a page buffer of the semiconductor memory device in which the program fail is generated is to be stored, transmitting a recovery command requesting the semiconductor memory device to transmit the recovered data to the semiconductor memory device, and storing the recovered data in the recovery address. The obtaining of the recovery address, the transmitting of the recovery command, and the storing of the recovered data in the recovery address are simultaneously performed while a post-processing operation is performed on the program fail.
    Type: Application
    Filed: July 20, 2016
    Publication date: August 24, 2017
    Inventors: Se Chun PARK, Ie Ryung PARK, Dong Kun AN, Na Ra CHO
  • Publication number: 20170192719
    Abstract: There are provided a controller coupled to a semiconductor memory device and an operating method thereof. A controller having improved operation speed includes a command generation unit for generating commands to be performed by a semiconductor memory device, a command queue for storing the commands and providing at least one command among the stored commands to the semiconductor memory device, and a command removal unit for, if the semiconductor memory device fails in the performance of the at least one command output from the main command queue, removing the at least one command and related commands of the at least one command from the command queue.
    Type: Application
    Filed: May 20, 2016
    Publication date: July 6, 2017
    Inventors: Se Chun PARK, Young Dong ROH, Kang Wook LEE
  • Publication number: 20170168892
    Abstract: A controller includes a command generation unit suitable for generating a first read command for at least one page selected from said plurality of pages, an error correction block suitable for performing a first error correction operation to one or more code words stored in said at least one selected page in response to the first read command, and a command mirroring unit suitable for generating a mirrored command by mirroring the first read command.
    Type: Application
    Filed: December 11, 2015
    Publication date: June 15, 2017
    Inventors: Young Dong ROH, Se Chun PARK
  • Patent number: 9542269
    Abstract: An operating method for controlling a semiconductor memory device according to an embodiment may include storing read commands in a command queue managed on first-in first-out basis; providing one of the read commands to the semiconductor memory device; determining whether the provided read command passes or fails based on read data, which is provided from the semiconductor memory device in response to the provided read command; and aborting remaining read commands in the command queue when the provided read command passes.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: January 10, 2017
    Assignee: SK Hynix Inc.
    Inventors: Young Dong Roh, Se Chun Park
  • Patent number: 9535607
    Abstract: A semiconductor system includes a semiconductor device suitable for receiving and performing a plurality of commands and a controller suitable for determining whether the semiconductor device completes an operation for each of the plurality of commands by performing one or more status reads for the semiconductor device whenever each of the plurality of commands is issued to the semiconductor device. The controller issues a first command among the plurality of commands to the semiconductor device, performs the one or more status reads for the semiconductor device to store a time taken to perform the first command as operation time information. The controller issues a second command among the plurality of commands to the semiconductor device, waits for a first wait time determined by the operation time information, and then performs the one or more status reads for the semiconductor device.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: January 3, 2017
    Assignee: SK Hynix Inc.
    Inventors: Ho Jung Yun, Se Chun Park
  • Publication number: 20160378590
    Abstract: An operating method for controlling a semiconductor memory device according to an embodiment may include storing read commands in a command queue managed on first-in first-out basis; providing one of the read commands to the semiconductor memory device; determining whether the provided read command passes or fails based on read data, which is provided from the semiconductor memory device in response to the provided read command; and aborting remaining read commands in the command queue when the provided read command passes.
    Type: Application
    Filed: June 29, 2015
    Publication date: December 29, 2016
    Inventors: Young Dong ROH, Se Chun PARK
  • Publication number: 20160239206
    Abstract: A semiconductor system includes a semiconductor device suitable for receiving and performing a plurality of commands and a controller suitable for determining whether the semiconductor device completes an operation for each of the plurality of commands by performing one or more status reads for the semiconductor device whenever each of the plurality of commands is issued to the semiconductor device. The controller issues a first command among the plurality of commands to the semiconductor device, performs the one or more status reads for the semiconductor device to store a time taken to perform the first command as operation time information. The controller issues a second command among the plurality of commands to the semiconductor device, waits for a first wait time determined by the operation time information, and then performs the one or more status reads for the semiconductor device.
    Type: Application
    Filed: February 12, 2015
    Publication date: August 18, 2016
    Inventors: Ho Jung YUN, Se Chun PARK
  • Patent number: 8861278
    Abstract: A cache programming method for a non-volatile memory device includes programming data for a current programming operation into a memory cell array, determining whether the current programming operation has been performed to a threshold point of program completion, and receiving a data for a next programming operation when the current programming operation has been performed to the threshold point of program completion.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: October 14, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: You-Sung Kim, Se-Chun Park
  • Publication number: 20140189407
    Abstract: A data storage device and a method for operating the same are provided. In the data storage device and the method for operating the same, a predetermined number of memory chips are operated based on a usable power limitation when a power supply is supplied from a finite power supply source such as a battery, and as many memory chips as possible are operated in parallel. Accordingly, performance of the data storage device may be improved.
    Type: Application
    Filed: December 11, 2013
    Publication date: July 3, 2014
    Applicant: SK hynix Inc.
    Inventors: Eu Joon BYUN, Kyeong Rho KIM, Se Chun PARK
  • Patent number: 8422309
    Abstract: A voltage generation circuit comprises a voltage generation control unit configured to output one of a first voltage level determination signal having a fixed data value and a second voltage level determination signal having a varying data value in response to a selection signal, and a voltage generation unit configured to generate a voltage having a single pulse form or a voltage having a pulse form whose rising edge portion rises in incremental voltage steps in response to the voltage level determination signal outputted from the voltage generation control unit.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: April 16, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Byung Ryul Kim, Duck Ju Kim, You Sung Kim, Se Chun Park
  • Patent number: 8365026
    Abstract: Methods for performing a fail test, block management, erase operations and program operations are used in a nonvolatile memory device having a block switch devoid of a fuse and a PMOS transistor. A method for performing a fail test in a nonvolatile memory device includes performing a fail test for a memory cell block; storing good block information in a block information store associated with the corresponding block when the memory cell block is a good block; and repeating the performing and storing steps for all memory cell blocks.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: January 29, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jong Hyun Wang, Chae Kyu Jang, Se Chun Park
  • Publication number: 20120155182
    Abstract: A cache programming method for a non-volatile memory device includes programming data for a current programming operation into a memory cell array, determining whether the current programming operation has been performed to a threshold point of program completion, and receiving a data for a next programming operation when the current programming operation has been performed to the threshold point of program completion.
    Type: Application
    Filed: November 8, 2011
    Publication date: June 21, 2012
    Inventors: You-Sung KIM, Se-Chun PARK
  • Patent number: 8189383
    Abstract: Multi-level cell programming methods are provided. A method includes providing a page buffer including first and second registers connected to first and second memory cell blocks, respectively. A least significant bit (LSB) program of each memory cell is completed. Most significant bit (MSB) data is set in a first node of the first register. An MSB program is performed. When the MSB program is performed at a first verify voltage, first data at a first voltage level is set in the first node. When the MSB program is performed at a second verify voltage, second data at a second voltage level, opposite to the first voltage level, is set in the first node. When the MSB program is performed at a third verify voltage, the first data is set in the first node. The MSB program is repeated according to the first node data.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: May 29, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chang Won Yang, Jong Hyun Wang, Se Chun Park