Abstract: A vacuum vessel supporting superconducting computing device environments includes a vacuum vessel having a cylindrical chamber defined by an internal frame, including upper and lower mounting rings, and at least two vertical support members disposed between the upper and lower mounting rings. The chamber is further defined by an upper plate releasably attached to the upper mounting ring, a lower plate releasably attached to the lower mounting plate, at least two side walls releasably attached to the upper mounting ring, the lower mounting ring and at least two vertical support members. Seal elements are disposed between the upper plate and the upper mounting ring, the lower plate and the lower mounting ring, and each side wall and the internal frame.

Abstract: A superconducting coupling device includes a resonator structure. The resonator structure has a first end configured to be coupled to a first device and a second end configured to be coupled to a second device. A gate is positioned proximal to a portion of the resonator structure. The gate is configured to receive a gate voltage and vary a kinetic inductance of the portion of the resonator based upon the gate voltage. The varying of the kinetic inductance induces the resonator structure to vary a strength of coupling between the first superconducting device and the second superconducting device.

Abstract: A superconducting coupling device includes a resonator structure. The resonator structure has a first end configured to be coupled to a first device and a second end configured to be coupled to a second device. The device further includes an electron system coupled to the resonator structure, and a gate positioned proximal to a portion of the electron system. The electron system and the gate are configured to interrupt the resonator structure at one or more predetermined locations forming a switch. The gate is configured to receive a gate voltage and vary an inductance of the electron system based upon the gate voltage. The varying of the inductance induces the resonator structure to vary a strength of coupling between the first device and the second device.

Abstract: A quantum computer includes a refrigeration system under vacuum including a containment vessel, a qubit chip contained within a refrigerated vacuum environment defined by the containment vessel. The quantum computer further includes a plurality of interior electromagnetic waveguides and a plurality of exterior electromagnetic waveguides. The quantum computer further includes a hermetic connector assembly operatively connecting the interior electromagnetic waveguides to the exterior electromagnetic waveguides while maintaining the refrigerated vacuum environment. The hermetic connector assembly includes an exterior multi-waveguide connector, an interior multi-waveguide connector, and a dielectric plate arranged between and hermetically sealed with the exterior multi-waveguide connector and the interior multi-waveguide connector. The dielectric plate permits electromagnetic energy when carried by the interior and exterior pluralities of electromagnetic waveguides to pass therethrough.

Abstract: Devices, systems, methods, and computer-implemented methods to facilitate transmitting microwave signals to one or more cryogenic stages of a cryogenic refrigerator are provided. According to an embodiment, a device can comprise a monolithic signal carrier device comprising a thermal barrier disposed within a ground layer and a signal layer. The device can further comprise a thermal decoupling device coupled at the thermal barrier to the ground layer and the signal layer.

Abstract: Provided are devices for automated analysis of one or more samples in single or multi-well plates or vessels, wherein the process of automated analysis comprises automated flow, wherein the samples comprise liquid or particles in a sample vessel, and wherein the devices comprise an assembly of components that enable processing of a sample for analytical assessment by fluidic and/or particle based instruments. Automated flow may comprise systems for moving samples including vacuum systems, pressure-based systems, pneumatic systems, pumps, peristaltic pumps, diaphragms, or syringes. The devices may comprise an assembly of components that enable movement in X, Y, and Z dimensions, as well as switches, microfluidic tubing, well plate block, electronic pressure controllers, pneumatic or fluidic mixing devices, components for fluid handling, sampling vessels, and mechanical components for translating or transporting system components.

Abstract: Provided are methods and devices for assessing biological particles for use in cell immunotherapy. By utilizing a microfluidic chip device together with optical force measurement and cell imaging, the methods enable comprehensive assessment and characterization of biological particles with regard to morphology, motility, binding affinities, and susceptibility to external forces, including but not limited to, chemical, biochemical, biological, physical and temperature influences. The methods enable the selection and production of biological particles, such as engineered T-cells, for use in immunotherapy and biomanufacturing.

Abstract: A microfluidic chip configuration wherein injection occurs in an upwards vertical direction, and fluid vessels are located below the chip in order to minimize particle settling before and at the analysis portion of the chip's channels. The input and fluid flow up through the bottom of the chip, in one aspect using a manifold, which avoids orthogonal re-orientation of fluid dynamics. The contents of the vial are located below the chip and pumped upwards and vertically directly into the first channel of the chip. A long channel extends from the bottom of the chip to near the top of the chip. Then the channel takes a short horizontal turn that nearly negates any influence of cell settling due to gravity and zero flow velocity at the walls. The fluid is pumped up to a horizontal analysis portion that is the highest channel/fluidic point in the chip and thus close to the top of the chip, which results in clearer imaging.

Abstract: An information handling system (IHS) includes a host computer with a downstream facing host computer serial communication bus port and a serial communication bus host controller, wherein the controller is configured to detect a serial communication bus device connected to the downstream facing host computer serial communication bus port, wherein the serial communication bus device has a pull-up resistor. The IHS further includes a circuit disposed between the serial communication bus host controller and the downstream facing host computer serial communication bus port, the circuit configured to disable the downstream facing host computer serial communication bus port and comprising at least one tri-state buffer.

Abstract: A method for characterizing server utilization out-of-band via remote access card virtual media includes sending at least one preselected desired parameter comprising at least one of at least one performance parameter and at least one process parameter, and at least one preselected polling interval to a remote access card disposed in at least one preselected managed host server system, using a remote application running on a remote management client via at least one remote access card administrative command through an out-of-band dedicated remote access card network interface card. The method also includes connecting a plug-and-play virtual drive, having an auto-run data gathering executable, to the at least one preselected managed host server system at the at least one preselected polling interval via a plug-and-play virtual media interface between the remote access card and the at least one preselected managed host server system, using firmware of the remote access card.

Abstract: A method and system for increasing flexibility, I/O accessibility, and reliability of multicore, multiprocessor architecture, a first input/output (I/O) controller and a second I/O controller are coupled by an I/O controller link card. The first I/O controller is coupled to at least one multicore processor. A plurality of primary I/O slots and a plurality of secondary I/O slots are respectively coupled to the first I/O controller and the second I/O controller. The I/O controller link card is removably insertable in adjacent slots spanning one of the primary I/O slots and one of the secondary I/O slots, thereby providing a flexible link to electrically couple the first I/O controller and the second I/O controller.

Abstract: An information handling system (IHS) includes a host computer with a downstream facing host computer serial communication bus port and a serial communication bus host controller, wherein the controller is configured to detect a serial communication bus device connected to the downstream facing host computer serial communication bus port, wherein the serial communication bus device has a pull-up resistor. The IHS further includes a circuit disposed between the serial communication bus host controller and the downstream facing host computer serial communication bus port, the circuit configured to disable the downstream facing host computer serial communication bus port and comprising at least one tri-state buffer.

Abstract: A method for characterizing server utilization out-of-band via remote access card virtual media includes sending at least one preselected desired parameter comprising at least one of at least one performance parameter and at least one process parameter, and at least one preselected polling interval to a remote access card disposed in at least one preselected managed host server system, using a remote application running on a remote management client via at least one remote access card administrative command through an out-of-band dedicated remote access card network interface card. The method also includes connecting a plug-and-play virtual drive, having an auto-run data gathering executable, to the at least one preselected managed host server system at the at least one preselected polling interval via a plug-and-play virtual media interface between the remote access card and the at least one preselected managed host server system, using firmware of the remote access card.

Abstract: A method and system for increasing flexibility, I/O accessibility, and reliability of multicore, multiprocessor architecture, a first input/output (I/O) controller and a second I/O controller are coupled by an I/O controller link card. The first I/O controller is coupled to at least one multicore processor. A plurality of primary I/O slots and a plurality of secondary I/O slots are respectively coupled to the first I/O controller and the second I/O controller. The I/O controller link card is removably insertable in adjacent slots spanning one of the primary I/O slots and one of the secondary I/O slots, thereby providing a flexible link to electrically couple the first I/O controller and the second I/O controller.

Abstract: Methods and apparatus are provided which may be employed to perform speech recognition processing on a grid computing system. In some embodiments, the grid computing system includes a server system which receives processing tasks from one or more client applications, divides the processing tasks into units of work, and assigns the units of work to one or more of the nodes. Dividing a processing task into units of work may involve dividing audio input data into segments defined by natural speech boundaries. A mathematical representation may be created for each segment prior to its distribution on the grid to minimize network traffic. A node in the system may perform heterogeneous units of work concurrently, such as by isolating the execution of each unit of work in an application domain.

Abstract: Methods and apparatus are provided which may be employed to perform speech recognition processing on a grid computing system. In some embodiments, the grid computing system includes a server system which receives processing tasks from one or more client applications, divides the processing tasks into units of work, and assigns the units of work to one or more of the nodes. Dividing a processing task into units of work may involve dividing audio input data into segments defined by natural speech boundaries. A mathematical representation may be created for each segment prior to its distribution on the grid to minimize network traffic. A node in the system may perform heterogeneous units of work concurrently, such as by isolating the execution of each unit of work in an application domain.

Abstract: Methods and apparatus are provided which may be employed to perform speech recognition processing on a grid computing system. In some embodiments, the grid computing system includes a server system which receives processing tasks from one or more client applications, divides the processing tasks into units of work, and assigns the units of work to one or more of the nodes. Dividing a processing task into units of work may involve dividing audio input data into segments defined by natural speech boundaries. A mathematical representation may be created for each segment prior to its distribution on the grid to minimize network traffic. A node in the system may perform heterogeneous units of work concurrently, such as by isolating the execution of each unit of work in an application domain.

Abstract: A method for providing advertising services in general media using a pay for performance model is provided. A service provider defines at least one biddable advertisement for presentation in advertising media. A bid amount chargeable to a participating advertiser upon a response to the at least one biddable advertisement is determined, generally by an open auction conducted by the service provider. The biddable advertisement is associated with a participating advertiser based, at least in part, on the bid amount. As responses to the biddable advertisement are received by the service provider, they are provided to the associated participating advertiser and that participating advertiser is charged the bid amount for the response. The advertiser associated with a biddable ad can change in real time based on the auction and association mechanisms used by the service provider, such as a bid weighted rotation which associates the biddable ad to a number of participating advertisers.