Abstract: A computer system manages the allocation of memory to an application program using a dependency tree. The dependency tree informs a memory manager of data inputs, data outputs, and intermediate values associated with execution of the application program. The memory manager allocates a single heap structure within a physical memory. Data associated with each node of the dependency tree is allocated to the heap structure so that data input values are allocated in a contiguous block, and intermediate values are allocated separately. In various examples, as execution of the application program proceeds, the separation of intermediate values from non-intermediate values within the heap reduces memory fragmentation providing improved performance of the computer system as a whole.

Abstract: The present invention relates to a vector system for transformation of Chlorella vulgaris, a Chlorella vulgaris transformation method using same, and a Chlorella vulgaris transformant.

Abstract: The present invention relates to a vector system for transformation of Chlorella vulgaris, a Chlorella vulgaris transformation method using same, and a Chlorella vulgaris transformant.

Abstract: A system for manufacturing an integrated circuit includes a non-transitory computer readable medium configured to store executable instructions, and a processor coupled to the non-transitory computer readable medium. The processor is configured to execute the executable instructions for placing a set of gate layout patterns on a first layout level, and generating a cut feature layout pattern extending in the first direction. The set of gate layout patterns correspond to fabricating a set of gate structures of the integrated circuit. The cut feature layout pattern is on the first layout level, and overlap each of the layout patterns of the set of gate layout patterns at a same position in the second direction. The cut feature layout pattern identifies a location of a removed portion of a gate structure of the set of gate structures.

Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.

Abstract: A method for graphically displaying data. The method can include sensing a position of a ball on a field using one or more sensors during a live sporting event; sensing human movement and location information using one or more sensors in the live sporting event; determining positioning information of one or more players based on the sensed human movement and location information and the sensed ball position on the field; and generating graphical indica on a transmitted broadcast of the live sporting event, the graphical indica showing a generated graphic of at least one of positioning information and ball position on the field.

Abstract: A method, system, and apparatus for a live sporting event broadcast system. Embodiments include one or more video cameras that record the live sporting event; one or more sensors that track movement of one or more players in the live sporting event; one or more sensors that track location data of one or more pieces of equipment used in the live sporting event; at least one processor configured to: determine and/or track situational data of the live sporting event and synchronizes the tracked player movement and location data of the one or more pieces of equipment with the tracked situational data, compare the synchronized tracked player movement and the tracked location data of the one or more pieces of equipment with historical data, and determine at least an expected player movement in an upcoming action in the live event; a video highlight that is displayed on a broadcast transmission stream.

Abstract: A method, system and apparatus for sensing data and updating statistical data. The method, system and apparatus can include one or more sensors physically located at a live sporting event that collect sensed data; a live database that receives sensor data continuously during activity in the live sporting event; a base module that continuously polls the live database, stores sensed data from any completed action in the live event in a sensed data database, and transmits the sensed data to a historical action database; a situational database that houses situational data about sensed data; and a processor that associates the situational data is with the sensed data to determine dynamic statistical data.

Abstract: A method, system, and apparatus for tracking actions in a live event. Embodiments can include one or more cameras located at the live event, the one or more cameras each focused on at least one of a player participating in the live event or equipment used in the live event, and one or more cameras collect sensed movement data regarding the at least one player or the equipment; and a processor that receives transmitted sensed movement data, compares the sensed movement data to historical movement data in a database, and determines a predicted movement of the at least one player or equipment in the live event. Further, the historical movement data in the database is updated in substantially real time after the collection of the sensed movement data by the one or more cameras.

Abstract: The present disclosure describes apparatuses and methods for implementing a pipelined processor with configurable grouping of processor elements. In aspects, an apparatus comprises a host interface configured for communication with a host system, a media interface configured to enable access to storage media, and a plurality of processor elements operably coupled to at least one of the host interface and the media interface. The plurality of processor elements is organized into multiple stages of a pipelined processor for processing data access commands associated with the host system. In various implementations, the plurality of processor elements can be selectively grouped to form the multiple stages of the pipelined processor and loaded with microcode to implement respective functions of each stage of the pipelined processor. By so doing, the pipelined processor may be configured based on various parameters to improve processing performance when processing the data access commands of the host system.

Abstract: A memory system includes multiple groups of primary memory cells residing in a first die or a stack of first dies, multiple groups of cache memory cells residing in a second die, an interposer, and control circuits residing in a third die. Each group of the cache memory cells is associated with a corresponding group of the primary memory cells. The first die or the stack of first dies is coupled to a top surface of the second die through a first group of bumps. A bottom surface of the second die is coupled to a top surface of the interposer through a second group of bumps. The control circuits are associated with the primary memory cells and the cache memory cells. The third die is positioned aside the second die and coupled to the top surface of the interposer through a third group of pumps.

Abstract: An apparatus comprising a plurality of dividers constructed of lightweight material that when placed at the top of a golf club carrying bag, with the dividers inserted between the individual exposed golf club heads, provides protection to the golf club heads from damage caused by movement of the golf club bag when carrying or transporting. In addition to the protection provided, the apparatus also mutes the noise from the club head contact caused by the same movement.

Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.

Abstract: A method, system, and apparatus for generating probabilities, for example for displaying on a video feed, which may be generated or adjusted using machine learning and/or artificial intelligence. One embodiment includes a method for generating and adjusting probabilities. the generated probabilities in order to create and display probability graphics on a display device. The graphics may be generated and/or updated using artificial intelligence or machine learning. Display information may be updated in real-time as changes are made in the game (e.g. a player injury, substitutions, changing weather conditions, etc.). The changes may be detected by a detection system on the field, attached to players or equipment.

Abstract: A method, system, and apparatus for generating probabilities, for example for displaying on a video feed, which may be generated or adjusted using machine learning and/or artificial intelligence. One embodiment includes a method for generating and adjusting probabilities. the generated probabilities in order to create and display probability graphics on a display device. The graphics may be generated and/or updated using artificial intelligence or machine learning. Display information may be updated in real-time as changes are made in the game (e.g. a player injury, substitutions, changing weather conditions, etc.). The changes may be detected by a detection system on the field, attached to players or equipment.

Abstract: A system for manufacturing an integrated circuit includes a non-transitory computer readable medium configured to store executable instructions, and a processor coupled to the non-transitory computer readable medium. The processor is configured to execute the executable instructions for placing a set of gate layout patterns on a first layout level, and generating a cut feature layout pattern extending in the first direction. The set of gate layout patterns correspond to fabricating a set of gate structures of the integrated circuit. The cut feature layout pattern is on the first layout level, and overlap each of the layout patterns of the set of gate layout patterns at a same position in the second direction. The cut feature layout pattern identifies a location of a removed portion of a gate structure of the set of gate structures.

Abstract: A memory system includes multiple groups of primary memory cells residing in a first die or a stack of first dies, multiple groups of cache memory cells residing in a second die, an interposer, and control circuits residing in a third die. Each group of the cache memory cells is associated with a corresponding group of the primary memory cells. The first die or the stack of first dies is coupled to a top surface of the second die through a first group of bumps. A bottom surface of the second die is coupled to a top surface of the interposer through a second group of bumps. The control circuits are associated with the primary memory cells and the cache memory cells. The third die is positioned aside the second die and coupled to the top surface of the interposer through a third group of pumps.

Abstract: An integrated circuit includes a first and second set of gate structures. A center of each of the first set of gate structures is separated from a center of an adjacent gate of the first set of gate structures in a first direction by a first pitch. A center of each of the second set of gate structures is separated from a center of an adjacent gate of the second set of gate structures in the first direction by the first pitch. The first and second set of gate structures extend in a second direction. A gate of the first set of gate structures is aligned in the second direction with a corresponding gate of the second set of gate structures. The gate of the first set of gate structures is separated from the corresponding gate of second set of gate structures in the second direction by a first distance.

Abstract: A console and headset system locally trains machine learning models to perform customized online learning tasks. To customize the online learning models for specific users of the system without using outside resources, the system trains the models to compare a target frame to stored calibration frames, rather than directly inferring information about a target frame. During deployment, an embedding is generated for the target frame. A sample embedding that is closest to the target embedding is selected from a group of embeddings of calibration frames. The information about the selected embedding and target embedding and ground truths for the calibration frame are provided as inputs to one of the trained models. The model predicts a difference between the target frame and the calibration frame, which can be used to determine information about the target frame.

Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.