Patents by Inventor Sean M. Seutter

Sean M. Seutter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170222067
    Abstract: Stable surface passivation on a crystalline silicon substrate is provided by forming a more heavily doped region as a front surface field and/or a doped dielectric layer under a passivation layer on the silicon substrate surface. A passivation layer is deposited on the front surface field and/or doped dielectric layer.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 3, 2017
    Inventors: Sean M. Seutter, Mehrdad M. Moslehi
  • Publication number: 20170194520
    Abstract: Fabrication methods for forming self aligned contacts for back contact solar cells are provided.
    Type: Application
    Filed: March 20, 2017
    Publication date: July 6, 2017
    Inventors: Anand Deshpande, Pawan Kapur, Mehrdad M. Moslehi, Virendra V. Rana, Sean M. Seutter
  • Patent number: 9502521
    Abstract: A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a tunnel layer adjacent to the channel, a charge trapping layer above the tunnel layer, a charge blocking layer above the charge trapping layer, a control gate above the charge blocking layer, and an intentionally incorporated interface region between the charge trapping layer and the charge blocking layer. The charge trapping layer comprises a compound including silicon and nitrogen, the charge blocking layer contains an oxide of a charge blocking component, and the interface region comprises a compound including silicon, nitrogen and the charge blocking component. The tunnel layer may comprise up to three tunnel sub-layers, the charge trapping layer may comprise two trapping sub-layers, and the charge blocking layer may comprise up to five blocking sub-layers. Various gate stack formation techniques can be employed.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: November 22, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Udayan Ganguly, Christopher S. Olsen, Sean M. Seutter, Lucien Date
  • Publication number: 20160336233
    Abstract: Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.
    Type: Application
    Filed: December 14, 2015
    Publication date: November 17, 2016
    Inventors: Takao Yonehara, Virendra V. Rana, Sean M. Seutter, Mehrdad M. Moslehi, Subramanian Tamilmani
  • Publication number: 20160336465
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Application
    Filed: November 23, 2015
    Publication date: November 17, 2016
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virendra V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
  • Patent number: 9379258
    Abstract: Fabrication methods for making back contact back junction solar cells. A base dopant source, a field emitter dopant source, and an emitter dopant source are deposited on the back surface of a solar cell substrate. The solar cell substrate is annealed forming emitter contact regions corresponding to the emitter dopant source, field emitter regions corresponding to the field emitter dopant, and base contact regions corresponding to the base dopant source. The base dopant source, field emitter dopant source, and the emitter dopant source are etched. A backside passivation layer is deposited on the back surface of the solar cell. Contacts are opened to the emitter contact regions and the base contact regions through the backside passivation layer. Patterned base metallization and patterned emitter metallization is formed on the back surface of the solar cell with electrical interconnections to the base contact regions and the emitter contact regions.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: June 28, 2016
    Assignee: Solexel, Inc.
    Inventors: Pawan Kapur, Anand Deshpande, Virendra V. Rana, Mehrdad M. Moslehi, Sean M. Seutter
  • Patent number: 9312154
    Abstract: Embodiments of the invention provide improved apparatus for depositing layers on substrates, such as by chemical vapor deposition (CVD). The inventive apparatus disclosed herein may advantageously facilitate one or more of depositing films having reduced film thickness non-uniformity within a given process chamber, improved particle performance (e.g., reduced particles on films formed in the process chamber), chamber-to-chamber performance matching amongst a plurality of process chambers, and improved process chamber serviceability.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: April 12, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Binh Tran, Anqing Cui, Bernard L. Hwang, Son T. Nguyen, Anh N. Nguyen, Sean M. Seutter, Xianzhi Tao
  • Publication number: 20160093763
    Abstract: The laser patterning methods utilizing a laser absorbent hard mask in combination with wet etching to form patterned solar cell doped regions which may further improve cell efficiency by completely avoiding laser ablation of an underlying semiconductor substrate associated with ablation of an overlying transparent passivation layer.
    Type: Application
    Filed: April 29, 2014
    Publication date: March 31, 2016
    Inventors: Virendra V. Rana, Pawan Kapur, Sean M. Seutter, Mehrdad M. Moslehi
  • Publication number: 20160013335
    Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepreg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepreg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepreg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepreg backplane.
    Type: Application
    Filed: February 5, 2015
    Publication date: January 14, 2016
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, Sean M. Seutter, Pawan Kapur, Thom Stalcup, David Xuan-Qi Wang, George D. Kamian, Kamran Manteghi, Yen-Sheng Su, Pranav Anbalagan, Virendra V. Rana, Anthony Calcaterra, Gerry Olsen, Wojciech Worwag
  • Patent number: 9196759
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: November 24, 2015
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virendra V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
  • Publication number: 20150311378
    Abstract: The present application provides effective and efficient structures and methods for the formation of solar cell base and emitter regions and passivation layers using laser processing. Laser absorbent passivation materials are formed on a solar cell substrate and patterned using laser ablation to form base and emitter regions. Laser damage to the solar cell substrate is removed using an etch.
    Type: Application
    Filed: February 26, 2015
    Publication date: October 29, 2015
    Inventors: Pawan Kapur, Anand Deshpande, Sean M. Seutter, Heather Deshazer, Virendra V. Rana, Solene Coutant, Swaroop Kommera, Mehrdad M. Moslehi
  • Publication number: 20150243814
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Application
    Filed: February 23, 2015
    Publication date: August 27, 2015
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virendra V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
  • Publication number: 20150221792
    Abstract: Fabrication methods for forming self aligned contacts for back contact solar cells are provided.
    Type: Application
    Filed: December 23, 2014
    Publication date: August 6, 2015
    Inventors: Anand Deshpande, Pawan Kapur, Mehrdad M. Moslehi, Virendra V. Rana, Sean M. Seutter
  • Publication number: 20150171230
    Abstract: Fabrication methods for forming thin film back contact solar cells are provided.
    Type: Application
    Filed: September 22, 2014
    Publication date: June 18, 2015
    Inventors: Pawan Kapur, Anand Deshpande, Virendra V. Rana, Mehrdad M. Moslehi, Sean M. Seutter
  • Publication number: 20150171240
    Abstract: According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell using bulk wafers is provided.
    Type: Application
    Filed: September 22, 2014
    Publication date: June 18, 2015
    Inventors: Pawan Kapur, Anand Deshpande, Virendra V. Rana, Mehrdad M. Moslehi, Sean M. Seutter
  • Publication number: 20150162487
    Abstract: The present application provides effective and efficient structures and methods for the formation of solar cell base and emitter regions and passivation layers using laser processing. Laser absorbent passivation materials are formed on a solar cell substrate and patterned using laser ablation to form base and emitter regions.
    Type: Application
    Filed: December 1, 2014
    Publication date: June 11, 2015
    Inventors: Heather Deshazer, Virendra V. Rana, Sean M. Seutter, Pawan Kapur, Mehrdad M. Moslehi, Solene Coutant
  • Publication number: 20150162486
    Abstract: The present application provides effective and efficient structures and methods for the formation of solar cell base and emitter regions using laser processing. Laser absorbent passivation materials are formed on a solar cell substrate and patterned using laser ablation to form base and emitter regions.
    Type: Application
    Filed: September 16, 2014
    Publication date: June 11, 2015
    Inventors: Heather Deshazer, Virendra V. Rana, Sean M. Seutter, Pawan Kapur, Mehrdad M. Moslehi, Solene Coutant
  • Publication number: 20150144190
    Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.
    Type: Application
    Filed: February 2, 2015
    Publication date: May 28, 2015
    Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Karl-Josef Kramer, Sean M. Seutter, Sam Tone Tor, Anthony Calcaterra
  • Publication number: 20150132931
    Abstract: A method for thermal processing of a silicon substrate wherein first a silicon substrate is heated to an idle load temperature in the range of approximately 700° to 900° C. The silicon substrate is then heated to a temperature in the range of approximately 975° to 1200° C. in less than approximately 20 minutes. After thermal processing, the silicon substrate is cooled to an idle unload temperature in the range of approximately 700° to 900° C. in less than approximately 20 minutes.
    Type: Application
    Filed: July 1, 2014
    Publication date: May 14, 2015
    Inventors: Pawan Kapur, Mehrdad M. Moslehi, Sean M. Seutter, Mohammed Islam, Anand Deshpande
  • Publication number: 20150129031
    Abstract: A back contact solar cell is described which includes a semiconductor light absorbing layer; a first-level metal layer (M1), the M1 metal layer on a back side of the light absorbing layer, the back side being opposite from a front side of the light absorbing layer designed to receive incident light; an electrically insulating backplane sheet backside of said solar cell with the M1 layer, the backplane sheet comprising a plurality of via holes that expose portions of the M1 layer beneath the backplane sheet; and an M2 layer in contact with the backplane sheet, the M2 layer made of a sheet of pre-fabricated metal foil material comprising a thickness of between 5-250 ?m, the M2 layer electrically connected to the M1 layer through the via holes in the backplane sheet.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 14, 2015
    Inventors: Mehrdad M. Moslehi, Thom Stalcup, Karl-Josef Kramer, Anthony Calcaterra, Virendra V. Rana, Sean M. Seutter, Pawan Kapur, Michael Wingert