Abstract: A method and system of transmit load balancing across multiple physical ports. At least some of the illustrative embodiments are methods comprising teaming a first and second communication ports to create a teamed communication port, creating a plurality of virtual ports which abstract the first and second communication ports (and wherein a number of virtual ports utilizing each communication port is based on parameters associated with the communication ports), selecting one of the plurality of virtual ports out which to send a message packet thus designating a select virtual port (the selecting implements transmit load balancing across plurality of virtual ports) and sending the message packets out the first or second communication port utilized by the selected virtual port.

Abstract: A method of operating a network computer system provides redundant Internet Protocol (IP) Multicast traffic flow on a group of physical ports and comprises virtualizing the group of physical ports into a single virtual Network Interface Controller (NIC), validating network connectivity in a logical group comprising at least one of the physical ports in the virtualized group, and responding to failure of a physical port that is actively receiving on an IP Multicast traffic flow by instigating failover of the actively received IP Multicast traffic flow to a physical port in the logical group with validated network connectivity.

Abstract: A cutting mat includes a flat, planar sheet of rigid but flexible material with a plastic film affixed to the lower surface and extending across the length and width of the sheet. In the preferred embodiment, the mat is formed of spring steel. A holder for the mat is formed of a planar sheet of plastic material with flaps formed in the holder to removably retain the cutting mat in position on the holder.

Abstract: A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function bus, (3) a context memory having a block buffer and a argument signature register wherein the block buffer includes processing blocks associated with a protocol data unit (PDU), (4) a pattern processing engine, associated with the context memory, that performs pattern matching and (5) a function interface system having (5A) a controller arbitration subsystem and (5B) a dispatch subsystem.

Abstract: A portable device includes a location detector, a time detector, and an alarm module to generate alarms based on both time-based and location-based criteria. A current time provided by the time detector is compared to a time-based criterion, and a current geographical location provided by the location detector (e.g., global positioning system or GPS receiver) is compared to a location-based criterion to determine whether or not to generate an alarm.

Abstract: A virtual reassembly system for use with a fast pattern processor and a method of operating the same. In one embodiment, the virtual reassembly system includes a first pass subsystem configured to convert a packet of a protocol data unit into at least one processing block, queue the at least one processing block based upon a header of the packet and determine if the packet is a last packet of the protocol data unit. The virtual reassembly system further includes a second pass subsystem configured to virtually reassemble the protocol data unit by retrieving the at least one processing block based upon the queue.

Abstract: A portable device includes a location detector, a time detector, and an alarm module to generate alarms based on both time-based and location-based criteria. A current time provided by the time detector is compared to a time-based criterion, and a current geographical location provided by the location detector (e.g., global positioning system or GPS receiver) is compared to a location-based criterion to determine whether or not to generate an alarm.