Patents by Inventor Sebastian Schoenberg

Sebastian Schoenberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11381636
    Abstract: To address technical problems facing managing multiple sources of information from multiple vehicles, vehicular computing power may be exploited to process such information before sharing with others, which may help reduce network traffic overhead. A technical solution to improve this information processing over vehicular networks by using a hybrid Named Function Network (NFN) and Information Centric Network (ICN), such as in a hybrid NFN/ICN. An NFN may be used to orchestrate computations in a highly dynamic environment after decomposing the computations into a number of small functions. A function may include a digitally signed binary supplied by a car vendor or other trusted authority and executed within a controlled environment, such as a virtual machine, container, Java runtime-environment, or other controlled environment.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: July 5, 2022
    Assignee: Intel Corporation
    Inventors: S M Iftekharul Alam, Stepan Karpenko, Satish Chandra Jha, Yi Zhang, Kuilin Clark Chen, Kathiravetpillai Sivanesan, Gabriel Arrobo Vidal, Srikathyayani Srikanteswara, Hassnaa Moustafa, Eve M. Schooler, Sebastian Schoenberg, Venkatesan Nallampatti Ekambaram, Ravikumar Balakrishnan
  • Patent number: 11316946
    Abstract: Generally discussed herein are systems, devices, and methods for populating a cache in an information-centric network. A device of an ICN can include a content store including published content and attributes of the published content stored thereon, the attributes including at least two of a device from which the content originated attribute, a lineage attribute, and a service level agreement attribute, and content processing circuitry coupled to the content store, the content processing circuitry configured to manage the published content based on the attributes.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: April 26, 2022
    Assignee: Intel Corporation
    Inventors: Sebastian Schoenberg, Andrew Stephen Brown, Srikathyayani Srikanteswara, Jessica C. McCarthy, Eve M. Schooler, Christian Maciocco, Hassnaa Moustafa, Nageen Himayat, Rath Vannithamby, David John Zage
  • Patent number: 11218907
    Abstract: System and techniques for publisher control in an information centric network (ICN) are described herein. Named data criteria to identify data for a workload may be constructed. A discriminator for potential publishers of the data may be constructed. An interest packet may be transmitted based on the named data criteria and the discriminator and a response to the interest packet received from one of the potential publishers.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: January 4, 2022
    Assignee: Intel Corporation
    Inventors: Ravikumar Balakrishnan, Venkatesan Nallampatti Ekambaram, Srikathyayani Srikanteswara, Jessica C. McCarthy, Eve M. Schooler, Sebastian Schoenberg, Rath Vannithamby, Moreno Ambrosin, Maruti Gupta Hyde
  • Publication number: 20210105335
    Abstract: Generally discussed herein are systems, devices, and methods for populating a cache in an information-centric network. A device of an ICN can include a content store including published content and attributes of the published content stored thereon, the attributes including at least two of a device from which the content originated attribute, a lineage attribute, and a service level agreement attribute, and content processing circuitry coupled to the content store, the content processing circuitry configured to manage the published content based on the attributes.
    Type: Application
    Filed: August 19, 2020
    Publication date: April 8, 2021
    Inventors: Sebastian Schoenberg, Andrew Stephen Brown, Srikathyayani Srikanteswara, Jessica C. McCarthy, Eve M. Schooler, Christian Maciocco, Hassnaa Moustafa, Nageen Himayat, Rath Vannithamby, David John Zage
  • Patent number: 10848584
    Abstract: Generally discussed herein are systems, devices, and methods for routing interests and/or content in an information centric network. A router can include a memory and routing circuitry coupled to the memory, the routing circuitry configured to receive a packet, receive one or more attributes including at least one of (1) a network attribute, (2) a platform attribute, and (3) a content attribute, determine which neighbor node is to receive the packet next based on the received one or more attributes, and forward the packet to the determined neighbor node.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Rath Vannithamby, Ren Wang, Nageen Himayat, Eve M. Schooler, Vallabhajosyula S. Somayazulu, Christian Maciocco, Srikathyayani Srikanteswara, David John Zage, Sebastian Schoenberg, Andrew Stephen Brown, Maruti Gupta Hyde, Jessica C. McCarthy
  • Patent number: 10834223
    Abstract: Generally discussed herein are systems, devices, and methods for interfacing between a host-oriented network (HON) and an information-centric network (ICN). A device can include a first interface to couple to a host-oriented network (HON), a second interface to couple to an information-centric network (ICN), a memory including data stored thereon mapping named data in the ICN to a respective host in the HON, and content processing circuitry to receive an interest packet or content packet from the ICN through the first interface, produce a corresponding HON packet based on the mapping in the memory, and provide the HON packet to the HON through the second interface.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: November 10, 2020
    Assignee: Intel Corporation
    Inventors: Nageen Himayat, Srikathyayani Srikanteswara, Christian Maciocco, Hassnaa Moustafa, Eve M. Schooler, Andrew Stephen Brown, Rath Vannithamby, Sebastian Schoenberg
  • Patent number: 10785341
    Abstract: Generally discussed herein are systems, devices, and methods for populating a cache in an information-centric network. A device of an ICN can include a content store including published content and attributes of the published content stored thereon, the attributes including at least two of a device from which the content originated attribute, a lineage attribute, and a service level agreement attribute, and content processing circuitry coupled to the content store, the content processing circuitry configured to manage the published content based on the attributes.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: September 22, 2020
    Assignee: Intel Corporation
    Inventors: Sebastian Schoenberg, Andrew Stephen Brown, Srikathyayani Srikanteswara, Jessica C. McCarthy, Eve M. Schooler, Christian Maciocco, Hassnaa Moustafa, Nageen Himayat, Rath Vannithamby, David John Zage
  • Patent number: 10747682
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: August 18, 2020
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Publication number: 20200259885
    Abstract: To address technical problems facing managing multiple sources of information from multiple vehicles, vehicular computing power may be exploited to process such information before sharing with others, which may help reduce network traffic overhead. A technical solution to improve this information processing over vehicular networks by using a hybrid Named Function Network (NFN) and Information Centric Network (ICN), such as in a hybrid NFN/ICN. An NFN may be used to orchestrate computations in a highly dynamic environment after decomposing the computations into a number of small functions. A function may include a digitally signed binary supplied by a car vendor or other trusted authority and executed within a controlled environment, such as a virtual machine, container, Java runtime-environment, or other controlled environment.
    Type: Application
    Filed: June 28, 2019
    Publication date: August 13, 2020
    Inventors: S. M. Iftekharul Alam, Stepan Karpenko, Satish Chandra Jha, Yi Zhang, Kuilin Clark Chen, Kathiravetpillai Sivanesan, Gabriel Arrobo Vidal, Srikathyayani Srikanteswara, Hassnaa Moustafa, Eve M. Schooler, Sebastian Schoenberg, Venkatesan Nallampatti Ekambaram, Ravikumar Balakrishnan
  • Publication number: 20190141568
    Abstract: System and techniques for publisher control in an information centric network (ICN) are described herein. Named data criteria to identify data for a workload may be constructed. A discriminator for potential publishers of the data may be constructed. An interest packet may be transmitted based on the named data criteria and the discriminator and a response to the interest packet received from one of the potential publishers.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 9, 2019
    Inventors: Ravikumar Balakrishnan, Venkatesan Nallampatti Ekambaram, Srikathyayani Srikanteswara, Jessica C. McCarthy, Eve M. Schooler, Sebastian Schoenberg, Rath Vannithamby, Moreno Ambrosin, Maruti Gupta Hyde
  • Patent number: 10223149
    Abstract: A processor includes an interface coupled to a programmable integrated circuit (IC) and a processor core coupled to the interface and to execute a virtual machine monitor (VMM). The VMM provides a virtual device for a virtual machine (VM). The virtual device emulates a hardware interface of a hardware device, wherein the processor core is further to execute the VM to transmit a command through the interface to the programmable IC to update a device model, stored in the programmable IC, for the virtual device.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: March 5, 2019
    Assignee: Intel Corporation
    Inventor: Sebastian Schoenberg
  • Patent number: 10180911
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: January 15, 2019
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Publication number: 20180196758
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 12, 2018
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Publication number: 20180196759
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 12, 2018
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Publication number: 20180173548
    Abstract: A processor includes an interface coupled to a programmable integrated circuit (IC) and a processor core coupled to the interface and to execute a virtual machine monitor (VMM). The VMM provides a virtual device for a virtual machine (VM). The virtual device emulates a hardware interface of a hardware device, wherein the processor core is further to execute the VM to transmit a command through the interface to the programmable IC to update a device model, stored in the programmable IC, for the virtual device.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 21, 2018
    Inventor: Sebastian Schoenberg
  • Publication number: 20180146059
    Abstract: Generally discussed herein are systems, devices, and methods for populating a cache in an information-centric network. A device of an ICN can include a content store including published content and attributes of the published content stored thereon, the attributes including at least two of a device from which the content originated attribute, a lineage attribute, and a service level agreement attribute, and content processing circuitry coupled to the content store, the content processing circuitry configured to manage the published content based on the attributes.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 24, 2018
    Inventors: Sebastian Schoenberg, Andrew Stephen Brown, Srikathyayani Srikanteswara, Jessica C. McCarthy, Eve M. Schooler, Christian Maciocco, Hassnaa Moustafa, Nageen Himayat, Rath Vannithamby, David John Zage
  • Publication number: 20180145907
    Abstract: Generally discussed herein are systems, devices, and methods for routing interests and/or content in an information centric network. A router can include a memory and routing circuitry coupled to the memory, the routing circuitry configured to receive a packet, receive one or more attributes including at least one of (1) a network attribute, (2) a platform attribute, and (3) a content attribute, determine which neighbor node is to receive the packet next based on the received one or more attributes, and forward the packet to the determined neighbor node.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 24, 2018
    Inventors: Rath Vannithamby, Ren Wang, Nageen Himayat, Eve M. Schooler, Vallabhajosyula S. Somayazulu, Christian Maciocco, Srikathyayani Srikanteswara, David John Zage, Sebastian Schoenberg, Andrew Stephen Brown, Maruti Gupta Hyde, Jessica C. McCarthy
  • Publication number: 20180146071
    Abstract: Generally discussed herein are systems, devices, and methods for interfacing between a host-oriented network (HON) and an information-centric network (ICN). A device can include a first interface to couple to a host-oriented network (HON), a second interface to couple to an information-centric network (ICN), a memory including data stored thereon mapping named data in the ICN to a respective host in the HON, and content processing circuitry to receive an interest packet or content packet from the ICN through the first interface, produce a corresponding HON packet based on the mapping in the memory, and provide the HON packet to the HON through the second interface.
    Type: Application
    Filed: June 29, 2017
    Publication date: May 24, 2018
    Inventors: Nageen Himayat, Srikathyayani Srikanteswara, Christian Maciocco, Hassnaa Moustafa, Eve M. Schooler, Andrew Stephen Brown, Rath Vannithamby, Sebastian Schoenberg
  • Publication number: 20180060247
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: June 12, 2017
    Publication date: March 1, 2018
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Patent number: 9678890
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: June 13, 2017
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard A Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg