Patents by Inventor Sebastian Schoenberg

Sebastian Schoenberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110321065
    Abstract: Methods and systems to implement a physical device to differentiate amongst multiple virtual machines (VM) of a computer system. The device may include a wireless network interface controller. VM differentiation may be performed with respect to configuration controls and/or data traffic. VM differentiation may be performed based on VM-specific identifiers (VM IDs). VM IDs may be identified within host application programming interface (API) headers of incoming configuration controls and data packets, and/or may be looked-up based on VM-specific MAC addresses associated with data packets. VM IDs may be inserted in API headers of outgoing controls and/or data packets to permit a host computer system to forward the controls and/or packets to appropriate VMs. VM IDs may be used look-up VM-specific configuration parameters and connection information to reconfigure the physical device on a per VM basis. VM IDs may be used look-up VM-specific security information with which to process data packets.
    Type: Application
    Filed: December 25, 2010
    Publication date: December 29, 2011
    Inventors: Praveen GOPALAKRISHNAN, Hsin-Yuo Liu, Sanjay Kumar, Xue Yang, Sebastian Schoenberg
  • Patent number: 7886293
    Abstract: In one embodiment, the present invention includes a method of transitioning control to guest software in a virtual machine from a virtual machine monitor, receiving control following a transition from the virtual machine to the virtual machine monitor upon an event, and determining whether to modify a state of the guest code, a state of the virtual machine monitor or a state of controls. If such a determination is made, the state may be modified and control is transitioned back to the guest software.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: February 8, 2011
    Assignee: Intel Corporation
    Inventors: Andrew V. Anderson, Steven M. Bennett, Erik C. Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kägi, Michael A. Goldsmith, Sebastian Schoenberg, Richard Uhlig
  • Patent number: 7840962
    Abstract: In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a VMM timer indicator is set to an enabling value, and identifying a VMM timer value configured by the VMM. The method further includes periodically comparing a current value of a timing source with the VMM timer value, generating an internal event if the current value of the timing source has reached the VMM timer value, and transitioning control to the VMM in response to the internal event without incurring an event handling procedure in any one of the VMM and the VM.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: November 23, 2010
    Assignee: Intel Corporation
    Inventors: Gilbert Neiger, Steven M. Bennett, Erik Cota-Robles, Sebastian Schoenberg, Clifford D. Hall, Dion Rodgers, Lawrence O. Smith, Andrew V. Anderson, Richard A. Uhlig, Michael Kozuch, Andy Glew
  • Patent number: 7840964
    Abstract: In some embodiments, the invention efficiently manages, sets up, controls and performs communication between isolated components using portals. In a platform having virtualization architecture, a component in a first virtual machine requests a service to be performed by a component in a second virtual machine. A privileged system layer validates the ability to create a communication portal between the two components. The validation is a two-level validation to ensure that a portal is permitted between the two components and that the requested activity is also permitted. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: November 23, 2010
    Assignee: Intel Corporation
    Inventors: Sebastian Schoenberg, Volkmar Uhlig
  • Patent number: 7757231
    Abstract: In some embodiments, the invention involves a system to deprivilege components of a virtual machine monitor and enable deprivileged service virtual machines (SVMs) to handle selected trapped events. An embodiment of the invention is a hybrid VMM operating on a platform with hardware virtualization support. The hybrid VMM utilizes features from both hypervisor-based and host-based VMM architectures. In at least one embodiment, the functionality of a traditional VMM is partitioned into a small platform-dependent part called a micro-hypervisor (MH) and one or more platform-independent parts called service virtual machines (SVMs). The micro-hypervisor operates at a higher virtual machine (VM) privilege level than any SVM, while the SVM and other VMs may still have access to any instruction set architecture (ISA) privilege level. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: July 13, 2010
    Assignee: Intel Corporation
    Inventors: Andrew V. Anderson, Steven M. Bennett, Erik Cota-Robles, Alain Kägi, Gilbert Neiger, Rajesh S. Madukkarumukumana, Sebastian Schoenberg, Richard Uhlig, Michael A. Rothman, Vincent J. Zimmer, Stalinselvaraj Jeyasingh
  • Publication number: 20100011186
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: June 30, 2009
    Publication date: January 14, 2010
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Dion Rodgers, Rajesh Madukkaraumukumana, Camron Rust, Sebastian Schoenberg
  • Patent number: 7555628
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: June 30, 2009
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Dion Rodgers, Rajesh Madukkarumukumana Sankaran, Camron Rust, Sebastian Schoenberg
  • Publication number: 20090089527
    Abstract: Embodiments of apparatuses, methods, and systems for executing a protected device model in a virtual machine are disclosed. In one embodiment, an apparatus includes recognition logic, memory management logic, control logic, and execution logic. The recognition logic is to recognize an indication, during execution of first code on a virtual machine, that the first code is attempting to access a device. The memory management logic is to prevent the virtual machine from accessing a portion of memory during execution of the first code, and to allow the virtual machine to access the portion of memory in response to the indication. The control logic is to transfer control of the apparatus from the first code to second code stored in the portion of memory, without exiting the virtual machine. The execution logic is to execute the second code to model the device.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Sebastian Schoenberg, Steven M. Bennett, Andrew V. Anderson
  • Patent number: 7506121
    Abstract: Embodiments of apparatuses, methods, and systems for guests to access memory mapped devices are disclosed. In one embodiment, an apparatus includes evaluation logic and exit logic. The evaluation logic is to determine, in response to an attempt of a guest to access a device using a memory address mapped to the device and based on an access type, whether the access is allowed. The exit logic is to transfer control to a host if the evaluation logic determines that the access is not allowed.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: March 17, 2009
    Assignee: Intel Corporation
    Inventors: Gilbert Neiger, Andrew V. Anderson, Steven M. Bennett, Rajesh Sankaran Madukkarumukumana, Richard A. Uhlig, Rajesh S. Parthasarathy, Sebastian Schoenberg
  • Publication number: 20080163254
    Abstract: Embodiments of apparatuses, methods, and systems for controlling virtual machines based on performance counters are disclosed. In one embodiment, an apparatus includes an event counter, a comparator, and virtualization control logic. The event counter is to keep an event count based on the number of occurrences of an event. The comparator is to determine whether the event count has reached a threshold value. The virtualization control logic is to transfer control of the apparatus from a guest to a host in response to the comparator determining that the event count has reached the threshold value.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Erik C. Cota-Robles, Steven M. Bennett, Andrew V. Anderson, Sebastian Schoenberg
  • Publication number: 20080162762
    Abstract: Embodiments of apparatuses, methods, and systems for interrupt remapping based on requestor identification are disclosed. In one embodiment, an apparatus includes look-up logic, and comparison logic. The look-up logic is to look-up an entry associated with an interrupt request in a data structure. The comparison logic is to compare an identifier of the requestor to a source value in the entry.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Gilbert Neiger, Rajesh Sankaran Modukkarumukumana, Sridhar Muthrasanallur, Sebastian Schoenberg, Richard A. Uhlig
  • Publication number: 20080046679
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: August 15, 2006
    Publication date: February 21, 2008
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Dion Rodgers, Rajesh Madukkarumukumana, Camron Rust, Sebastian Schoenberg
  • Publication number: 20080005447
    Abstract: In a virtualization system comprising a guest machine, a host machine, and a virtual machine monitor (VMM), the host machine further including a processor including hardware support for virtualization the hardware support for virtualization at least in part to control operation of the guest machine, the VMM dynamically installing a mapping for a guest address to be accessed by the VMM in a page table of the VMM, prior to the VMM accessing the guest physical address.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventors: Sebastian Schoenberg, Andrew Anderson, Steven M. Bennett, Rajesh Sankaran
  • Patent number: 7313669
    Abstract: In one embodiment, a method for supporting address translation in a virtual-machine environment includes creating a guest translation data structure to be used by a guest operating system for address translation operations, creating an active translation data structure based on the guest translation data structure, and periodically modifying the content of the active translation data structure to conform to the content of the guest translations data structure. The content of the active translation data structure is used by a processor to cache address translations in a translation-lookaside buffer (TLB).
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: December 25, 2007
    Assignee: Intel Corporation
    Inventors: Gilbert Neiger, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig, Sebastian Schoenberg
  • Publication number: 20070169120
    Abstract: In some embodiments, the invention efficiently manages, sets up, controls and performs communication between isolated components using portals. In a platform having virtualization architecture, a component in a first virtual machine requests a service to be performed by a component in a second virtual machine. A privileged system layer validates the ability to create a communication portal between the two components. The validation is a two-level validation to ensure that a portal is permitted between the two components and that the requested activity is also permitted. Other embodiments are described and claimed.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 19, 2007
    Inventors: Sebastian Schoenberg, Volkmar Uhlig
  • Publication number: 20070157197
    Abstract: Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt request, delivery logic, and exit logic. The delivery logic is to determine, based on an attribute of the interrupt request, whether the interrupt request is to be delivered to the virtual processor. The exit logic is to transfer control to a host if the delivery logic determines that the interrupt request is not to be delivered to the virtual processor.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Gilbert Neiger, Rajesh Madukkarumukumana, Richard Uhlig, Udo Steinberg, Sebastian Schoenberg, Sridhar Muthrasanallur, Steven Bennett, Andrew Anderson, Erik Cota-Robles
  • Publication number: 20070156986
    Abstract: Embodiments of apparatuses, methods, and systems for guests to access memory mapped devices are disclosed. In one embodiment, an apparatus includes evaluation logic and exit logic. The evaluation logic is to determine, in response to an attempt of a guest to access a device using a memory address mapped to the device and based on an access type, whether the access is allowed. The exit logic is to transfer control to a host if the evaluation logic determines that the access is not allowed.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Gilbert Neiger, Andrew Anderson, Steven Bennett, Rajesh Madukkarumukumana, Richard Uhlig, Rajesh Parthasarathy, Sebastian Schoenberg
  • Patent number: 7225441
    Abstract: In one embodiment, a method for providing power management via virtualization includes monitoring the utilization of a host platform device by one or more virtual machines and managing power consumption of the host platform device based on the results of monitoring.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: May 29, 2007
    Assignee: Intel Corporation
    Inventors: Michael Kozuch, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Sebastian Schoenberg, Richard Uhlig
  • Publication number: 20070074199
    Abstract: Instructions to change a microcode program of a virtual device are trapped and the replacement program is saved. Later, the microcode program is installed on one or more non-virtual devices. Software and systems using the method are also described.
    Type: Application
    Filed: September 27, 2005
    Publication date: March 29, 2007
    Inventor: Sebastian Schoenberg
  • Patent number: 7191440
    Abstract: Transitions among schedulable entities executing in a computer system are tracked in computer hardware or in a virtual machine monitor. In one aspect, the schedulable entities are operating system processes and threads, virtual machines, and instruction streams executing on the hardware. In another aspect, the schedulable entities are processes or threads executing within the virtual machines under the control of the virtual machine monitor. The virtual machine monitor derives scheduling information from the transitions to enable a virtual machine system to guarantee adequate scheduling quality of service to real-time applications executing in virtual machines that contain both real-time and non-real-time applications. In still another aspect, a parent virtual machine monitor in a recursive virtualization system can use the scheduling information to schedule a child virtual machine monitor that controls multiple virtual machines.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: March 13, 2007
    Assignee: Intel Corporation
    Inventors: Erik Cota-Robles, Sebastian Schoenberg, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Gilbert Neiger, Richard Uhlig