Patents by Inventor Sebastien Marineau-Mes
Sebastien Marineau-Mes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10715727Abstract: In various implementations a method includes obtaining a plurality of source images, stabilizing the plurality of source images to generate a plurality of stabilized images, and averaging the plurality of stabilized image to generate a synthetic long exposure image. In various implementations, stabilizing the plurality of source images includes: selecting one of the plurality of source images to serve as a reference frame; and registering others of the plurality of source images to the reference frame by applying a perspective transformation to others of the plurality of the source images.Type: GrantFiled: May 12, 2018Date of Patent: July 14, 2020Assignee: APPLE INC.Inventors: Sebastien Marineau-Mes, Charles A. Mezak, Arwen Bradley, Alex T. Nelson, Douglas P. Mitchell, Claus Moelgaard, Jason Klivington, Rudolph van der Merwe, Zahra Sadeghipoor Kermani, Farhan Baqai, Todd Sachs, Paul Hubel
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Patent number: 10531067Abstract: Techniques are disclosed for capturing stereoscopic images using one or more high color density or “full color” image sensors and one or more low color density or “sparse color” image sensors. Low color density image sensors, may include substantially fewer color pixels than the sensor's total number of pixels, as well as fewer color pixels than the total number of color pixels on the full color image sensor. More particularly, the mostly-monochrome image captured by the low color density image sensor may be used to reduce noise and increase the spatial resolution of an imaging system's output image. In addition, the color pixels present in the low color density image sensor may be used to identify and fill in color pixel values, e.g., for regions occluded in the image captured using the full color image sensor. Optical Image Stabilization and/or split photodiodes may be employed on one or more sensors.Type: GrantFiled: March 26, 2018Date of Patent: January 7, 2020Assignee: Apple Inc.Inventors: Ziv Attar, Paul M. Hubel, Ilana Volfin, Sebastien Marineau-Mes
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Publication number: 20180338086Abstract: In various implementations a method includes obtaining a plurality of source images, stabilizing the plurality of source images to generate a plurality of stabilized images, and averaging the plurality of stabilized image to generate a synthetic long exposure image. In various implementations, stabilizing the plurality of source images includes: selecting one of the plurality of source images to serve as a reference frame; and registering others of the plurality of source images to the reference frame by applying a perspective transformation to others of the plurality of the source images.Type: ApplicationFiled: May 12, 2018Publication date: November 22, 2018Inventors: Sebastien Marineau-Mes, Charles A. Mezak, Arwen Bradley, Alex T. Nelson, Douglas P. Mitchell, Claus Moelgaard, Jason Klivington, Rudolph van der Merwe, Zahra Sadeghipoor Kermani, Farhan Baqai, Todd Sachs, Paul Hubel
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Publication number: 20180278913Abstract: Techniques are disclosed for capturing stereoscopic images using one or more high color density or “full color” image sensors and one or more low color density or “sparse color” image sensors. Low color density image sensors, may include substantially fewer color pixels than the sensor's total number of pixels, as well as fewer color pixels than the total number of color pixels on the full color image sensor. More particularly, the mostly-monochrome image captured by the low color density image sensor may be used to reduce noise and increase the spatial resolution of an imaging system's output image. In addition, the color pixels present in the low color density image sensor may be used to identify and fill in color pixel values, e.g., for regions occluded in the image captured using the full color image sensor. Optical Image Stabilization and/or split photodiodes may be employed on one or more sensors.Type: ApplicationFiled: March 26, 2018Publication date: September 27, 2018Inventors: Ziv Attar, Paul M. Hubel, Ilana Volfin, Sebastien Marineau-Mes
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Patent number: 9424093Abstract: A system includes a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more process threads and that each have a corresponding processor budget. The code also is executable to, when the system is under a normal load, allocate the processor to one of the threads that is in a ready state and has the highest priority among the process threads that are in a ready state. The code is also executable to, when the system is in overload, allocate the processor to one of the process threads that is in a ready state and has the highest priority among the process threads that are in a ready state and for which the adaptive partition that the process thread is associated with has available guaranteed processor budget.Type: GrantFiled: April 29, 2013Date of Patent: August 23, 2016Assignee: 2236008 Ontario Inc.Inventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20160179575Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. When the system is overloaded, threads are scheduled based priority of threads that are in a ready state and based on the available guaranteed processor time budget of the adaptive partition associated with each thread.Type: ApplicationFiled: February 25, 2013Publication date: June 23, 2016Inventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 9361156Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. When the system is overloaded, threads are scheduled based priority of threads that are in a ready state and based on the available guaranteed processor time budget of the adaptive partition associated with each thread.Type: GrantFiled: February 25, 2013Date of Patent: June 7, 2016Assignee: 2236008 ONTARIO INC.Inventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20140245311Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. When the system is overloaded, threads are scheduled based priority of threads that are in a ready state and based on the available guaranteed processor time budget of the adaptive partition associated with each thread.Type: ApplicationFiled: February 25, 2013Publication date: August 28, 2014Applicant: QNX SOFTWARE SYSTEMS LIMITEDInventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8595733Abstract: A system includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. The software code further includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based on a comparison between ordering function values for each adaptive partition. The ordering function value for each adaptive partition is calculated using one or more weighted variables for each adaptive partition. The variables include, for example, 1) the process budget, such as a guaranteed time budget, of the adaptive partition, 2) the critical budget, if any, of the adaptive partition, 3) the rate at which the process threads of an adaptive partition consume processor time.Type: GrantFiled: December 23, 2010Date of Patent: November 26, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8544013Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor budget that is assigned to it. The process threads include a mutex holding thread and a mutex waiting thread. The mutex holding thread is associated with a first adaptive partition and may gain exclusive access to a mutex object. The mutex waiting thread is associated with a second adaptive partition and must wait for access to the mutex object while the mutex object is held by the mutex holding thread. The software code further includes a scheduling system that selectively allocates the processor to run the process threads based, at least in part, on the processor budget of the associated adaptive partitions.Type: GrantFiled: March 8, 2006Date of Patent: September 24, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20130247066Abstract: A system includes a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more process threads and that each have a corresponding processor budget. The code also is executable to, when the system is under a normal load, allocate the processor to one of the threads that is in a ready state and has the highest priority among the process threads that are in a ready state. The code is also executable to, when the system is in overload, allocate the processor to one of the process threads that is in a ready state and has the highest priority among the process threads that are in a ready state and for which the adaptive partition that the process thread is associated with has available guaranteed processor budget.Type: ApplicationFiled: April 29, 2013Publication date: September 19, 2013Applicant: QNX SOFTWARE SYSTEMS LIMITEDInventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8434086Abstract: A system is set forth comprising a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more software threads and that each have a corresponding processor budget. The code also is executable to generate at least one sending thread and at least one receiving thread which responds to communications from the sending thread to execute one or more tasks corresponding to the communications. In operation, the scheduling system selectively allocates the processor to each sending and receiving thread based on the processor budget of the adaptive partition associated with the respective thread. The scheduling system bills the processor budget of the adaptive partition associated with the sending thread for processor allocation used by the receiving thread to respond to communications sent by the sending thread.Type: GrantFiled: December 22, 2005Date of Patent: April 30, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter Van Der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8387052Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. Even when overloaded, the scheduler provides real-time guarantees to a set of critical threads, as specified by the system architect.Type: GrantFiled: August 31, 2005Date of Patent: February 26, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter Van Der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20110107342Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality, of adaptive partitions has one or more corresponding scheduling attributes that are assigned to it. The software code further includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based on a comparison between ordering function values for each adaptive partition. The ordering function value for each adaptive partition is calculated using one or more of the scheduling attributes of the corresponding adaptive partition.Type: ApplicationFiled: December 23, 2010Publication date: May 5, 2011Applicant: QNX Software Systems GmbH & Co. KGInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 7870554Abstract: A system includes a processor, one or more memory storage units, and software code stored in the memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of adaptive partition has one or more corresponding assigned scheduling attributes. The software code includes a scheduling system for selectively allocating the processor to run process threads based on a comparison between ordering function values for each adaptive partition. Ordering function values are calculated based on scheduling attributes of the corresponding adaptive partition. A critical ordering function value also may be calculated and used to determine the proper manner of billing an associated adaptive partition for the processor allocation used to run its associated critical threads. Methods of implementing various aspects of such a system are also set forth.Type: GrantFiled: March 8, 2006Date of Patent: January 11, 2011Assignee: QNX Software Systems GmbH & Co. KGInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 7840966Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor time budget. One or more of the process threads are designated as critical threads. Each adaptive partition associated with a critical thread is assigned a corresponding critical time budget. The software code also includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based, at least in part, on the processor time budgets of the respective adaptive partitions.Type: GrantFiled: March 8, 2006Date of Patent: November 23, 2010Assignee: QNX Software Systems GmbH & Co. KGInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 7549151Abstract: An asynchronous message passing mechanism that allows for multiple messages to be batched for delivery between processes, while allowing for full memory protection during data transfers and a lockless mechanism for speeding up queue operation and queuing and delivering messages simultaneously.Type: GrantFiled: June 3, 2005Date of Patent: June 16, 2009Assignee: QNX Software SystemsInventors: Hao Zhou, Sebastien Marineau-Mes, Peter van der Veen, Pradeep Kathail, Steve Belair
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Publication number: 20070226739Abstract: A system is set forth that comprises a processor, such as a single processor or symmetric multiprocessor, and one or more memory storage units. The system also includes software code that is stored in the memory storage units. The software code is executable by the processor and comprises code for generating a plurality of adaptive partitions that are each associated with one or more software threads. Each of the adaptive partitions has a corresponding processor budget. The code also is executable to generate at least one sending thread and at least one receiving thread. The receiving thread responds to communications from the sending thread to execute one or more tasks corresponding to the communications. A scheduling system also forms at least part of the code that is executable by the processor.Type: ApplicationFiled: December 22, 2005Publication date: September 27, 2007Inventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20070061788Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has one or more corresponding scheduling attributes that are assigned to it. The software code further includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based on a comparison between ordering function values for each adaptive partition. The ordering function value for each adaptive partition is calculated using one or more of the scheduling attributes of the corresponding adaptive partition.Type: ApplicationFiled: March 8, 2006Publication date: March 15, 2007Inventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20070061809Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor budget that is assigned to it. The process threads include a mutex holding thread and a mutex waiting thread. The mutex holding thread is associated with a first adaptive partition and may gain exclusive access to a mutex object. The mutex waiting thread is associated with a second adaptive partition and must wait for access to the mutex object while the mutex object is held by the mutex holding thread. The software code further includes a scheduling system that selectively allocates the processor to run the process threads based, at least in part, on the processor budget of the associated adaptive partitions.Type: ApplicationFiled: March 8, 2006Publication date: March 15, 2007Inventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter Veen, Colin Burgess, Thomas Fletcher, Brian Stecher