Patents by Inventor Sebastien Pruvost

Sebastien Pruvost has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090166880
    Abstract: An electrical bonding pad for an integrated circuit, comprising an encapsulation layer for receiving electrical signals and for covering a portion of a stack of conductive layers. The pad further comprises a conductive area in the stack, with the conductive area being at least partially covered by the encapsulation layer. The conductive area is intended for the passage of electrical signals received by the encapsulation layer and traveling towards a circuit core, and is electrically insulated from the encapsulation layer in a manner that at least partially decouples the electrical signals received from the encapsulation layer.
    Type: Application
    Filed: December 24, 2008
    Publication date: July 2, 2009
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Laurent Chabert, Sebastien Pruvost
  • Patent number: 7417262
    Abstract: An integrated circuit includes many metallization levels. A thick dielectric region is placed above at least two metallization levels and laterally neighboring two or more metallization levels. That part of the two metallization levels which lie beneath the dielectric region forms a screen. A conducting strip is placed on the dielectric region so that the dielectric region forms a waveguide.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: August 26, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Sébastien Pruvost, Jocelyn Roux
  • Publication number: 20080079170
    Abstract: An electronic component for microwave transmission includes a high resistivity substrate on which is at least located several metallization layers divided into portions. A first set of piled up portions defines a ground ribbon and a second set of piled up portions defines a power ribbon. At least a first active portion of said ground ribbon and a first active portion of said power ribbon are respectively located between the substrate and an uppermost one of the several metallization layers. The electronic component in one implementation is a coplanar waveguide.
    Type: Application
    Filed: October 2, 2006
    Publication date: April 3, 2008
    Applicant: STMicroelectronics S.A.
    Inventors: Sebastien Pruvost, Frederic Gianesello
  • Publication number: 20070252177
    Abstract: The invention relates to integrated circuits for microwave applications in the millimeter wavelength range (frequencies of around 50 GHz). To improve the performance of the microwave transmission lines in the circuit, a structure of conducting vias between a transmission line and a conducting zone is proposed. The vias are formed in apertures in a benzocyclobutene layer. These apertures are larger at their base than the conducting zones. The transmission line descends into the aperture but does not come back up over the edges of the aperture. The parasitic capacitances with the substrate at the point of contact are minimized.
    Type: Application
    Filed: April 26, 2007
    Publication date: November 1, 2007
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE, STMICROELECTRONICS SA
    Inventors: Robert Cuchet, Sebastien Pruvost
  • Publication number: 20060270210
    Abstract: An integrated circuit includes many metallization levels. A thick dielectric region is placed above at least two metallization levels and laterally neighboring two or more metallization levels. That part of the two metallization levels which lie beneath the dielectric region forms a screen. A conducting strip is placed on the dielectric region so that the dielectric region forms a waveguide.
    Type: Application
    Filed: May 1, 2006
    Publication date: November 30, 2006
    Applicant: STMicroelectronics S.A.
    Inventors: Sebastien Pruvost, Jocelyn Roux