Patents by Inventor See Taur Lee

See Taur Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210063531
    Abstract: Transmitters having increased efficiency, such as may be useful in millimeter-wave devices. A semiconductor device, comprising a transmitter, comprising a modulator configured to receive a differential input signal having a first frequency and provide a differential modulated signal having the first frequency and a first clock phase; a series comprising one or more frequency multipliers, wherein the series of frequency multipliers is configured to receive the differential modulated signal and provide a differential second signal having a second frequency greater than the first frequency and having a second clock phase; and an output transformer configured to receive the differential second signal and transform the differential second signal to a single-ended output signal. Methods of using such transmitters. Systems for manufacturing devices comprising such transmitters.
    Type: Application
    Filed: August 31, 2019
    Publication date: March 4, 2021
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Sher Jiung Fang
  • Publication number: 20200313269
    Abstract: Power combiners having increased output power, such as may be useful in millimeter-wave devices. The power combiner comprise at least two channels, wherein each channel comprises a phase alignment circuit, wherein the phase alignment circuit comprises a first differential input subcircuit comprising a first inverter and a second inverter, and a second differential input subcircuit comprising a third inverter and a fourth inverter, wherein the first inverter, the second inverter, the third inverter, and the fourth inverter each comprise a PMOS transistor and an NMOS transistor each having an adjustable back gate bias voltage. By adjusting the back gate bias voltage, the phases of the signal through each channel may be aligned, which may increase the output power of the power combiner. Methods of increasing output power of such power combiners. Systems for manufacturing devices comprising such power combiners.
    Type: Application
    Filed: March 31, 2020
    Publication date: October 1, 2020
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Sher Jiung Fang, Abdellatif Bellaouar
  • Patent number: 10747254
    Abstract: The disclosure provides a circuit structure including a current source including at least one FDSOI transistor having a back-gate terminal, wherein the current source generates a current proportionate to an absolute temperature of the circuit structure; a first current mirror electrically coupled to the current source and a gate terminal of a device transistor, wherein the first current mirror applies a gate bias to the device transistor based on a magnitude of the current, and wherein a source or drain terminal of the device transistor includes an output current of the circuit structure; and an adjustable voltage source coupled to the back-gate terminal of the at least one FDSOI transistor of the current source, wherein the adjustable voltage source applies a selected back-gate bias voltage to the back-gate terminal of the at least one FDSOI transistor to adjust the current to compensate for process variations of the device transistor.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: August 18, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Sher Jiun Fang, See Taur Lee
  • Patent number: 10644374
    Abstract: Power combiners having increased output power, such as may be useful in millimeter-wave devices. The power combiner comprise at least two channels, wherein each channel comprises a phase alignment circuit, wherein the phase alignment circuit comprises a first differential input subcircuit comprising a first inverter and a second inverter, and a second differential input subcircuit comprising a third inverter and a fourth inverter, wherein the first inverter, the second inverter, the third inverter, and the fourth inverter each comprise a PMOS transistor and an NMOS transistor each having an adjustable back gate bias voltage. By adjusting the back gate bias voltage, the phases of the signal through each channel may be aligned, which may increase the output power of the power combiner. Methods of increasing output power of such power combiners. Systems for manufacturing devices comprising such power combiners.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: May 5, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Sher Jiung Fang, Abdellatif Bellaouar
  • Patent number: 10483917
    Abstract: We disclose apparatus which may provide power amplification in millimeter-wave devices with reduced size and reduced power consumption, and methods of using such apparatus. One such apparatus comprises an input transformer; a first differential pair of injection transistors comprising a first transistor and a second transistor; a first back gate voltage source configured to provide a first back gate voltage to the first transistor; a second back gate voltage source configured to provide a second back gate voltage to the second transistor; a second differential pair of oscillator core transistors comprising a third transistor and a fourth transistor, wherein the third transistor and the fourth transistor are cross-coupled; a third back gate voltage source configured to provide a third back gate voltage to the third transistor; a fourth back gate voltage source configured to provide a fourth back gate voltage to the fourth transistor; and an output transformer.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: November 19, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Abdellatif Bellaouar
  • Patent number: 10432179
    Abstract: We disclose frequency doublers for use in millimeter-wave devices. One such frequency doubler comprises at least one passive mixer comprising at least one of the following: at least one transistor configured to receive a back gate voltage; at least one first input driver circuit; and two second input driver circuits. We also disclose a method comprising determining a target output voltage of a frequency doubler comprising at least one passive mixer comprising at least one transistor configured to receive a back gate voltage; determining an output voltage of the frequency doubler; increasing a back gate voltage of the at least one transistor, in response to determining that the output voltage is below the target output voltage; and decreasing the back gate voltage of the at least one transistor, in response to determining that the output voltage is above the target output voltage.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: October 1, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Abdellatif Bellaouar
  • Publication number: 20190296720
    Abstract: We disclose frequency doublers for use in millimeter-wave devices. One such frequency doubler comprises at least one passive mixer comprising at least one of the following: at least one transistor configured to receive a back gate voltage; at least one first input driver circuit; and two second input driver circuits. We also disclose a method comprising determining a target output voltage of a frequency doubler comprising at least one passive mixer comprising at least one transistor configured to receive a back gate voltage; determining an output voltage of the frequency doubler; increasing a back gate voltage of the at least one transistor, in response to determining that the output voltage is below the target output voltage; and decreasing the back gate voltage of the at least one transistor, in response to determining that the output voltage is above the target output voltage.
    Type: Application
    Filed: March 22, 2018
    Publication date: September 26, 2019
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Abdellatif Bellaouar
  • Publication number: 20190288646
    Abstract: We disclose apparatus which may provide power amplification in millimeter-wave devices with reduced size and reduced power consumption, and methods of using such apparatus. One such apparatus comprises an input transformer; a first differential pair of injection transistors comprising a first transistor and a second transistor; a first back gate voltage source configured to provide a first back gate voltage to the first transistor; a second back gate voltage source configured to provide a second back gate voltage to the second transistor; a second differential pair of oscillator core transistors comprising a third transistor and a fourth transistor, wherein the third transistor and the fourth transistor are cross-coupled; a third back gate voltage source configured to provide a third back gate voltage to the third transistor; a fourth back gate voltage source configured to provide a fourth back gate voltage to the fourth transistor; and an output transformer.
    Type: Application
    Filed: May 31, 2019
    Publication date: September 19, 2019
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Abdellatif Bellaouar
  • Patent number: 10355646
    Abstract: We disclose apparatus which may provide power amplification in millimeter-wave devices with reduced size and reduced power consumption, and methods of using such apparatus. One such apparatus comprises an input transformer; a first differential pair of injection transistors comprising a first transistor and a second transistor; a first back gate voltage source configured to provide a first back gate voltage to the first transistor; a second back gate voltage source configured to provide a second back gate voltage to the second transistor; a second differential pair of oscillator core transistors comprising a third transistor and a fourth transistor, wherein the third transistor and the fourth transistor are cross-coupled; a third back gate voltage source configured to provide a third back gate voltage to the third transistor; a fourth back gate voltage source configured to provide a fourth back gate voltage to the fourth transistor; and an output transformer.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: July 16, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Abdellatif Bellaouar
  • Publication number: 20190190453
    Abstract: We disclose apparatus which may provide power amplification in millimeter-wave devices with reduced size and reduced power consumption, and methods of using such apparatus. One such apparatus comprises an input transformer; a first differential pair of injection transistors comprising a first transistor and a second transistor; a first back gate voltage source configured to provide a first back gate voltage to the first transistor; a second back gate voltage source configured to provide a second back gate voltage to the second transistor; a second differential pair of oscillator core transistors comprising a third transistor and a fourth transistor, wherein the third transistor and the fourth transistor are cross-coupled; a third back gate voltage source configured to provide a third back gate voltage to the third transistor; a fourth back gate voltage source configured to provide a fourth back gate voltage to the fourth transistor; and an output transformer.
    Type: Application
    Filed: April 30, 2018
    Publication date: June 20, 2019
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Abdellatif Bellaouar
  • Patent number: 10038413
    Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to a fully depleted silicon on insulator power amplifier with unique biases and voltage standing wave ratio protection and methods of manufacture. The structure includes a pseudo-differential common source amplifier; first stage cascode devices connected to the pseudo-differential common source amplifier and protecting the pseudo-differential common source amplifier from an over stress; second stage cascode devices connected to the first stage cascode devices and providing differential outputs; and at least one loop receiving the differential outputs from the second stage cascode devices and feeding back the differential outputs to the second stage cascode devices.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: July 31, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Abdellatif Bellaouar
  • Publication number: 20180167038
    Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to a fully depleted silicon on insulator power amplifier with unique biases and voltage standing wave ratio protection and methods of manufacture. The structure includes a pseudo-differential common source amplifier; first stage cascode devices connected to the pseudo-differential common source amplifier and protecting the pseudo-differential common source amplifier from an over stress; second stage cascode devices connected to the first stage cascode devices and providing differential outputs; and at least one loop receiving the differential outputs from the second stage cascode devices and feeding back the differential outputs to the second stage cascode devices.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 14, 2018
    Inventors: See Taur LEE, Abdellatif BELLAOUAR
  • Patent number: 8724736
    Abstract: A transmitter architecture having a single signal path or hardware to cover WCDMA/EDGE/GSM applications, and requires no SAW at the transmitter outputs. The transmitter architecture allows for a transmit convergence feature. A passive mixer with unique driver and furthermore using native devices available from the CMOS process for the mixer cores enables low voltage and low power design, low output noise and high linearity. A digital variable gain amplifier has the capability to cover wide output dynamic range operated from low supply voltage and interfaced digitally with the baseband circuit without DAC. A single transformer is used to combine the outputs from the WCDMA/EDGE and GSM drivers and subsequently convert the differential signal paths into a single-ended signal. RF switches are used to divert the output from the transformer to different bands and applications.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: May 13, 2014
    Assignee: Icera, Inc.
    Inventors: Abdellatif Bellaouar, See Taur Lee, Sher Jiun Fang, Sherif H. K. Embabi, Tajinder Manku
  • Patent number: 8493136
    Abstract: A driver circuit for supplying a drive signal to a mixer circuit comprising a first and second circuit branch and an operational amplifier. The first circuit branch receives an input signal and a bias signal. The second circuit branch receives the input signal. The operational amplifier has a first input connected to a junction node of the first circuit branch and a second input connected to a junction node of the second circuit branch. The operational amplifier is arranged to provide an operational amplifier output signal a second component of the second circuit branch so that a voltage at the junction node of the second circuit branch is equal to a voltage at the junction node of the first circuit branch. The voltage is dependent on the input signal and providing the drive signal.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: July 23, 2013
    Assignee: Icera Inc.
    Inventors: Abdellatif Bellaouar, See Taur Lee
  • Patent number: 8384457
    Abstract: Method and circuitry for controlling duty cycle of an input signal towards a desired value comprising a sequence of at least two inverters arranged in series and feedback circuitry. A first inverter is arranged to receive the input signal and a last inverter is arranged to output a signal having the same frequency as the input signal. The output signal is an adjusted version of the input signal. The feedback circuitry is arranged to receive the output signal and comprises a comparing and supplying means. The comparing means compares the output signal with a reference signal indicative of a desired value and generates a feedback signal based on the comparison of the output and reference signal. The supplying means supplies the feedback signal to adjust operating conditions of at least one of the inverters, such that the duty cycle of the output signal is controlled towards the desired value.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: February 26, 2013
    Assignee: Icera Inc.
    Inventors: Mehmet T. Ozgun, Chi Zhang, See Taur Lee
  • Publication number: 20120268190
    Abstract: An apparatus and method for generating complementary periodic signals for a mixer circuit is provided. The apparatus comprises first and second generation circuits each for generating a periodic signal with a transition time on each rising edge different than a transition time on each falling edge. Each of the first and second generation circuits has an output for supplying its periodic signal to a mixer such that each rising edge of a periodic signal from one of the circuits crosses each falling edge of a periodic signal from the other of the circuits at a crossing point below a turn on voltage of the mixer.
    Type: Application
    Filed: April 19, 2011
    Publication date: October 25, 2012
    Applicant: Icera Inc.
    Inventors: Abdellatif Bellaouar, See Taur Lee
  • Publication number: 20120256669
    Abstract: Method and circuitry for controlling duty cycle of an input signal towards a desired value comprising a sequence of at least two inverters arranged in series and feedback circuitry. A first inverter is arranged to receive the input signal and a last inverter is arranged to output a signal having the same frequency as the input signal. The output signal is an adjusted version of the input signal. The feedback circuitry is arranged to receive the output signal and comprises a comparing and supplying means. The comparing means compares the output signal with a reference signal indicative of a desired value and generates a feedback signal based on the comparison of the output and reference signal. The supplying means supplies the feedback signal to adjust operating conditions of at least one of the inverters, such that the duty cycle of the output signal is controlled towards the desired value.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Applicant: Icera Inc.
    Inventors: Mehmet T. Ozgun, Chi Zhang, See Taur Lee
  • Publication number: 20120256676
    Abstract: A driver circuit for supplying a drive signal to a mixer circuit comprising a first and second circuit branch and an operational amplifier. The first circuit branch receives an input signal and a bias signal. The second circuit branch receives the input signal. The operational amplifier has a first input connected to a junction node of the first circuit branch and a second input connected to a junction node of the second circuit branch. The operational amplifier is arranged to provide an operational amplifier output signal a second component of the second circuit branch so that a voltage at the junction node of the second circuit branch is equal to a voltage at the junction node of the first circuit branch. The voltage is dependent on the input signal and providing the drive signal.
    Type: Application
    Filed: April 8, 2011
    Publication date: October 11, 2012
    Applicant: Icera Inc.
    Inventors: Abdellatif Bellaouar, See Taur Lee
  • Patent number: 8130040
    Abstract: Methods to implement low cost, high efficiency, low loss power combiner with novel matching circuits are disclosed. A narrow band power combiner enables a high power and high efficiency radio frequency power amplifier to be realized using multiple low voltage CMOS transistors or micro power amplifiers. The power combiner may be printed on a package substrate and realized either using single layer substrate through edge coupling or multiple layers substrate through broadside coupling. The micro power amplifiers may be fabricated using low voltage CMOS technology and electrical connections between the outputs from the micro power amplifiers and the power combiner may be provided through stud bumps in a flip chip technology. With the tunable matching circuits, the present invention allows the narrow band power combiner to be tuned to different frequencies.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: March 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Robert Bogdan Staszewski, See Taur Lee
  • Publication number: 20110249770
    Abstract: A transmitter architecture having a single signal path or hardware to cover WCDMA/EDGE/GSM applications, and requires no SAW at the transmitter outputs. The transmitter architecture allows for a transmit convergence feature. A passive mixer with unique driver and furthermore using native devices available from the CMOS process for the mixer cores enables low voltage and low power design, low output noise and high linearity. A digital variable gain amplifier has the capability to cover wide output dynamic range operated from low supply voltage and interfaced digitally with the baseband circuit without DAC. A single transformer is used to combine the outputs from the WCDMA/EDGE and GSM drivers and subsequently convert the differential signal paths into a single-ended signal. RF switches are used to divert the output from the transformer to different bands and applications.
    Type: Application
    Filed: September 8, 2009
    Publication date: October 13, 2011
    Applicant: ICERA INC.
    Inventors: Abdellatif Bellaouar, See Taur Lee, Sher Jiun Fang, Sherif H.K. Embabi, Tajinder Manku